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Commit 1282bade authored by Mike Rapoport's avatar Mike Rapoport Committed by Greg Kroah-Hartman
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staging: sm750fb: remove dead code 

Remove the code enclosed in '#if 0'
Signed-off-by: default avatarMike Rapoport <mike.rapoport@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 96a384a7
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Showing with 2 additions and 442 deletions
drivers/staging/sm750fb/ddk750_chip.c
View file @ 1282bade
......@@ -248,17 +248,6 @@ int ddk750_initHw(initchip_param_t *pInitParam)
{
unsigned int ulReg;
#if 0
/* move the code to map regiter function. */
if (getChipType() == SM718) {
/* turn on big endian bit*/
ulReg = PEEK32(0x74);
/* now consider register definition in a big endian pattern*/
POKE32(0x74, ulReg|0x80000000);
}
#endif
if (pInitParam->powerMode != 0)
pInitParam->powerMode = 0;
......@@ -325,37 +314,6 @@ int ddk750_initHw(initchip_param_t *pInitParam)
ulReg = FIELD_SET(ulReg, ALPHA_DISPLAY_CTRL, PLANE, DISABLE);
POKE32(ALPHA_DISPLAY_CTRL, ulReg);
#if 0
/* Disable LCD hardware cursor, if a former application left it on */
ulReg = PEEK32(PANEL_HWC_ADDRESS);
ulReg = FIELD_SET(ulReg, PANEL_HWC_ADDRESS, ENABLE, DISABLE);
POKE32(PANEL_HWC_ADDRESS, ulReg);
/* Disable CRT hardware cursor, if a former application left it on */
ulReg = PEEK32(CRT_HWC_ADDRESS);
ulReg = FIELD_SET(ulReg, CRT_HWC_ADDRESS, ENABLE, DISABLE);
POKE32(CRT_HWC_ADDRESS, ulReg);
/* Disable ZV Port 0, if a former application left it on */
ulReg = PEEK32(ZV0_CAPTURE_CTRL);
ulReg = FIELD_SET(ulReg, ZV0_CAPTURE_CTRL, CAP, DISABLE);
POKE32(ZV0_CAPTURE_CTRL, ulReg);
/* Disable ZV Port 1, if a former application left it on */
ulReg = PEEK32(ZV1_CAPTURE_CTRL);
ulReg = FIELD_SET(ulReg, ZV1_CAPTURE_CTRL, CAP, DISABLE);
POKE32(ZV1_CAPTURE_CTRL, ulReg);
/* Disable ZV Port Power, if a former application left it on */
enableZVPort(0);
/* Disable DMA Channel, if a former application left it on */
ulReg = PEEK32(DMA_ABORT_INTERRUPT);
ulReg = FIELD_SET(ulReg, DMA_ABORT_INTERRUPT, ABORT_1, ABORT);
POKE32(DMA_ABORT_INTERRUPT, ulReg);
/* Disable i2c */
enableI2C(0);
#endif
/* Disable DMA Channel, if a former application left it on */
ulReg = PEEK32(DMA_ABORT_INTERRUPT);
ulReg = FIELD_SET(ulReg, DMA_ABORT_INTERRUPT, ABORT_1, ABORT);
......@@ -370,17 +328,6 @@ int ddk750_initHw(initchip_param_t *pInitParam)
return 0;
}
#if 0
unsigned int absDiff(unsigned int a, unsigned int b)
{
if (a > b)
return(a - b);
else
return(b - a);
}
#endif
/*
monk liu @ 4/6/2011:
re-write the calculatePLL function of ddk750.
......
drivers/staging/sm750fb/ddk750_display.h
View file @ 1282bade
......@@ -85,73 +85,19 @@
LCD1 means panel path TFT1 & panel path DVI (so enable DAC)
CRT means crt path DSUB
*/
#if 0
typedef enum _disp_output_t {
NO_DISPLAY = DPMS_OFF,
LCD1_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DPMS_OFF|DAC_ON,
LCD1_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DPMS_OFF|DAC_ON,
LCD2_PRI = CRT_2_PRI|PRI_TP_ON|DUAL_TFT_ON|DPMS_OFF,
LCD2_SEC = CRT_2_SEC|SEC_TP_ON|DUAL_TFT_ON|DPMS_OFF,
DSUB_PRI = CRT_2_PRI|PRI_TP_ON|DAC_ON,
DSUB_SEC = CRT_2_SEC|SEC_TP_ON|DAC_ON,
LCD1_DSUB_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|
CRT_2_PRI|SEC_TP_OFF|DAC_ON,
LCD1_DSUB_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|
CRT_2_SEC|PRI_TP_OFF|DAC_ON,
/* LCD1 show primary and DSUB show secondary */
LCD1_DSUB_DUAL = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|
CRT_2_SEC|SEC_TP_ON|DAC_ON,
/* LCD1 show secondary and DSUB show primary */
LCD1_DSUB_DUAL_SWAP = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|
CRT_2_PRI|PRI_TP_ON|DAC_ON,
LCD1_LCD2_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|
CRT_2_PRI|SEC_TP_OFF|DPMS_OFF|DUAL_TFT_ON,
LCD1_LCD2_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|
CRT_2_SEC|PRI_TP_OFF|DPMS_OFF|DUAL_TFT_ON,
LCD1_LCD2_DSUB_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DAC_ON|
CRT_2_PRI|SEC_TP_OFF|DPMS_ON|DUAL_TFT_ON,
LCD1_LCD2_DSUB_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DAC_ON|
CRT_2_SEC|PRI_TP_OFF|DPMS_ON|DUAL_TFT_ON,
}
disp_output_t;
#else
typedef enum _disp_output_t {
do_LCD1_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DAC_ON,
do_LCD1_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DAC_ON,
#if 0
do_LCD2_PRI = CRT_2_PRI|PRI_TP_ON,
do_LCD2_SEC = CRT_2_SEC|SEC_TP_ON,
#else
do_LCD2_PRI = CRT_2_PRI|PRI_TP_ON|DUAL_TFT_ON,
do_LCD2_SEC = CRT_2_SEC|SEC_TP_ON|DUAL_TFT_ON,
#endif
/*
do_DSUB_PRI = CRT_2_PRI|PRI_TP_ON|DPMS_ON|DAC_ON,
do_DSUB_SEC = CRT_2_SEC|SEC_TP_ON|DPMS_ON|DAC_ON,
*/
#if 0
do_CRT_PRI = CRT_2_PRI|PRI_TP_ON,
do_CRT_SEC = CRT_2_SEC|SEC_TP_ON,
#else
do_CRT_PRI = CRT_2_PRI|PRI_TP_ON|DPMS_ON|DAC_ON,
do_CRT_SEC = CRT_2_SEC|SEC_TP_ON|DPMS_ON|DAC_ON,
#endif
}
disp_output_t;
#endif
void ddk750_setLogicalDispOut(disp_output_t);
int ddk750_initDVIDisp(void);
......
drivers/staging/sm750fb/ddk750_help.h
View file @ 1282bade
......@@ -8,16 +8,9 @@
#include <asm/uaccess.h>
#include "sm750_help.h"
#if 0
/* if 718 big endian turned on,be aware that don't use this driver for general use,only for ppc big-endian */
#warning "big endian on target cpu and enable nature big endian support of 718 capability !"
#define PEEK32(addr) __raw_readl(mmio750 + addr)
#define POKE32(addr, data) __raw_writel(data, mmio750 + addr)
#else /* software control endianness */
/* software control endianness */
#define PEEK32(addr) readl(addr + mmio750)
#define POKE32(addr, data) writel(data, addr + mmio750)
#endif
extern void __iomem *mmio750;
extern char revId750;
......
drivers/staging/sm750fb/ddk750_reg.h
View file @ 1282bade
This diff is collapsed.
drivers/staging/sm750fb/ddk750_swi2c.c
View file @ 1282bade
......@@ -90,20 +90,17 @@ static void sw_i2c_wait(void)
* never finish.
* use non-ultimate for loop below is safe
* */
#if 0
/* Change wait algorithm to use PCI bus clock,
it's more reliable than counter loop ..
write 0x61 to 0x3ce and read from 0x3cf
*/
while (peekIO(0x3ce, 0x61) & 0x10);
#else
int i, tmp;
for (i = 0; i < 600; i++) {
tmp = i;
tmp += i;
}
#endif
}
/*
......
drivers/staging/sm750fb/sm750_accel.c
View file @ 1282bade
......@@ -233,20 +233,10 @@ unsigned int rop2) /* ROP value */
*/
write_dpr(accel, DE_WINDOW_DESTINATION_BASE, dBase); /* dpr44 */
#if 0
/* Program pitch (distance between the 1st points of two adjacent lines).
Note that input pitch is BYTE value, but the 2D Pitch register uses
pixel values. Need Byte to pixel conversion.
*/
if (Bpp == 3) {
sx *= 3;
dx *= 3;
width *= 3;
write_dpr(accel, DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch) |
FIELD_VALUE(0, DE_PITCH, SOURCE, sPitch)); /* dpr10 */
} else
#endif
{
write_dpr(accel, DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION, (dPitch/Bpp)) |
......@@ -344,21 +334,10 @@ int hw_imageblit(struct lynx_accel *accel,
It is an address offset (128 bit aligned) from the beginning of frame buffer.
*/
write_dpr(accel, DE_WINDOW_DESTINATION_BASE, dBase);
#if 0
/* Program pitch (distance between the 1st points of two adjacent lines).
Note that input pitch is BYTE value, but the 2D Pitch register uses
pixel values. Need Byte to pixel conversion.
*/
if (bytePerPixel == 3) {
dx *= 3;
width *= 3;
startBit *= 3;
write_dpr(accel, DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch) |
FIELD_VALUE(0, DE_PITCH, SOURCE, dPitch)); /* dpr10 */
} else
#endif
{
write_dpr(accel, DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch/bytePerPixel) |
......
drivers/staging/sm750fb/sm750_cursor.c
View file @ 1282bade
......@@ -129,26 +129,6 @@ void hw_cursor_setData(struct lynx_cursor *cursor,
mask = *pmsk++;
data = 0;
/* either method below works well,
* but method 2 shows no lag
* and method 1 seems a bit wrong*/
#if 0
if (rop == ROP_XOR)
opr = mask ^ color;
else
opr = mask & color;
for (j = 0; j < 8; j++) {
if (opr & (0x80 >> j)) {
/* use fg color,id = 2 */
data |= 2 << (j*2);
} else {
/* use bg color,id = 1 */
data |= 1 << (j*2);
}
}
#else
for (j = 0; j < 8; j++) {
if (mask & (0x80>>j)) {
if (rop == ROP_XOR)
......@@ -160,15 +140,10 @@ void hw_cursor_setData(struct lynx_cursor *cursor,
data |= ((opr & (0x80>>j))?2:1)<<(j*2);
}
}
#endif
iowrite16(data, pbuffer);
/* assume pitch is 1,2,4,8,...*/
#if 0
if (!((i+1)&(pitch-1))) /* below line equal to is line */
#else
if ((i+1) % pitch == 0)
#endif
{
/* need a return */
pstart += offset;
......@@ -209,29 +184,10 @@ void hw_cursor_setData2(struct lynx_cursor *cursor,
mask = *pmsk++;
data = 0;
/* either method below works well, but method 2 shows no lag */
#if 0
if (rop == ROP_XOR)
opr = mask ^ color;
else
opr = mask & color;
for (j = 0; j < 8; j++) {
if (opr & (0x80 >> j)) {
/* use fg color,id = 2 */
data |= 2 << (j*2);
} else {
/* use bg color,id = 1 */
data |= 1 << (j*2);
}
}
#else
for (j = 0; j < 8; j++) {
if (mask & (1<<j))
data |= ((color & (1<<j))?1:2)<<(j*2);
}
#endif
iowrite16(data, pbuffer);
/* assume pitch is 1,2,4,8,...*/
......
drivers/staging/sm750fb/sm750_hw.c
View file @ 1282bade
......@@ -77,14 +77,6 @@ int hw_sm750_map(struct lynx_share *share, struct pci_dev *pdev)
share->vidmem_start, share->vidmem_size);
/* reserve the vidmem space of smi adaptor */
#if 0
ret = pci_request_region(pdev, 0, _moduleName_);
if (ret) {
pr_err("Can not request PCI regions.\n");
goto exit;
}
#endif
share->pvMem = ioremap_wc(share->vidmem_start, share->vidmem_size);
if (!share->pvMem) {
......@@ -124,12 +116,6 @@ int hw_sm750_inithw(struct lynx_share *share, struct pci_dev *pdev)
FIELD_SET(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, PCI_BURST, ON));
}
/* sm750 use sii164, it can be setup with default value
* by on power, so initDVIDisp can be skipped */
#if 0
ddk750_initDVIDisp();
#endif
if (getChipType() != SM750LE) {
/* does user need CRT ?*/
if (spec_share->state.nocrt) {
......
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