Commit 1873315f authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Brian Norris

mtd: sh_flctl: pass FIFO as physical address

By convention, the FIFO address we pass using dmaengine_slave_config
is a physical address in the form that is understood by the DMA
engine, as a dma_addr_t, phys_addr_t or resource_size_t.

The sh_flctl driver however passes a virtual __iomem address that
gets cast to dma_addr_t in the slave driver. This happens to work
on shmobile because that platform sets up an identity mapping for
its MMIO regions, but such code is not portable to other platforms,
and prevents us from ever changing the platform mapping or reusing
the driver on other architectures like ARM64 that might not have the
mapping.

We also get a warning about a type mismatch for the case that
dma_addr_t is wider than a pointer, i.e. when CONFIG_LPAE is set:

drivers/mtd/nand/sh_flctl.c: In function 'flctl_setup_dma':
drivers/mtd/nand/sh_flctl.c:163:17: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
  cfg.dst_addr = (dma_addr_t)FLDTFIFO(flctl);

This changes the driver to instead pass the physical address of
the FIFO that is extracted from the MMIO resource, making the
code more portable and avoiding the warning.
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
parent 0ed6ca3a
...@@ -160,7 +160,7 @@ static void flctl_setup_dma(struct sh_flctl *flctl) ...@@ -160,7 +160,7 @@ static void flctl_setup_dma(struct sh_flctl *flctl)
memset(&cfg, 0, sizeof(cfg)); memset(&cfg, 0, sizeof(cfg));
cfg.direction = DMA_MEM_TO_DEV; cfg.direction = DMA_MEM_TO_DEV;
cfg.dst_addr = (dma_addr_t)FLDTFIFO(flctl); cfg.dst_addr = flctl->fifo;
cfg.src_addr = 0; cfg.src_addr = 0;
ret = dmaengine_slave_config(flctl->chan_fifo0_tx, &cfg); ret = dmaengine_slave_config(flctl->chan_fifo0_tx, &cfg);
if (ret < 0) if (ret < 0)
...@@ -176,7 +176,7 @@ static void flctl_setup_dma(struct sh_flctl *flctl) ...@@ -176,7 +176,7 @@ static void flctl_setup_dma(struct sh_flctl *flctl)
cfg.direction = DMA_DEV_TO_MEM; cfg.direction = DMA_DEV_TO_MEM;
cfg.dst_addr = 0; cfg.dst_addr = 0;
cfg.src_addr = (dma_addr_t)FLDTFIFO(flctl); cfg.src_addr = flctl->fifo;
ret = dmaengine_slave_config(flctl->chan_fifo0_rx, &cfg); ret = dmaengine_slave_config(flctl->chan_fifo0_rx, &cfg);
if (ret < 0) if (ret < 0)
goto err; goto err;
...@@ -1095,6 +1095,7 @@ static int flctl_probe(struct platform_device *pdev) ...@@ -1095,6 +1095,7 @@ static int flctl_probe(struct platform_device *pdev)
flctl->reg = devm_ioremap_resource(&pdev->dev, res); flctl->reg = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(flctl->reg)) if (IS_ERR(flctl->reg))
return PTR_ERR(flctl->reg); return PTR_ERR(flctl->reg);
flctl->fifo = res->start + 0x24; /* FLDTFIFO */
irq = platform_get_irq(pdev, 0); irq = platform_get_irq(pdev, 0);
if (irq < 0) { if (irq < 0) {
......
...@@ -147,6 +147,7 @@ struct sh_flctl { ...@@ -147,6 +147,7 @@ struct sh_flctl {
struct platform_device *pdev; struct platform_device *pdev;
struct dev_pm_qos_request pm_qos; struct dev_pm_qos_request pm_qos;
void __iomem *reg; void __iomem *reg;
resource_size_t fifo;
uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */ uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */
int read_bytes; int read_bytes;
......
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