Commit 1a981c05 authored by Thierry Reding's avatar Thierry Reding Committed by David S. Miller

net: stmmac: Make MDIO bus reset optional

The Tegra EQOS driver already resets the MDIO bus at probe time via the
reset GPIO specified in the phy-reset-gpios device tree property. There
is no need to reset the bus again later on.

This avoids the need to query the device tree for the snps,reset GPIO,
which is not part of the Tegra EQOS device tree bindings. This quiesces
an error message from the generic bus reset code if it doesn't find the
snps,reset related delays.
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent f530eed6
...@@ -333,6 +333,9 @@ static void *tegra_eqos_probe(struct platform_device *pdev, ...@@ -333,6 +333,9 @@ static void *tegra_eqos_probe(struct platform_device *pdev,
usleep_range(2000, 4000); usleep_range(2000, 4000);
gpiod_set_value(eqos->reset, 0); gpiod_set_value(eqos->reset, 0);
/* MDIO bus was already reset just above */
data->mdio_bus_data->needs_reset = false;
eqos->rst = devm_reset_control_get(&pdev->dev, "eqos"); eqos->rst = devm_reset_control_get(&pdev->dev, "eqos");
if (IS_ERR(eqos->rst)) { if (IS_ERR(eqos->rst)) {
err = PTR_ERR(eqos->rst); err = PTR_ERR(eqos->rst);
......
...@@ -348,7 +348,9 @@ int stmmac_mdio_register(struct net_device *ndev) ...@@ -348,7 +348,9 @@ int stmmac_mdio_register(struct net_device *ndev)
max_addr = PHY_MAX_ADDR; max_addr = PHY_MAX_ADDR;
} }
new_bus->reset = &stmmac_mdio_reset; if (mdio_bus_data->needs_reset)
new_bus->reset = &stmmac_mdio_reset;
snprintf(new_bus->id, MII_BUS_ID_SIZE, "%s-%x", snprintf(new_bus->id, MII_BUS_ID_SIZE, "%s-%x",
new_bus->name, priv->plat->bus_id); new_bus->name, priv->plat->bus_id);
new_bus->priv = ndev; new_bus->priv = ndev;
......
...@@ -63,6 +63,7 @@ static void common_default_data(struct plat_stmmacenet_data *plat) ...@@ -63,6 +63,7 @@ static void common_default_data(struct plat_stmmacenet_data *plat)
plat->has_gmac = 1; plat->has_gmac = 1;
plat->force_sf_dma_mode = 1; plat->force_sf_dma_mode = 1;
plat->mdio_bus_data->needs_reset = true;
plat->mdio_bus_data->phy_mask = 0; plat->mdio_bus_data->phy_mask = 0;
/* Set default value for multicast hash bins */ /* Set default value for multicast hash bins */
......
...@@ -342,10 +342,16 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, ...@@ -342,10 +342,16 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
mdio = true; mdio = true;
} }
if (mdio) if (mdio) {
plat->mdio_bus_data = plat->mdio_bus_data =
devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data), devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data),
GFP_KERNEL); GFP_KERNEL);
if (!plat->mdio_bus_data)
return -ENOMEM;
plat->mdio_bus_data->needs_reset = true;
}
return 0; return 0;
} }
......
...@@ -81,6 +81,7 @@ struct stmmac_mdio_bus_data { ...@@ -81,6 +81,7 @@ struct stmmac_mdio_bus_data {
unsigned int phy_mask; unsigned int phy_mask;
int *irqs; int *irqs;
int probed_phy_irq; int probed_phy_irq;
bool needs_reset;
}; };
struct stmmac_dma_cfg { struct stmmac_dma_cfg {
......
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