Commit 1b167ba8 authored by Rander Wang's avatar Rander Wang Committed by Mark Brown

ASoC: SOF: Intel: tgl: unify core_put on IPC3 & IPC4 path

Firmware may do context saving before powering off primary core, so driver
needs to send ipc msg by set_core_state. In IPC4 path, firmware needs to
save current context to IMR before powering off primary core. Firmware
does nothing for set_core_state message in IPC3 path. So IPC4 and IPC3
can share the same operation sequence.
Signed-off-by: default avatarRander Wang <rander.wang@intel.com>
Reviewed-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: default avatarRanjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: default avatarPéter Ujfalusi <peter.ujfalusi@linux.intel.com>
Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@linux.intel.com>
Link: https://lore.kernel.org/r/20230523103217.20412-4-peter.ujfalusi@linux.intel.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent c6d15567
......@@ -39,14 +39,18 @@ static int tgl_dsp_core_get(struct snd_sof_dev *sdev, int core)
static int tgl_dsp_core_put(struct snd_sof_dev *sdev, int core)
{
const struct sof_ipc_pm_ops *pm_ops = sdev->ipc->ops->pm;
int ret;
if (pm_ops->set_core_state) {
ret = pm_ops->set_core_state(sdev, core, false);
if (ret < 0)
return ret;
}
/* power down primary core and return */
if (core == SOF_DSP_PRIMARY_CORE)
return hda_dsp_core_reset_power_down(sdev, BIT(core));
if (pm_ops->set_core_state)
return pm_ops->set_core_state(sdev, core, false);
return 0;
}
......
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