Commit 1b3f3685 authored by Lin Huang's avatar Lin Huang Committed by Heiko Stuebner

arm64: dts: rockchip: Add dfi and dmc nodes to rk3399

These are required to support DDR DVFS on RK3399 platforms.

Change since Daniel's posting: reordered by unit address, per existing
style
Signed-off-by: default avatarLin Huang <hl@rock-chips.com>
Signed-off-by: default avatarEnric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: default avatarGaël PORTAY <gael.portay@collabora.com>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: default avatarBrian Norris <briannorris@chromium.org>
Link: https://lore.kernel.org/r/20220308110825.v4.11.Ie97993621975c5463d7928a8646f3737c9f2921d@changeidSigned-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 14fc86b9
......@@ -178,6 +178,15 @@ display-subsystem {
ports = <&vopl_out>, <&vopb_out>;
};
dmc: memory-controller {
compatible = "rockchip,rk3399-dmc";
rockchip,pmu = <&pmugrf>;
devfreq-events = <&dfi>;
clocks = <&cru SCLK_DDRC>;
clock-names = "dmc_clk";
status = "disabled";
};
pmu_a53 {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster0>;
......@@ -1295,6 +1304,16 @@ pwm3: pwm@ff420030 {
status = "disabled";
};
dfi: dfi@ff630000 {
reg = <0x00 0xff630000 0x00 0x4000>;
compatible = "rockchip,rk3399-dfi";
rockchip,pmu = <&pmugrf>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_DDR_MON>;
clock-names = "pclk_ddr_mon";
status = "disabled";
};
vpu: video-codec@ff650000 {
compatible = "rockchip,rk3399-vpu";
reg = <0x0 0xff650000 0x0 0x800>;
......
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