Commit 1b50017d authored by Jason Gunthorpe's avatar Jason Gunthorpe Committed by Will Deacon

iommu/arm-smmu-v3: Remove arm_smmu_master->domain

Introducing global statics which are of type struct iommu_domain, not
struct arm_smmu_domain makes it difficult to retain
arm_smmu_master->domain, as it can no longer point to an IDENTITY or
BLOCKED domain.

The only place that uses the value is arm_smmu_detach_dev(). Change things
to work like other drivers and call iommu_get_domain_for_dev() to obtain
the current domain.

The master->domain is subtly protecting the master->domain_head against
being unused as only PAGING domains will set master->domain and only
paging domains use the master->domain_head. To make it simple keep the
master->domain_head initialized so that the list_del() logic just does
nothing for attached non-PAGING domains.
Tested-by: default avatarShameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Tested-by: default avatarNicolin Chen <nicolinc@nvidia.com>
Tested-by: default avatarMoritz Fischer <moritzf@google.com>
Reviewed-by: default avatarNicolin Chen <nicolinc@nvidia.com>
Reviewed-by: default avatarMostafa Saleh <smostafa@google.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/10-v6-96275f25c39d+2d4-smmuv3_newapi_p1_jgg@nvidia.comSigned-off-by: default avatarWill Deacon <will@kernel.org>
parent d550ddc5
...@@ -2507,19 +2507,20 @@ static void arm_smmu_disable_pasid(struct arm_smmu_master *master) ...@@ -2507,19 +2507,20 @@ static void arm_smmu_disable_pasid(struct arm_smmu_master *master)
static void arm_smmu_detach_dev(struct arm_smmu_master *master) static void arm_smmu_detach_dev(struct arm_smmu_master *master)
{ {
struct iommu_domain *domain = iommu_get_domain_for_dev(master->dev);
struct arm_smmu_domain *smmu_domain;
unsigned long flags; unsigned long flags;
struct arm_smmu_domain *smmu_domain = master->domain;
if (!smmu_domain) if (!domain)
return; return;
smmu_domain = to_smmu_domain(domain);
arm_smmu_disable_ats(master, smmu_domain); arm_smmu_disable_ats(master, smmu_domain);
spin_lock_irqsave(&smmu_domain->devices_lock, flags); spin_lock_irqsave(&smmu_domain->devices_lock, flags);
list_del(&master->domain_head); list_del_init(&master->domain_head);
spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
master->domain = NULL;
master->ats_enabled = false; master->ats_enabled = false;
} }
...@@ -2573,8 +2574,6 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) ...@@ -2573,8 +2574,6 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
arm_smmu_detach_dev(master); arm_smmu_detach_dev(master);
master->domain = smmu_domain;
/* /*
* The SMMU does not support enabling ATS with bypass. When the STE is * The SMMU does not support enabling ATS with bypass. When the STE is
* in bypass (STE.Config[2:0] == 0b100), ATS Translation Requests and * in bypass (STE.Config[2:0] == 0b100), ATS Translation Requests and
...@@ -2593,10 +2592,8 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) ...@@ -2593,10 +2592,8 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
case ARM_SMMU_DOMAIN_S1: case ARM_SMMU_DOMAIN_S1:
if (!master->cd_table.cdtab) { if (!master->cd_table.cdtab) {
ret = arm_smmu_alloc_cd_tables(master); ret = arm_smmu_alloc_cd_tables(master);
if (ret) { if (ret)
master->domain = NULL;
goto out_list_del; goto out_list_del;
}
} else { } else {
/* /*
* arm_smmu_write_ctx_desc() relies on the entry being * arm_smmu_write_ctx_desc() relies on the entry being
...@@ -2604,17 +2601,13 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) ...@@ -2604,17 +2601,13 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
*/ */
ret = arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID, ret = arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID,
NULL); NULL);
if (ret) { if (ret)
master->domain = NULL;
goto out_list_del; goto out_list_del;
}
} }
ret = arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID, &smmu_domain->cd); ret = arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID, &smmu_domain->cd);
if (ret) { if (ret)
master->domain = NULL;
goto out_list_del; goto out_list_del;
}
arm_smmu_make_cdtable_ste(&target, master); arm_smmu_make_cdtable_ste(&target, master);
arm_smmu_install_ste_for_dev(master, &target); arm_smmu_install_ste_for_dev(master, &target);
...@@ -2640,7 +2633,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) ...@@ -2640,7 +2633,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
out_list_del: out_list_del:
spin_lock_irqsave(&smmu_domain->devices_lock, flags); spin_lock_irqsave(&smmu_domain->devices_lock, flags);
list_del(&master->domain_head); list_del_init(&master->domain_head);
spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
out_unlock: out_unlock:
...@@ -2841,6 +2834,7 @@ static struct iommu_device *arm_smmu_probe_device(struct device *dev) ...@@ -2841,6 +2834,7 @@ static struct iommu_device *arm_smmu_probe_device(struct device *dev)
master->dev = dev; master->dev = dev;
master->smmu = smmu; master->smmu = smmu;
INIT_LIST_HEAD(&master->bonds); INIT_LIST_HEAD(&master->bonds);
INIT_LIST_HEAD(&master->domain_head);
dev_iommu_priv_set(dev, master); dev_iommu_priv_set(dev, master);
ret = arm_smmu_insert_master(smmu, master); ret = arm_smmu_insert_master(smmu, master);
......
...@@ -695,7 +695,6 @@ struct arm_smmu_stream { ...@@ -695,7 +695,6 @@ struct arm_smmu_stream {
struct arm_smmu_master { struct arm_smmu_master {
struct arm_smmu_device *smmu; struct arm_smmu_device *smmu;
struct device *dev; struct device *dev;
struct arm_smmu_domain *domain;
struct list_head domain_head; struct list_head domain_head;
struct arm_smmu_stream *streams; struct arm_smmu_stream *streams;
/* Locked by the iommu core using the group mutex */ /* Locked by the iommu core using the group mutex */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment