Commit 1b93a717 authored by Russell King's avatar Russell King Committed by Russell King

[ARM] Remove LOADREGS macro

As for RETINSTR, LOADREGS is a left-over from the 26-bit days.
Remove it.
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 7999d8d7
...@@ -77,7 +77,7 @@ Lrow4bpplp: ...@@ -77,7 +77,7 @@ Lrow4bpplp:
subne r1, r1, #1 subne r1, r1, #1
ldrneb r7, [r6, r1] ldrneb r7, [r6, r1]
bne Lrow4bpplp bne Lrow4bpplp
LOADREGS(fd, sp!, {r4 - r7, pc}) ldmfd sp!, {r4 - r7, pc}
@ @
@ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc) @ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc)
...@@ -105,7 +105,7 @@ Lrow8bpplp: ...@@ -105,7 +105,7 @@ Lrow8bpplp:
subne r1, r1, #1 subne r1, r1, #1
ldrneb r7, [r6, r1] ldrneb r7, [r6, r1]
bne Lrow8bpplp bne Lrow8bpplp
LOADREGS(fd, sp!, {r4 - r7, pc}) ldmfd sp!, {r4 - r7, pc}
@ @
@ Smashable regs: {r0 - r3}, [r4], {r5, r6}, [r7], (r8 - fp), [ip], (sp), [lr], (pc) @ Smashable regs: {r0 - r3}, [r4], {r5, r6}, [r7], (r8 - fp), [ip], (sp), [lr], (pc)
...@@ -127,7 +127,7 @@ Lrow1bpp: ...@@ -127,7 +127,7 @@ Lrow1bpp:
strb r7, [r0], r5 strb r7, [r0], r5
mov r7, r7, lsr #8 mov r7, r7, lsr #8
strb r7, [r0], r5 strb r7, [r0], r5
LOADREGS(fd, sp!, {r4 - r7, pc}) ldmfd sp!, {r4 - r7, pc}
.bss .bss
ENTRY(con_charconvtable) ENTRY(con_charconvtable)
......
...@@ -41,7 +41,7 @@ ENTRY(c_backtrace) ...@@ -41,7 +41,7 @@ ENTRY(c_backtrace)
movne r0, #0 movne r0, #0
movs frame, r0 movs frame, r0
1: moveq r0, #-2 1: moveq r0, #-2
LOADREGS(eqfd, sp!, {r4 - r8, pc}) ldmeqfd sp!, {r4 - r8, pc}
2: stmfd sp!, {pc} @ calculate offset of PC in STMIA instruction 2: stmfd sp!, {pc} @ calculate offset of PC in STMIA instruction
ldr r0, [sp], #4 ldr r0, [sp], #4
...@@ -85,7 +85,7 @@ ENTRY(c_backtrace) ...@@ -85,7 +85,7 @@ ENTRY(c_backtrace)
* A zero next framepointer means we're done. * A zero next framepointer means we're done.
*/ */
teq next, #0 teq next, #0
LOADREGS(eqfd, sp!, {r4 - r8, pc}) ldmeqfd sp!, {r4 - r8, pc}
/* /*
* The next framepointer must be above the * The next framepointer must be above the
...@@ -104,7 +104,7 @@ ENTRY(c_backtrace) ...@@ -104,7 +104,7 @@ ENTRY(c_backtrace)
1007: ldr r0, =.Lbad 1007: ldr r0, =.Lbad
mov r1, frame mov r1, frame
bl printk bl printk
LOADREGS(fd, sp!, {r4 - r8, pc}) ldmfd sp!, {r4 - r8, pc}
.ltorg .ltorg
.previous .previous
...@@ -145,7 +145,7 @@ ENTRY(c_backtrace) ...@@ -145,7 +145,7 @@ ENTRY(c_backtrace)
adrne r0, .Lcr adrne r0, .Lcr
blne printk blne printk
mov r0, stack mov r0, stack
LOADREGS(fd, sp!, {instr, reg, stack, r7, r8, pc}) ldmfd sp!, {instr, reg, stack, r7, r8, pc}
.Lfp: .asciz " r%d = %08X%c" .Lfp: .asciz " r%d = %08X%c"
.Lcr: .asciz "\n" .Lcr: .asciz "\n"
......
...@@ -43,10 +43,10 @@ USER( strnebt r2, [r0], #1) ...@@ -43,10 +43,10 @@ USER( strnebt r2, [r0], #1)
tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1 tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1
USER( strnebt r2, [r0], #1) USER( strnebt r2, [r0], #1)
mov r0, #0 mov r0, #0
LOADREGS(fd,sp!, {r1, pc}) ldmfd sp!, {r1, pc}
.section .fixup,"ax" .section .fixup,"ax"
.align 0 .align 0
9001: LOADREGS(fd,sp!, {r0, pc}) 9001: ldmfd sp!, {r0, pc}
.previous .previous
...@@ -43,4 +43,4 @@ ENTRY(copy_page) ...@@ -43,4 +43,4 @@ ENTRY(copy_page)
bgt 1b @ 1 bgt 1b @ 1
PLD( ldmeqia r1!, {r3, r4, ip, lr} ) PLD( ldmeqia r1!, {r3, r4, ip, lr} )
PLD( beq 2b ) PLD( beq 2b )
LOADREGS(fd, sp!, {r4, pc}) @ 3 ldmfd sp!, {r4, pc} @ 3
...@@ -28,5 +28,5 @@ ENTRY(__csum_ipv6_magic) ...@@ -28,5 +28,5 @@ ENTRY(__csum_ipv6_magic)
adcs r0, r0, r3 adcs r0, r0, r3
adcs r0, r0, r2 adcs r0, r0, r2
adcs r0, r0, #0 adcs r0, r0, #0
LOADREGS(fd, sp!, {pc}) ldmfd sp!, {pc}
...@@ -29,7 +29,7 @@ ENTRY(ecard_loader_read) ...@@ -29,7 +29,7 @@ ENTRY(ecard_loader_read)
CPSR2SPSR(r0) CPSR2SPSR(r0)
mov lr, pc mov lr, pc
mov pc, r2 mov pc, r2
LOADREGS(fd, sp!, {r4 - r12, pc}) ldmfd sp!, {r4 - r12, pc}
@ Purpose: call an expansion card loader to reset the card @ Purpose: call an expansion card loader to reset the card
@ Proto : void read_loader(int card_base, char *loader); @ Proto : void read_loader(int card_base, char *loader);
...@@ -41,5 +41,5 @@ ENTRY(ecard_loader_reset) ...@@ -41,5 +41,5 @@ ENTRY(ecard_loader_reset)
CPSR2SPSR(r0) CPSR2SPSR(r0)
mov lr, pc mov lr, pc
add pc, r1, #8 add pc, r1, #8
LOADREGS(fd, sp!, {r4 - r12, pc}) ldmfd sp!, {r4 - r12, pc}
...@@ -72,7 +72,7 @@ ENTRY(__raw_readsb) ...@@ -72,7 +72,7 @@ ENTRY(__raw_readsb)
bpl .Linsb_16_lp bpl .Linsb_16_lp
tst r2, #15 tst r2, #15
LOADREGS(eqfd, sp!, {r4 - r6, pc}) ldmeqfd sp!, {r4 - r6, pc}
.Linsb_no_16: tst r2, #8 .Linsb_no_16: tst r2, #8
beq .Linsb_no_8 beq .Linsb_no_8
...@@ -109,7 +109,7 @@ ENTRY(__raw_readsb) ...@@ -109,7 +109,7 @@ ENTRY(__raw_readsb)
str r3, [r1], #4 str r3, [r1], #4
.Linsb_no_4: ands r2, r2, #3 .Linsb_no_4: ands r2, r2, #3
LOADREGS(eqfd, sp!, {r4 - r6, pc}) ldmeqfd sp!, {r4 - r6, pc}
cmp r2, #2 cmp r2, #2
ldrb r3, [r0] ldrb r3, [r0]
...@@ -119,4 +119,4 @@ ENTRY(__raw_readsb) ...@@ -119,4 +119,4 @@ ENTRY(__raw_readsb)
ldrgtb r3, [r0] ldrgtb r3, [r0]
strgtb r3, [r1] strgtb r3, [r1]
LOADREGS(fd, sp!, {r4 - r6, pc}) ldmfd sp!, {r4 - r6, pc}
...@@ -69,7 +69,7 @@ ENTRY(__raw_readsw) ...@@ -69,7 +69,7 @@ ENTRY(__raw_readsw)
bpl .Linsw_8_lp bpl .Linsw_8_lp
tst r2, #7 tst r2, #7
LOADREGS(eqfd, sp!, {r4, r5, r6, pc}) ldmeqfd sp!, {r4, r5, r6, pc}
.Lno_insw_8: tst r2, #4 .Lno_insw_8: tst r2, #4
beq .Lno_insw_4 beq .Lno_insw_4
...@@ -102,6 +102,6 @@ ENTRY(__raw_readsw) ...@@ -102,6 +102,6 @@ ENTRY(__raw_readsw)
movne r3, r3, lsr #8 movne r3, r3, lsr #8
strneb r3, [r1] strneb r3, [r1]
LOADREGS(fd, sp!, {r4, r5, r6, pc}) ldmfd sp!, {r4, r5, r6, pc}
...@@ -64,7 +64,7 @@ ENTRY(__raw_writesb) ...@@ -64,7 +64,7 @@ ENTRY(__raw_writesb)
bpl .Loutsb_16_lp bpl .Loutsb_16_lp
tst r2, #15 tst r2, #15
LOADREGS(eqfd, sp!, {r4, r5, pc}) ldmeqfd sp!, {r4, r5, pc}
.Loutsb_no_16: tst r2, #8 .Loutsb_no_16: tst r2, #8
beq .Loutsb_no_8 beq .Loutsb_no_8
...@@ -80,7 +80,7 @@ ENTRY(__raw_writesb) ...@@ -80,7 +80,7 @@ ENTRY(__raw_writesb)
outword r3 outword r3
.Loutsb_no_4: ands r2, r2, #3 .Loutsb_no_4: ands r2, r2, #3
LOADREGS(eqfd, sp!, {r4, r5, pc}) ldmeqfd sp!, {r4, r5, pc}
cmp r2, #2 cmp r2, #2
ldrb r3, [r1], #1 ldrb r3, [r1], #1
...@@ -90,4 +90,4 @@ ENTRY(__raw_writesb) ...@@ -90,4 +90,4 @@ ENTRY(__raw_writesb)
ldrgtb r3, [r1] ldrgtb r3, [r1]
strgtb r3, [r0] strgtb r3, [r0]
LOADREGS(fd, sp!, {r4, r5, pc}) ldmfd sp!, {r4, r5, pc}
...@@ -80,7 +80,7 @@ ENTRY(__raw_writesw) ...@@ -80,7 +80,7 @@ ENTRY(__raw_writesw)
bpl .Loutsw_8_lp bpl .Loutsw_8_lp
tst r2, #7 tst r2, #7
LOADREGS(eqfd, sp!, {r4, r5, r6, pc}) ldmeqfd sp!, {r4, r5, r6, pc}
.Lno_outsw_8: tst r2, #4 .Lno_outsw_8: tst r2, #4
beq .Lno_outsw_4 beq .Lno_outsw_4
...@@ -124,4 +124,4 @@ ENTRY(__raw_writesw) ...@@ -124,4 +124,4 @@ ENTRY(__raw_writesw)
orrne ip, ip, ip, lsr #16 orrne ip, ip, ip, lsr #16
strne ip, [r0] strne ip, [r0]
LOADREGS(fd, sp!, {r4, r5, r6, pc}) ldmfd sp!, {r4, r5, r6, pc}
...@@ -53,7 +53,7 @@ ENTRY(memset) ...@@ -53,7 +53,7 @@ ENTRY(memset)
stmgeia r0!, {r1, r3, ip, lr} stmgeia r0!, {r1, r3, ip, lr}
stmgeia r0!, {r1, r3, ip, lr} stmgeia r0!, {r1, r3, ip, lr}
bgt 2b bgt 2b
LOADREGS(eqfd, sp!, {pc}) @ Now <64 bytes to go. ldmeqfd sp!, {pc} @ Now <64 bytes to go.
/* /*
* No need to correct the count; we're only testing bits from now on * No need to correct the count; we're only testing bits from now on
*/ */
......
...@@ -53,7 +53,7 @@ ENTRY(__memzero) ...@@ -53,7 +53,7 @@ ENTRY(__memzero)
stmgeia r0!, {r2, r3, ip, lr} @ 4 stmgeia r0!, {r2, r3, ip, lr} @ 4
stmgeia r0!, {r2, r3, ip, lr} @ 4 stmgeia r0!, {r2, r3, ip, lr} @ 4
bgt 3b @ 1 bgt 3b @ 1
LOADREGS(eqfd, sp!, {pc}) @ 1/2 quick exit ldmeqfd sp!, {pc} @ 1/2 quick exit
/* /*
* No need to correct the count; we're only testing bits from now on * No need to correct the count; we're only testing bits from now on
*/ */
......
...@@ -105,7 +105,7 @@ USER( strgtbt r3, [r0], #1) @ May fault ...@@ -105,7 +105,7 @@ USER( strgtbt r3, [r0], #1) @ May fault
movs ip, r2 movs ip, r2
bne .Lc2u_nowords bne .Lc2u_nowords
.Lc2u_finished: mov r0, #0 .Lc2u_finished: mov r0, #0
LOADREGS(fd,sp!,{r2, r4 - r7, pc}) ldmfd sp!, {r2, r4 - r7, pc}
.Lc2u_src_not_aligned: .Lc2u_src_not_aligned:
bic r1, r1, #3 bic r1, r1, #3
...@@ -280,7 +280,7 @@ USER( strgtbt r3, [r0], #1) @ May fault ...@@ -280,7 +280,7 @@ USER( strgtbt r3, [r0], #1) @ May fault
.section .fixup,"ax" .section .fixup,"ax"
.align 0 .align 0
9001: LOADREGS(fd,sp!, {r0, r4 - r7, pc}) 9001: ldmfd sp!, {r0, r4 - r7, pc}
.previous .previous
/* Prototype: unsigned long __arch_copy_from_user(void *to,const void *from,unsigned long n); /* Prototype: unsigned long __arch_copy_from_user(void *to,const void *from,unsigned long n);
...@@ -369,7 +369,7 @@ USER( ldrgtbt r3, [r1], #1) @ May fault ...@@ -369,7 +369,7 @@ USER( ldrgtbt r3, [r1], #1) @ May fault
bne .Lcfu_nowords bne .Lcfu_nowords
.Lcfu_finished: mov r0, #0 .Lcfu_finished: mov r0, #0
add sp, sp, #8 add sp, sp, #8
LOADREGS(fd,sp!,{r4 - r7, pc}) ldmfd sp!, {r4 - r7, pc}
.Lcfu_src_not_aligned: .Lcfu_src_not_aligned:
bic r1, r1, #3 bic r1, r1, #3
...@@ -556,6 +556,6 @@ USER( ldrgtbt r3, [r1], #1) @ May fault ...@@ -556,6 +556,6 @@ USER( ldrgtbt r3, [r1], #1) @ May fault
movne r1, r4 movne r1, r4
blne __memzero blne __memzero
mov r0, r4 mov r0, r4
LOADREGS(fd,sp!, {r4 - r7, pc}) ldmfd sp!, {r4 - r7, pc}
.previous .previous
...@@ -35,7 +35,7 @@ ENTRY(v3_copy_user_page) ...@@ -35,7 +35,7 @@ ENTRY(v3_copy_user_page)
stmia r0!, {r3, r4, ip, lr} @ 4 stmia r0!, {r3, r4, ip, lr} @ 4
ldmneia r1!, {r3, r4, ip, lr} @ 4 ldmneia r1!, {r3, r4, ip, lr} @ 4
bne 1b @ 1 bne 1b @ 1
LOADREGS(fd, sp!, {r4, pc}) @ 3 ldmfd sp!, {r4, pc} @ 3
.align 5 .align 5
/* /*
......
...@@ -62,17 +62,6 @@ ...@@ -62,17 +62,6 @@
#define DEFAULT_FIQ MODE_FIQ #define DEFAULT_FIQ MODE_FIQ
/*
* LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc})
*/
#ifdef __STDC__
#define LOADREGS(cond, base, reglist...)\
ldm##cond base,reglist
#else
#define LOADREGS(cond, base, reglist...)\
ldm/**/cond base,reglist
#endif
/* /*
* Enable and disable interrupts * Enable and disable interrupts
*/ */
......
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