Commit 1e5df24b authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Rob Clark

drm/msm/dpu: drop length from struct dpu_hw_blk_reg_map

We (nearly) do not use the length field from struct dpu_hw_blk_reg_map,
so we can drop it safely.
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/488013/
Link: https://lore.kernel.org/r/20220601161349.1517667-3-dmitry.baryshkov@linaro.orgSigned-off-by: default avatarRob Clark <robdclark@chromium.org>
parent d352d6d5
......@@ -60,7 +60,6 @@ static const struct dpu_ctl_cfg *_ctl_offset(enum dpu_ctl ctl,
if (ctl == m->ctl[i].id) {
b->base_off = addr;
b->blk_off = m->ctl[i].base;
b->length = m->ctl[i].len;
b->log_mask = DPU_DBG_MASK_CTL;
return &m->ctl[i];
}
......
......@@ -168,7 +168,6 @@ static struct dpu_dsc_cfg *_dsc_offset(enum dpu_dsc dsc,
if (dsc == m->dsc[i].id) {
b->base_off = addr;
b->blk_off = m->dsc[i].base;
b->length = m->dsc[i].len;
b->log_mask = DPU_DBG_MASK_DSC;
return &m->dsc[i];
}
......
......@@ -82,7 +82,6 @@ static const struct dpu_dspp_cfg *_dspp_offset(enum dpu_dspp dspp,
if (dspp == m->dspp[i].id) {
b->base_off = addr;
b->blk_off = m->dspp[i].base;
b->length = m->dspp[i].len;
b->log_mask = DPU_DBG_MASK_DSPP;
return &m->dspp[i];
}
......
......@@ -84,7 +84,6 @@ static const struct dpu_intf_cfg *_intf_offset(enum dpu_intf intf,
(m->intf[i].type != INTF_NONE)) {
b->base_off = addr;
b->blk_off = m->intf[i].base;
b->length = m->intf[i].len;
b->log_mask = DPU_DBG_MASK_INTF;
return &m->intf[i];
}
......
......@@ -41,7 +41,6 @@ static const struct dpu_lm_cfg *_lm_offset(enum dpu_lm mixer,
if (mixer == m->mixer[i].id) {
b->base_off = addr;
b->blk_off = m->mixer[i].base;
b->length = m->mixer[i].len;
b->log_mask = DPU_DBG_MASK_LM;
return &m->mixer[i];
}
......
......@@ -25,7 +25,6 @@ static const struct dpu_merge_3d_cfg *_merge_3d_offset(enum dpu_merge_3d idx,
if (idx == m->merge_3d[i].id) {
b->base_off = addr;
b->blk_off = m->merge_3d[i].base;
b->length = m->merge_3d[i].len;
b->log_mask = DPU_DBG_MASK_PINGPONG;
return &m->merge_3d[i];
}
......
......@@ -53,7 +53,6 @@ static const struct dpu_pingpong_cfg *_pingpong_offset(enum dpu_pingpong pp,
if (pp == m->pingpong[i].id) {
b->base_off = addr;
b->blk_off = m->pingpong[i].base;
b->length = m->pingpong[i].len;
b->log_mask = DPU_DBG_MASK_PINGPONG;
return &m->pingpong[i];
}
......
......@@ -771,7 +771,6 @@ static const struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp,
if (sspp == catalog->sspp[i].id) {
b->base_off = addr;
b->blk_off = catalog->sspp[i].base;
b->length = catalog->sspp[i].len;
b->log_mask = DPU_DBG_MASK_SSPP;
return &catalog->sspp[i];
}
......
......@@ -287,7 +287,6 @@ static const struct dpu_mdp_cfg *_top_offset(enum dpu_mdp mdp,
if (mdp == m->mdp[i].id) {
b->base_off = addr;
b->blk_off = m->mdp[i].base;
b->length = m->mdp[i].len;
b->log_mask = DPU_DBG_MASK_TOP;
return &m->mdp[i];
}
......
......@@ -25,12 +25,10 @@
* absoulute IO address
* @base_off: mdp register mapped offset
* @blk_off: pipe offset relative to mdss offset
* @length length of register block offset
*/
struct dpu_hw_blk_reg_map {
void __iomem *base_off;
u32 blk_off;
u32 length;
u32 log_mask;
};
......
......@@ -222,7 +222,6 @@ static const struct dpu_vbif_cfg *_top_offset(enum dpu_vbif vbif,
if (vbif == m->vbif[i].id) {
b->base_off = addr;
b->blk_off = m->vbif[i].base;
b->length = m->vbif[i].len;
b->log_mask = DPU_DBG_MASK_VBIF;
return &m->vbif[i];
}
......
......@@ -62,7 +62,6 @@ static const struct dpu_wb_cfg *_wb_offset(enum dpu_wb wb,
if (wb == m->wb[i].id) {
b->base_off = addr;
b->blk_off = m->wb[i].base;
b->length = m->wb[i].len;
return &m->wb[i];
}
}
......
......@@ -945,7 +945,7 @@ static void dpu_kms_mdp_snapshot(struct msm_disp_state *disp_state, struct msm_k
msm_disp_snapshot_add_block(disp_state, cat->wb[i].len,
dpu_kms->mmio + cat->wb[i].base, "wb_%d", i);
msm_disp_snapshot_add_block(disp_state, top->hw.length,
msm_disp_snapshot_add_block(disp_state, cat->mdp[0].len,
dpu_kms->mmio + top->hw.blk_off, "top");
pm_runtime_put_sync(&dpu_kms->pdev->dev);
......
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