Commit 1f8a25d4 authored by Anton Vorontsov's avatar Anton Vorontsov Committed by Kumar Gala

powerpc/83xx: Add power management support for MPC83xx QE boards

Simply add power management controller nodes and sleep properties.
Signed-off-by: default avatarAnton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: default avatarScott Wood <scottwood@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 8c68e2f7
......@@ -59,6 +59,13 @@ soc8360@e0000000 {
reg = <0xe0000000 0x00000200>;
bus-frequency = <0>; /* Filled in by U-Boot */
pmc: power@b00 {
compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
reg = <0xb00 0x100 0xa00 0x100>;
interrupts = <80 0x8>;
interrupt-parent = <&ipic>;
};
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
......
......@@ -79,6 +79,13 @@ wdt@200 {
reg = <0x200 0x100>;
};
pmc: power@b00 {
compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc";
reg = <0xb00 0x100 0xa00 0x100>;
interrupts = <80 0x8>;
interrupt-parent = <&ipic>;
};
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
......@@ -163,6 +170,7 @@ crypto@30000 {
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x4c>;
fsl,descriptor-types-mask = <0x0122003f>;
sleep = <&pmc 0x03000000>;
};
ipic: pic@700 {
......@@ -428,5 +436,6 @@ pci0: pci@e0008500 {
0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
sleep = <&pmc 0x00010000>;
};
};
......@@ -62,6 +62,13 @@ wdt@200 {
reg = <0x200 0x100>;
};
pmc: power@b00 {
compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc";
reg = <0xb00 0x100 0xa00 0x100>;
interrupts = <80 0x8>;
interrupt-parent = <&ipic>;
};
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
......@@ -141,6 +148,7 @@ crypto@30000 {
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x4c>;
fsl,descriptor-types-mask = <0x0122003f>;
sleep = <&pmc 0x03000000>;
};
ipic:pic@700 {
......@@ -360,5 +368,6 @@ pci0: pci@e0008500 {
0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
sleep = <&pmc 0x00010000>;
};
};
......@@ -99,6 +99,13 @@ wdt@200 {
reg = <0x200 0x100>;
};
pmc: power@b00 {
compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
reg = <0xb00 0x100 0xa00 0x100>;
interrupts = <80 0x8>;
interrupt-parent = <&ipic>;
};
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
......@@ -194,6 +201,7 @@ crypto@30000 {
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x7e>;
fsl,descriptor-types-mask = <0x01010ebf>;
sleep = <&pmc 0x03000000>;
};
ipic: pic@700 {
......@@ -470,5 +478,6 @@ pci0: pci@e0008500 {
0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
sleep = <&pmc 0x00010000>;
};
};
......@@ -71,6 +71,13 @@ wdt@200 {
reg = <0x200 0x100>;
};
pmc: power@b00 {
compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
reg = <0xb00 0x100 0xa00 0x100>;
interrupts = <80 0x8>;
interrupt-parent = <&ipic>;
};
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
......@@ -161,6 +168,7 @@ crypto@30000 {
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x7e>;
fsl,descriptor-types-mask = <0x01010ebf>;
sleep = <&pmc 0x03000000>;
};
ipic: interrupt-controller@700 {
......@@ -455,6 +463,7 @@ pci0: pci@e0008500 {
0xa800 0 0 2 &ipic 20 8
0xa800 0 0 3 &ipic 21 8
0xa800 0 0 4 &ipic 18 8>;
sleep = <&pmc 0x00010000>;
/* filled by u-boot */
bus-range = <0 0>;
clock-frequency = <0>;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment