[PATCH] fix cache settings for m68knommu 5407 CLEOPATRA target

Correct the wrong cache setup used on the CLEOPATRA 5407 based board.
Specifically it enables precise exception mode and write buffering.

Original patch from Alessendra Rubini.

arch/m68knommu/platform/5407/CLEOPATRA/crt0_ram.S

@@ -118,8 +118,8 @@ _start:
 	move.l #(0x00<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_CP,%d0
    movec  %d0,%ACR3
  
-   /* Enable cache */
-	move.l	#0x86088400, %d0
+	/* Enable cache */
+	move.l	#0xa4098400, %d0		/* Write buffer, dflt precise */
 	movec	%d0,%CACR
 	nop