Commit 22283c82 authored by Linus Torvalds's avatar Linus Torvalds

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc

Pull sparc fixes from David Miller:

 1) Some command cases of semtimedop() not even handled due to miscoded
    comparison on sparc64.  From Rob Gardner.

 2) Due to two bugs, /proc/kcore wan't working properly on sparc.

 3) Make sure fatal traps stop all running cpus, from Dave Kleikamp.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
  sparc: Fix /proc/kcore
  sparc: semtimedop() unreachable due to comparison error
  sparc: io_64.h: Replace io function-link macros
  sparc64: fatal trap should stop all cpus
  arch: sparc: kernel: starfire.c: Remove unused function
  arch: sparc: kernel: traps_64.c: Remove some unused functions
parents 47226fe1 3c08158e
......@@ -86,6 +86,9 @@ config ARCH_DEFCONFIG
default "arch/sparc/configs/sparc32_defconfig" if SPARC32
default "arch/sparc/configs/sparc64_defconfig" if SPARC64
config ARCH_PROC_KCORE_TEXT
def_bool y
config IOMMU_HELPER
bool
default y if SPARC64
......
......@@ -407,16 +407,16 @@ static inline void iounmap(volatile void __iomem *addr)
{
}
#define ioread8(X) readb(X)
#define ioread16(X) readw(X)
#define ioread16be(X) __raw_readw(X)
#define ioread32(X) readl(X)
#define ioread32be(X) __raw_readl(X)
#define iowrite8(val,X) writeb(val,X)
#define iowrite16(val,X) writew(val,X)
#define iowrite16be(val,X) __raw_writew(val,X)
#define iowrite32(val,X) writel(val,X)
#define iowrite32be(val,X) __raw_writel(val,X)
#define ioread8 readb
#define ioread16 readw
#define ioread16be __raw_readw
#define ioread32 readl
#define ioread32be __raw_readl
#define iowrite8 writeb
#define iowrite16 writew
#define iowrite16be __raw_writew
#define iowrite32 writel
#define iowrite32be __raw_writel
/* Create a virtual mapping cookie for an IO port range */
void __iomem *ioport_map(unsigned long port, unsigned int nr);
......
......@@ -12,7 +12,6 @@
extern int this_is_starfire;
void check_if_starfire(void);
int starfire_hard_smp_processor_id(void);
void starfire_hookup(int);
unsigned int starfire_translate(unsigned long imap, unsigned int upaid);
......
......@@ -98,11 +98,7 @@ void sun4v_do_mna(struct pt_regs *regs,
void do_privop(struct pt_regs *regs);
void do_privact(struct pt_regs *regs);
void do_cee(struct pt_regs *regs);
void do_cee_tl1(struct pt_regs *regs);
void do_dae_tl1(struct pt_regs *regs);
void do_iae_tl1(struct pt_regs *regs);
void do_div0_tl1(struct pt_regs *regs);
void do_fpdis_tl1(struct pt_regs *regs);
void do_fpieee_tl1(struct pt_regs *regs);
void do_fpother_tl1(struct pt_regs *regs);
void do_ill_tl1(struct pt_regs *regs);
......
......@@ -1406,11 +1406,32 @@ void __irq_entry smp_receive_signal_client(int irq, struct pt_regs *regs)
scheduler_ipi();
}
/* This is a nop because we capture all other cpus
* anyways when making the PROM active.
*/
static void stop_this_cpu(void *dummy)
{
prom_stopself();
}
void smp_send_stop(void)
{
int cpu;
if (tlb_type == hypervisor) {
for_each_online_cpu(cpu) {
if (cpu == smp_processor_id())
continue;
#ifdef CONFIG_SUN_LDOMS
if (ldom_domaining_enabled) {
unsigned long hv_err;
hv_err = sun4v_cpu_stop(cpu);
if (hv_err)
printk(KERN_ERR "sun4v_cpu_stop() "
"failed err=%lu\n", hv_err);
} else
#endif
prom_stopcpu_cpuid(cpu);
}
} else
smp_call_function(stop_this_cpu, NULL, 0);
}
/**
......
......@@ -28,11 +28,6 @@ void check_if_starfire(void)
this_is_starfire = 1;
}
int starfire_hard_smp_processor_id(void)
{
return upa_readl(0x1fff40000d0UL);
}
/*
* Each Starfire board has 32 registers which perform translation
* and delivery of traditional interrupt packets into the extended
......
......@@ -333,7 +333,7 @@ SYSCALL_DEFINE6(sparc_ipc, unsigned int, call, int, first, unsigned long, second
long err;
/* No need for backward compatibility. We can start fresh... */
if (call <= SEMCTL) {
if (call <= SEMTIMEDOP) {
switch (call) {
case SEMOP:
err = sys_semtimedop(first, ptr,
......
......@@ -2427,6 +2427,8 @@ void __noreturn die_if_kernel(char *str, struct pt_regs *regs)
}
user_instruction_dump ((unsigned int __user *) regs->tpc);
}
if (panic_on_oops)
panic("Fatal exception");
if (regs->tstate & TSTATE_PRIV)
do_exit(SIGKILL);
do_exit(SIGSEGV);
......@@ -2564,27 +2566,6 @@ void do_cee(struct pt_regs *regs)
die_if_kernel("TL0: Cache Error Exception", regs);
}
void do_cee_tl1(struct pt_regs *regs)
{
exception_enter();
dump_tl1_traplog((struct tl1_traplog *)(regs + 1));
die_if_kernel("TL1: Cache Error Exception", regs);
}
void do_dae_tl1(struct pt_regs *regs)
{
exception_enter();
dump_tl1_traplog((struct tl1_traplog *)(regs + 1));
die_if_kernel("TL1: Data Access Exception", regs);
}
void do_iae_tl1(struct pt_regs *regs)
{
exception_enter();
dump_tl1_traplog((struct tl1_traplog *)(regs + 1));
die_if_kernel("TL1: Instruction Access Exception", regs);
}
void do_div0_tl1(struct pt_regs *regs)
{
exception_enter();
......@@ -2592,13 +2573,6 @@ void do_div0_tl1(struct pt_regs *regs)
die_if_kernel("TL1: DIV0 Exception", regs);
}
void do_fpdis_tl1(struct pt_regs *regs)
{
exception_enter();
dump_tl1_traplog((struct tl1_traplog *)(regs + 1));
die_if_kernel("TL1: FPU Disabled", regs);
}
void do_fpieee_tl1(struct pt_regs *regs)
{
exception_enter();
......
......@@ -2820,7 +2820,7 @@ static int __init report_memory(void)
return 0;
}
device_initcall(report_memory);
arch_initcall(report_memory);
#ifdef CONFIG_SMP
#define do_flush_tlb_kernel_range smp_flush_tlb_kernel_range
......
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