Commit 25bd9d5e authored by Shawn Guo's avatar Shawn Guo

arm64: dts: zte: add vou and hdmi devices for zx296718

It adds VOU DPC device and enables HDMI support, which includes both
display and audio through SPDIF interface.
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 25798d52
...@@ -57,16 +57,36 @@ memory@40000000 { ...@@ -57,16 +57,36 @@ memory@40000000 {
reg = <0x40000000 0x40000000>; reg = <0x40000000 0x40000000>;
}; };
sound0 {
compatible = "simple-audio-card";
simple-audio-card,name = "zx_snd_spdif0";
simple-audio-card,cpu {
sound-dai = <&spdif0>;
};
simple-audio-card,codec {
sound-dai = <&hdmi>;
};
};
}; };
&emmc { &emmc {
status = "okay"; status = "okay";
}; };
&hdmi {
status = "okay";
};
&sd1 { &sd1 {
status = "okay"; status = "okay";
}; };
&spdif0 {
status = "okay";
};
&uart0 { &uart0 {
status = "okay"; status = "okay";
}; };
...@@ -366,6 +366,40 @@ lsp1crm: clock-controller@1430000 { ...@@ -366,6 +366,40 @@ lsp1crm: clock-controller@1430000 {
#clock-cells = <1>; #clock-cells = <1>;
}; };
vou: vou@1440000 {
compatible = "zte,zx296718-vou";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x1440000 0x10000>;
dpc: dpc@0 {
compatible = "zte,zx296718-dpc";
reg = <0x0000 0x1000>, <0x1000 0x1000>,
<0x5000 0x1000>, <0x6000 0x1000>,
<0xa000 0x1000>;
reg-names = "osd", "timing_ctrl",
"dtrc", "vou_ctrl",
"otfppu";
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&topcrm VOU_ACLK>, <&topcrm VOU_PPU_WCLK>,
<&topcrm VOU_MAIN_WCLK>, <&topcrm VOU_AUX_WCLK>;
clock-names = "aclk", "ppu_wclk",
"main_wclk", "aux_wclk";
};
hdmi: hdmi@c000 {
compatible = "zte,zx296718-hdmi";
reg = <0xc000 0x4000>;
interrupts = <GIC_SPI 82 IRQ_TYPE_EDGE_RISING>;
clocks = <&topcrm HDMI_OSC_CEC>,
<&topcrm HDMI_OSC_CLK>,
<&topcrm HDMI_XCLK>;
clock-names = "osc_cec", "osc_clk", "xclk";
#sound-dai-cells = <0>;
status = "disabled";
};
};
topcrm: clock-controller@1461000 { topcrm: clock-controller@1461000 {
compatible = "zte,zx296718-topcrm"; compatible = "zte,zx296718-topcrm";
reg = <0x01461000 0x1000>; reg = <0x01461000 0x1000>;
...@@ -403,5 +437,17 @@ audiocrm: clock-controller@1480000 { ...@@ -403,5 +437,17 @@ audiocrm: clock-controller@1480000 {
reg = <0x01480000 0x1000>; reg = <0x01480000 0x1000>;
#clock-cells = <1>; #clock-cells = <1>;
}; };
spdif0: spdif@1488000 {
compatible = "zte,zx296702-spdif";
reg = <0x1488000 0x1000>;
clocks = <&audiocrm AUDIO_SPDIF0_WCLK>;
clock-names = "tx";
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
#sound-dai-cells = <0>;
dmas = <&dma 30>;
dma-names = "tx";
status = "disabled";
};
}; };
}; };
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