drm/nouveau/mmu: remove support for old backends

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h

@@ -23,7 +23,6 @@
 #define NV_MEM_COMP_VM 0x03
 
 struct nvkm_mem {
-	struct nvkm_mm_node *tag;
 	struct nvkm_mm_node *mem;
 	dma_addr_t *pages;
 	u32 memtype;

drivers/gpu/drm/nouveau/include/nvkm/subdev/mmu.h

@@ -39,9 +39,6 @@ struct nvkm_vm {
 
 	struct nvkm_mm mm;
 	struct kref refcount;
-	struct nvkm_vm_pgt *pgt;
-	u32 fpde;
-	u32 lpde;
 
 	bool bootstrapped;
 	atomic_t engref[NVKM_SUBDEV_NR];

drivers/gpu/drm/nouveau/nouveau_mem.c

@@ -23,8 +23,6 @@
 #include "nouveau_drv.h"
 #include "nouveau_bo.h"
 
-#include <subdev/ltc.h>
-
 #include <drm/ttm/ttm_bo_driver.h>
 
 int
@@ -46,8 +44,6 @@ nouveau_mem_fini(struct nouveau_mem *mem)
 		nvkm_vm_unmap(&mem->vma[0]);
 		nvkm_vm_put(&mem->vma[0]);
 	}
-	nvkm_memory_tags_put(&mem->memory, nvxx_device(&mem->cli->device),
-			     &mem->tags);
 }
 
 int
@@ -112,32 +108,6 @@ nouveau_mem_vram(struct ttm_mem_reg *reg, bool contig, u8 page)
 
 	mem->_mem->size = size >> NVKM_RAM_MM_SHIFT;
 	mem->_mem->offset = nvkm_memory_addr(mem->_mem->memory);
-
-	if (cli->device.info.chipset < 0xc0 && mem->comp) {
-		if (page == 16) {
-			ret = nvkm_memory_tags_get(mem->_mem->memory, device,
-						   size >> page, NULL,
-						   &mem->tags);
-			WARN_ON(ret);
-		}
-		if (!mem->tags || !mem->tags->mn)
-			mem->comp = 0;
-	} else
-	if (cli->device.info.chipset >= 0xc0 &&
-	    gf100_pte_storage_type_map[mem->kind] != mem->kind) {
-		if (page == 17) {
-			ret = nvkm_memory_tags_get(mem->_mem->memory, device,
-						   size >> page,
-						   nvkm_ltc_tags_clear,
-						   &mem->tags);
-			WARN_ON(ret);
-		}
-		if (!mem->tags || !mem->tags->mn)
-			mem->kind = gf100_pte_storage_type_map[mem->kind];
-	}
-
-	if (mem->tags && mem->tags->mn)
-		mem->_mem->tag = mem->tags->mn;
 	mem->_mem->mem = ((struct nvkm_vram *)mem->_mem->memory)->mn;
 	mem->_mem->memtype = (mem->comp << 7) | mem->kind;
 

drivers/gpu/drm/nouveau/nouveau_mem.h

@@ -25,7 +25,6 @@ struct nouveau_mem {
 	struct nvkm_vma bar_vma;
 
 	struct nvkm_memory memory;
-	struct nvkm_tags *tags;
 };
 
 enum nvif_vmm_get {

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/g84.c

@@ -27,8 +27,6 @@ static const struct nvkm_mmu_func
 g84_mmu = {
 	.limit = (1ULL << 40),
 	.dma_bits = 40,
-	.pgt_bits  = 29 - 12,
-	.spg_shift = 12,
 	.lpg_shift = 16,
 	.vmm = {{ -1, -1, NVIF_CLASS_VMM_NV50}, nv50_vmm_new, false, 0x0200 },
 	.kind = nv50_mmu_kind,

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c

@@ -75,8 +75,6 @@ static const struct nvkm_mmu_func
 gf100_mmu = {
 	.limit = (1ULL << 40),
 	.dma_bits = 40,
-	.pgt_bits  = 27 - 12,
-	.spg_shift = 12,
 	.lpg_shift = 17,
 	.vmm = {{ -1, -1, NVIF_CLASS_VMM_GF100}, gf100_vmm_new },
 	.kind = gf100_mmu_kind,

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gk104.c

@@ -27,8 +27,6 @@ static const struct nvkm_mmu_func
 gk104_mmu = {
 	.limit = (1ULL << 40),
 	.dma_bits = 40,
-	.pgt_bits  = 27 - 12,
-	.spg_shift = 12,
 	.lpg_shift = 17,
 	.vmm = {{ -1, -1, NVIF_CLASS_VMM_GF100}, gk104_vmm_new },
 	.kind = gf100_mmu_kind,

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gk20a.c

@@ -27,8 +27,6 @@ static const struct nvkm_mmu_func
 gk20a_mmu = {
 	.limit = (1ULL << 40),
 	.dma_bits = 40,
-	.pgt_bits  = 27 - 12,
-	.spg_shift = 12,
 	.lpg_shift = 17,
 	.vmm = {{ -1, -1, NVIF_CLASS_VMM_GF100}, gk20a_vmm_new },
 	.kind = gf100_mmu_kind,

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gm200.c

@@ -71,8 +71,6 @@ static const struct nvkm_mmu_func
 gm200_mmu = {
 	.limit = (1ULL << 40),
 	.dma_bits = 40,
-	.pgt_bits  = 27 - 12,
-	.spg_shift = 12,
 	.lpg_shift = 17,
 	.vmm = {{ -1,  0, NVIF_CLASS_VMM_GM200}, gm200_vmm_new },
 	.kind = gm200_mmu_kind,
@@ -82,8 +80,6 @@ static const struct nvkm_mmu_func
 gm200_mmu_fixed = {
 	.limit = (1ULL << 40),
 	.dma_bits = 40,
-	.pgt_bits  = 27 - 12,
-	.spg_shift = 12,
 	.lpg_shift = 17,
 	.vmm = {{ -1, -1, NVIF_CLASS_VMM_GM200}, gm200_vmm_new_fixed },
 	.kind = gm200_mmu_kind,

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gm20b.c

@@ -29,8 +29,6 @@ static const struct nvkm_mmu_func
 gm20b_mmu = {
 	.limit = (1ULL << 40),
 	.dma_bits = 40,
-	.pgt_bits  = 27 - 12,
-	.spg_shift = 12,
 	.lpg_shift = 17,
 	.vmm = {{ -1,  0, NVIF_CLASS_VMM_GM200}, gm20b_vmm_new },
 	.kind = gm200_mmu_kind,
@@ -40,8 +38,6 @@ static const struct nvkm_mmu_func
 gm20b_mmu_fixed = {
 	.limit = (1ULL << 40),
 	.dma_bits = 40,
-	.pgt_bits  = 27 - 12,
-	.spg_shift = 12,
 	.lpg_shift = 17,
 	.vmm = {{ -1, -1, NVIF_CLASS_VMM_GM200}, gm20b_vmm_new_fixed },
 	.kind = gm200_mmu_kind,

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv04.c

@@ -31,8 +31,6 @@ const struct nvkm_mmu_func
 nv04_mmu = {
 	.limit = NV04_PDMA_SIZE,
 	.dma_bits = 32,
-	.pgt_bits = 32 - 12,
-	.spg_shift = 12,
 	.lpg_shift = 12,
 	.vmm = {{ -1, -1, NVIF_CLASS_VMM_NV04}, nv04_vmm_new, true },
 };

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv41.c

@@ -43,8 +43,6 @@ nv41_mmu = {
 	.init = nv41_mmu_init,
 	.limit = NV41_GART_SIZE,
 	.dma_bits = 39,
-	.pgt_bits = 32 - 12,
-	.spg_shift = 12,
 	.lpg_shift = 12,
 	.vmm = {{ -1, -1, NVIF_CLASS_VMM_NV04}, nv41_vmm_new, true },
 };

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv44.c

@@ -58,8 +58,6 @@ nv44_mmu = {
 	.init = nv44_mmu_init,
 	.limit = NV44_GART_SIZE,
 	.dma_bits = 39,
-	.pgt_bits = 32 - 12,
-	.spg_shift = 12,
 	.lpg_shift = 12,
 	.vmm = {{ -1, -1, NVIF_CLASS_VMM_NV04}, nv44_vmm_new, true },
 };

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv50.c

@@ -63,8 +63,6 @@ static const struct nvkm_mmu_func
 nv50_mmu = {
 	.limit = (1ULL << 40),
 	.dma_bits = 40,
-	.pgt_bits  = 29 - 12,
-	.spg_shift = 12,
 	.lpg_shift = 16,
 	.vmm = {{ -1, -1, NVIF_CLASS_VMM_NV50}, nv50_vmm_new, false, 0x1400 },
 	.kind = nv50_mmu_kind,

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/priv.h

@@ -9,26 +9,12 @@ int nvkm_mmu_new_(const struct nvkm_mmu_func *, struct nvkm_device *,
 		  int index, struct nvkm_mmu **);
 
 struct nvkm_mmu_func {
-	int (*oneinit)(struct nvkm_mmu *);
 	void (*init)(struct nvkm_mmu *);
 
 	u64 limit;
 	u8  dma_bits;
-	u32 pgt_bits;
-	u8  spg_shift;
 	u8  lpg_shift;
 
-	void (*map_pgt)(struct nvkm_vmm *, u32 pde,
-			struct nvkm_memory *pgt[2]);
-	void (*map)(struct nvkm_vma *, struct nvkm_memory *,
-		    struct nvkm_mem *, u32 pte, u32 cnt,
-		    u64 phys, u64 delta);
-	void (*map_sg)(struct nvkm_vma *, struct nvkm_memory *,
-		       struct nvkm_mem *, u32 pte, u32 cnt, dma_addr_t *);
-	void (*unmap)(struct nvkm_vma *, struct nvkm_memory *pgt,
-		      u32 pte, u32 cnt);
-	void (*flush)(struct nvkm_vm *);
-
 	struct {
 		struct nvkm_sclass user;
 		int (*ctor)(struct nvkm_mmu *, u64 addr, u64 size,