Commit 26c696c6 authored by Richard Zhao's avatar Richard Zhao Committed by Greg Kroah-Hartman

USB: Chipidea: rename struct ci13xxx variables from udc to ci

struct ci13xxx represent the controller, which may be device or host,
so name its variables as ci.
Signed-off-by: default avatarRichard Zhao <richard.zhao@freescale.com>
Reviewed-by: default avatarFelipe Balbi <balbi@ti.com>
Signed-off-by: default avatarAlexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: default avatarMarek Vasut <marex@denx.de>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 2f0de9d8
...@@ -36,7 +36,7 @@ ...@@ -36,7 +36,7 @@
* @name: string description of the endpoint * @name: string description of the endpoint
* @qh: queue head for this endpoint * @qh: queue head for this endpoint
* @wedge: is the endpoint wedged * @wedge: is the endpoint wedged
* @udc: pointer to the controller * @ci: pointer to the controller
* @lock: pointer to controller's spinlock * @lock: pointer to controller's spinlock
* @td_pool: pointer to controller's TD pool * @td_pool: pointer to controller's TD pool
*/ */
...@@ -54,7 +54,7 @@ struct ci13xxx_ep { ...@@ -54,7 +54,7 @@ struct ci13xxx_ep {
int wedge; int wedge;
/* global resources */ /* global resources */
struct ci13xxx *udc; struct ci13xxx *ci;
spinlock_t *lock; spinlock_t *lock;
struct dma_pool *td_pool; struct dma_pool *td_pool;
}; };
...@@ -250,9 +250,9 @@ static inline int ffs_nr(u32 x) ...@@ -250,9 +250,9 @@ static inline int ffs_nr(u32 x)
* *
* This function returns register contents * This function returns register contents
*/ */
static inline u32 hw_read(struct ci13xxx *udc, enum ci13xxx_regs reg, u32 mask) static inline u32 hw_read(struct ci13xxx *ci, enum ci13xxx_regs reg, u32 mask)
{ {
return ioread32(udc->hw_bank.regmap[reg]) & mask; return ioread32(ci->hw_bank.regmap[reg]) & mask;
} }
/** /**
...@@ -261,14 +261,14 @@ static inline u32 hw_read(struct ci13xxx *udc, enum ci13xxx_regs reg, u32 mask) ...@@ -261,14 +261,14 @@ static inline u32 hw_read(struct ci13xxx *udc, enum ci13xxx_regs reg, u32 mask)
* @mask: bitfield mask * @mask: bitfield mask
* @data: new value * @data: new value
*/ */
static inline void hw_write(struct ci13xxx *udc, enum ci13xxx_regs reg, static inline void hw_write(struct ci13xxx *ci, enum ci13xxx_regs reg,
u32 mask, u32 data) u32 mask, u32 data)
{ {
if (~mask) if (~mask)
data = (ioread32(udc->hw_bank.regmap[reg]) & ~mask) data = (ioread32(ci->hw_bank.regmap[reg]) & ~mask)
| (data & mask); | (data & mask);
iowrite32(data, udc->hw_bank.regmap[reg]); iowrite32(data, ci->hw_bank.regmap[reg]);
} }
/** /**
...@@ -278,12 +278,12 @@ static inline void hw_write(struct ci13xxx *udc, enum ci13xxx_regs reg, ...@@ -278,12 +278,12 @@ static inline void hw_write(struct ci13xxx *udc, enum ci13xxx_regs reg,
* *
* This function returns register contents * This function returns register contents
*/ */
static inline u32 hw_test_and_clear(struct ci13xxx *udc, enum ci13xxx_regs reg, static inline u32 hw_test_and_clear(struct ci13xxx *ci, enum ci13xxx_regs reg,
u32 mask) u32 mask)
{ {
u32 val = ioread32(udc->hw_bank.regmap[reg]) & mask; u32 val = ioread32(ci->hw_bank.regmap[reg]) & mask;
iowrite32(val, udc->hw_bank.regmap[reg]); iowrite32(val, ci->hw_bank.regmap[reg]);
return val; return val;
} }
...@@ -295,12 +295,12 @@ static inline u32 hw_test_and_clear(struct ci13xxx *udc, enum ci13xxx_regs reg, ...@@ -295,12 +295,12 @@ static inline u32 hw_test_and_clear(struct ci13xxx *udc, enum ci13xxx_regs reg,
* *
* This function returns register contents * This function returns register contents
*/ */
static inline u32 hw_test_and_write(struct ci13xxx *udc, enum ci13xxx_regs reg, static inline u32 hw_test_and_write(struct ci13xxx *ci, enum ci13xxx_regs reg,
u32 mask, u32 data) u32 mask, u32 data)
{ {
u32 val = hw_read(udc, reg, ~0); u32 val = hw_read(ci, reg, ~0);
hw_write(udc, reg, mask, data); hw_write(ci, reg, mask, data);
return (val & mask) >> ffs_nr(mask); return (val & mask) >> ffs_nr(mask);
} }
......
...@@ -15,11 +15,11 @@ ...@@ -15,11 +15,11 @@
#include "ci.h" #include "ci.h"
#define MSM_USB_BASE (udc->hw_bank.abs) #define MSM_USB_BASE (ci->hw_bank.abs)
static void ci13xxx_msm_notify_event(struct ci13xxx *udc, unsigned event) static void ci13xxx_msm_notify_event(struct ci13xxx *ci, unsigned event)
{ {
struct device *dev = udc->gadget.dev.parent; struct device *dev = ci->gadget.dev.parent;
int val; int val;
switch (event) { switch (event) {
...@@ -34,13 +34,13 @@ static void ci13xxx_msm_notify_event(struct ci13xxx *udc, unsigned event) ...@@ -34,13 +34,13 @@ static void ci13xxx_msm_notify_event(struct ci13xxx *udc, unsigned event)
* Put the transceiver in non-driving mode. Otherwise host * Put the transceiver in non-driving mode. Otherwise host
* may not detect soft-disconnection. * may not detect soft-disconnection.
*/ */
val = usb_phy_io_read(udc->transceiver, ULPI_FUNC_CTRL); val = usb_phy_io_read(ci->transceiver, ULPI_FUNC_CTRL);
val &= ~ULPI_FUNC_CTRL_OPMODE_MASK; val &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
val |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING; val |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING;
usb_phy_io_write(udc->transceiver, val, ULPI_FUNC_CTRL); usb_phy_io_write(ci->transceiver, val, ULPI_FUNC_CTRL);
break; break;
default: default:
dev_dbg(dev, "unknown ci13xxx_udc event\n"); dev_dbg(dev, "unknown ci13xxx event\n");
break; break;
} }
} }
......
This diff is collapsed.
This diff is collapsed.
...@@ -19,7 +19,7 @@ struct ci13xxx_platform_data { ...@@ -19,7 +19,7 @@ struct ci13xxx_platform_data {
#define CI13XXX_CONTROLLER_RESET_EVENT 0 #define CI13XXX_CONTROLLER_RESET_EVENT 0
#define CI13XXX_CONTROLLER_STOPPED_EVENT 1 #define CI13XXX_CONTROLLER_STOPPED_EVENT 1
void (*notify_event) (struct ci13xxx *udc, unsigned event); void (*notify_event) (struct ci13xxx *ci, unsigned event);
}; };
/* Default offset of capability registers */ /* Default offset of capability registers */
......
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