Commit 2726d6e1 authored by Michael Chan's avatar Michael Chan Committed by David S. Miller

[BNX2]: Remove REG_WR_IND/REG_RD_IND macros.

The REG_WR_IND/REG_RD_IND macros are unnecessary and obfuscate the
code.  Many callers to these macros read and write shared memory from
the bp->shmem_base, so we add 2 similar functions that automatically
add the shared memory base.
Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 6f743ca0
This diff is collapsed.
......@@ -6805,9 +6805,6 @@ struct bnx2 {
int irq_nvecs;
};
static u32 bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset);
static void bnx2_reg_wr_ind(struct bnx2 *bp, u32 offset, u32 val);
#define REG_RD(bp, offset) \
readl(bp->regview + offset)
......@@ -6817,12 +6814,6 @@ static void bnx2_reg_wr_ind(struct bnx2 *bp, u32 offset, u32 val);
#define REG_WR16(bp, offset, val) \
writew(val, bp->regview + offset)
#define REG_RD_IND(bp, offset) \
bnx2_reg_rd_ind(bp, offset)
#define REG_WR_IND(bp, offset, val) \
bnx2_reg_wr_ind(bp, offset, val)
/* Indirect context access. Unlike the MBQ_WR, these macros will not
* trigger a chip event. */
static void bnx2_ctx_wr(struct bnx2 *bp, u32 cid_addr, u32 offset, u32 val);
......
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