Commit 2a4599a5 authored by James Liao's avatar James Liao Committed by Matthias Brugger

dt-bindings: soc: Add clocks for Mediatek SCPSYS unit

Add clocks needed by Mediatek VENC and VENC_LT power domianis.
These clocks were needed by accessing subsystem's registers,
so they need to be enabled before power on these subsystems.
Signed-off-by: default avatarJames Liao <jamesjj.liao@mediatek.com>
Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 013f2a23
......@@ -17,9 +17,9 @@ Required properties:
- reg: Address range of the SCPSYS unit
- infracfg: must contain a phandle to the infracfg controller
- clock, clock-names: clocks according to the common clock binding.
The clocks needed "mm" and "mfg". These are the
clocks which hardware needs to be enabled before
enabling certain power domains.
The clocks needed "mm", "mfg", "venc" and "venc_lt".
These are the clocks which hardware needs to be enabled
before enabling certain power domains.
Example:
......@@ -30,7 +30,9 @@ Example:
infracfg = <&infracfg>;
clocks = <&clk26m>,
<&topckgen CLK_TOP_MM_SEL>;
clock-names = "mfg", "mm";
<&topckgen CLK_TOP_VENC_SEL>,
<&topckgen CLK_TOP_VENC_LT_SEL>;
clock-names = "mfg", "mm", "venc", "venc_lt";
};
Example consumer:
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment