Commit 2cd05006 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge branch 'omap/cleanup' into next/cleanup

parents 9be6eb41 be732460
......@@ -12,7 +12,12 @@ struct dev_archdata {
#endif
};
struct omap_device;
struct pdev_archdata {
#ifdef CONFIG_ARCH_OMAP
struct omap_device *od;
#endif
};
#endif
......@@ -31,6 +31,7 @@
static int dsp_use;
static struct clk *api_clk;
static struct clk *dsp_clk;
static struct platform_device **omap_mcbsp_devices;
static void omap1_mcbsp_request(unsigned int id)
{
......@@ -78,6 +79,17 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = {
.free = omap1_mcbsp_free,
};
#define OMAP7XX_MCBSP1_BASE 0xfffb1000
#define OMAP7XX_MCBSP2_BASE 0xfffb1800
#define OMAP1510_MCBSP1_BASE 0xe1011800
#define OMAP1510_MCBSP2_BASE 0xfffb1000
#define OMAP1510_MCBSP3_BASE 0xe1017000
#define OMAP1610_MCBSP1_BASE 0xe1011800
#define OMAP1610_MCBSP2_BASE 0xfffb1000
#define OMAP1610_MCBSP3_BASE 0xe1017000
#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
struct resource omap7xx_mcbsp_res[][6] = {
{
......@@ -369,6 +381,39 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
#define OMAP16XX_MCBSP_COUNT 0
#endif
static void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
struct omap_mcbsp_platform_data *config, int size)
{
int i;
omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *),
GFP_KERNEL);
if (!omap_mcbsp_devices) {
printk(KERN_ERR "Could not register McBSP devices\n");
return;
}
for (i = 0; i < size; i++) {
struct platform_device *new_mcbsp;
int ret;
new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1);
if (!new_mcbsp)
continue;
platform_device_add_resources(new_mcbsp, &res[i * res_count],
res_count);
config[i].reg_size = 2;
config[i].reg_step = 2;
new_mcbsp->dev.platform_data = &config[i];
ret = platform_device_add(new_mcbsp);
if (ret) {
platform_device_put(new_mcbsp);
continue;
}
omap_mcbsp_devices[i] = new_mcbsp;
}
}
static int __init omap1_mcbsp_init(void)
{
if (!cpu_class_is_omap1())
......
......@@ -243,17 +243,11 @@ static void __init omap_2430sdp_init(void)
"Secondary LCD backlight");
}
static void __init omap_2430sdp_map_io(void)
{
omap2_set_globals_243x();
omap243x_map_common_io();
}
MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
/* Maintainer: Syed Khasim - Texas Instruments Inc */
.boot_params = 0x80000100,
.reserve = omap_reserve,
.map_io = omap_2430sdp_map_io,
.map_io = omap243x_map_io,
.init_early = omap2430_init_early,
.init_irq = omap2_init_irq,
.init_machine = omap_2430sdp_init,
......
......@@ -825,17 +825,11 @@ static void __init omap_4430sdp_init(void)
omap_4430sdp_display_init();
}
static void __init omap_4430sdp_map_io(void)
{
omap2_set_globals_443x();
omap44xx_map_common_io();
}
MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
/* Maintainer: Santosh Shilimkar - Texas Instruments Inc */
.boot_params = 0x80000100,
.reserve = omap_reserve,
.map_io = omap_4430sdp_map_io,
.map_io = omap4_map_io,
.init_early = omap4430_init_early,
.init_irq = gic_init_irq,
.init_machine = omap_4430sdp_init,
......
......@@ -337,17 +337,11 @@ static void __init omap_apollon_init(void)
omap_sdrc_init(NULL, NULL);
}
static void __init omap_apollon_map_io(void)
{
omap2_set_globals_242x();
omap242x_map_common_io();
}
MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
/* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
.boot_params = 0x80000100,
.reserve = omap_reserve,
.map_io = omap_apollon_map_io,
.map_io = omap242x_map_io,
.init_early = omap2420_init_early,
.init_irq = omap2_init_irq,
.init_machine = omap_apollon_init,
......
......@@ -397,11 +397,6 @@ static struct platform_device keys_gpio = {
},
};
static void __init devkit8000_init_irq(void)
{
omap3_init_irq();
}
#define OMAP_DM9000_BASE 0x2c000000
static struct resource omap_dm9000_resources[] = {
......@@ -665,7 +660,7 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
.reserve = omap_reserve,
.map_io = omap3_map_io,
.init_early = omap35xx_init_early,
.init_irq = devkit8000_init_irq,
.init_irq = omap3_init_irq,
.init_machine = devkit8000_init,
.timer = &omap3_secure_timer,
MACHINE_END
......@@ -148,11 +148,6 @@ __init board_nand_init(struct mtd_partition *nand_parts,
board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;
gpmc_nand_init(&board_nand_data);
}
#else
void
__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs, int nand_type)
{
}
#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
/**
......
......@@ -24,7 +24,26 @@ struct flash_partitions {
int nr_parts;
};
#if defined(CONFIG_MTD_NAND_OMAP2) || \
defined(CONFIG_MTD_NAND_OMAP2_MODULE) || \
defined(CONFIG_MTD_ONENAND_OMAP2) || \
defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
extern void board_flash_init(struct flash_partitions [],
char chip_sel[][GPMC_CS_NUM], int nand_type);
#else
static inline void board_flash_init(struct flash_partitions part[],
char chip_sel[][GPMC_CS_NUM], int nand_type)
{
}
#endif
#if defined(CONFIG_MTD_NAND_OMAP2) || \
defined(CONFIG_MTD_NAND_OMAP2_MODULE)
extern void board_nand_init(struct mtd_partition *nand_parts,
u8 nr_parts, u8 cs, int nand_type);
#else
static inline void board_nand_init(struct mtd_partition *nand_parts,
u8 nr_parts, u8 cs, int nand_type)
{
}
#endif
......@@ -290,11 +290,6 @@ static struct omap_board_config_kernel h4_config[] __initdata = {
{ OMAP_TAG_LCD, &h4_lcd_config },
};
static void __init omap_h4_init_irq(void)
{
omap2_init_irq();
}
static struct at24_platform_data m24c01 = {
.byte_len = SZ_1K / 8,
.page_size = 16,
......@@ -369,19 +364,13 @@ static void __init omap_h4_init(void)
h4_init_flash();
}
static void __init omap_h4_map_io(void)
{
omap2_set_globals_242x();
omap242x_map_common_io();
}
MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
/* Maintainer: Paul Mundt <paul.mundt@nokia.com> */
.boot_params = 0x80000100,
.reserve = omap_reserve,
.map_io = omap_h4_map_io,
.map_io = omap242x_map_io,
.init_early = omap2420_init_early,
.init_irq = omap_h4_init_irq,
.init_irq = omap2_init_irq,
.init_machine = omap_h4_init,
.timer = &omap2_timer,
MACHINE_END
......@@ -616,12 +616,6 @@ static struct i2c_board_info n810_i2c_board_info_2[] __initdata = {
},
};
static void __init n8x0_map_io(void)
{
omap2_set_globals_242x();
omap242x_map_common_io();
}
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
/* I2S codec port pins for McBSP block */
......@@ -692,7 +686,7 @@ static void __init n8x0_init_machine(void)
MACHINE_START(NOKIA_N800, "Nokia N800")
.boot_params = 0x80000100,
.reserve = omap_reserve,
.map_io = n8x0_map_io,
.map_io = omap242x_map_io,
.init_early = omap2420_init_early,
.init_irq = omap2_init_irq,
.init_machine = n8x0_init_machine,
......@@ -702,7 +696,7 @@ MACHINE_END
MACHINE_START(NOKIA_N810, "Nokia N810")
.boot_params = 0x80000100,
.reserve = omap_reserve,
.map_io = n8x0_map_io,
.map_io = omap242x_map_io,
.init_early = omap2420_init_early,
.init_irq = omap2_init_irq,
.init_machine = n8x0_init_machine,
......@@ -712,7 +706,7 @@ MACHINE_END
MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
.boot_params = 0x80000100,
.reserve = omap_reserve,
.map_io = n8x0_map_io,
.map_io = omap242x_map_io,
.init_early = omap2420_init_early,
.init_irq = omap2_init_irq,
.init_machine = n8x0_init_machine,
......
......@@ -449,11 +449,6 @@ static void __init omap3_beagle_init_early(void)
omap2_init_common_infrastructure();
}
static void __init omap3_beagle_init_irq(void)
{
omap3_init_irq();
}
static struct platform_device *omap3_beagle_devices[] __initdata = {
&leds_gpio,
&keys_gpio,
......@@ -561,7 +556,7 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
.reserve = omap_reserve,
.map_io = omap3_map_io,
.init_early = omap3_beagle_init_early,
.init_irq = omap3_beagle_init_irq,
.init_irq = omap3_init_irq,
.init_machine = omap3_beagle_init,
.timer = &omap3_secure_timer,
MACHINE_END
......@@ -428,11 +428,6 @@ static int __init omap3_stalker_i2c_init(void)
static struct omap_board_config_kernel omap3_stalker_config[] __initdata = {
};
static void __init omap3_stalker_init_irq(void)
{
omap3_init_irq();
}
static struct platform_device *omap3_stalker_devices[] __initdata = {
&keys_gpio,
};
......@@ -492,7 +487,7 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
.boot_params = 0x80000100,
.map_io = omap3_map_io,
.init_early = omap35xx_init_early,
.init_irq = omap3_stalker_init_irq,
.init_irq = omap3_init_irq,
.init_machine = omap3_stalker_init,
.timer = &omap3_secure_timer,
MACHINE_END
......@@ -326,11 +326,6 @@ static struct omap_board_mux board_mux[] __initdata = {
};
#endif
static void __init omap3_touchbook_init_irq(void)
{
omap3_init_irq();
}
static struct platform_device *omap3_touchbook_devices[] __initdata = {
&omap3_touchbook_lcd_device,
&leds_gpio,
......@@ -403,7 +398,7 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
.reserve = omap_reserve,
.map_io = omap3_map_io,
.init_early = omap3430_init_early,
.init_irq = omap3_touchbook_init_irq,
.init_irq = omap3_init_irq,
.init_machine = omap3_touchbook_init,
.timer = &omap3_secure_timer,
MACHINE_END
......@@ -570,17 +570,11 @@ static void __init omap4_panda_init(void)
omap4_panda_display_init();
}
static void __init omap4_panda_map_io(void)
{
omap2_set_globals_443x();
omap44xx_map_common_io();
}
MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
/* Maintainer: David Anders - Texas Instruments Inc */
.boot_params = 0x80000100,
.reserve = omap_reserve,
.map_io = omap4_panda_map_io,
.map_io = omap4_map_io,
.init_early = omap4430_init_early,
.init_irq = gic_init_irq,
.init_machine = omap4_panda_init,
......
......@@ -143,16 +143,10 @@ static void __init rm680_init(void)
rm680_peripherals_init();
}
static void __init rm680_map_io(void)
{
omap2_set_globals_3xxx();
omap34xx_map_common_io();
}
MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
.boot_params = 0x80000100,
.reserve = omap_reserve,
.map_io = rm680_map_io,
.map_io = omap3_map_io,
.init_early = omap3630_init_early,
.init_irq = omap3_init_irq,
.init_machine = rm680_init,
......
......@@ -139,12 +139,6 @@ static void __init rx51_init(void)
platform_device_register(&leds_gpio);
}
static void __init rx51_map_io(void)
{
omap2_set_globals_3xxx();
omap34xx_map_common_io();
}
static void __init rx51_reserve(void)
{
rx51_video_mem_init();
......@@ -155,7 +149,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
/* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */
.boot_params = 0x80000100,
.reserve = rx51_reserve,
.map_io = rx51_map_io,
.map_io = omap3_map_io,
.init_early = omap3430_init_early,
.init_irq = omap3_init_irq,
.init_machine = rx51_init,
......
......@@ -56,6 +56,12 @@ void __init omap2_set_globals_242x(void)
{
__omap2_set_globals(&omap242x_globals);
}
void __init omap242x_map_io(void)
{
omap2_set_globals_242x();
omap242x_map_common_io();
}
#endif
#if defined(CONFIG_SOC_OMAP2430)
......@@ -74,6 +80,12 @@ void __init omap2_set_globals_243x(void)
{
__omap2_set_globals(&omap243x_globals);
}
void __init omap243x_map_io(void)
{
omap2_set_globals_243x();
omap243x_map_common_io();
}
#endif
#if defined(CONFIG_ARCH_OMAP3)
......@@ -138,5 +150,11 @@ void __init omap2_set_globals_443x(void)
omap2_set_globals_control(&omap4_globals);
omap2_set_globals_prcm(&omap4_globals);
}
void __init omap4_map_io(void)
{
omap2_set_globals_443x();
omap44xx_map_common_io();
}
#endif
......@@ -44,7 +44,7 @@ static int __init omap3_l3_init(void)
{
int l;
struct omap_hwmod *oh;
struct omap_device *od;
struct platform_device *pdev;
char oh_name[L3_MODULES_MAX_LEN];
/*
......@@ -61,12 +61,12 @@ static int __init omap3_l3_init(void)
if (!oh)
pr_err("could not look up %s\n", oh_name);
od = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
NULL, 0, 0);
WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
return IS_ERR(od) ? PTR_ERR(od) : 0;
return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
}
postcore_initcall(omap3_l3_init);
......@@ -74,7 +74,7 @@ static int __init omap4_l3_init(void)
{
int l, i;
struct omap_hwmod *oh[3];
struct omap_device *od;
struct platform_device *pdev;
char oh_name[L3_MODULES_MAX_LEN];
/*
......@@ -92,12 +92,12 @@ static int __init omap4_l3_init(void)
pr_err("could not look up %s\n", oh_name);
}
od = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
0, NULL, 0, 0);
WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
return IS_ERR(od) ? PTR_ERR(od) : 0;
return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
}
postcore_initcall(omap4_l3_init);
......@@ -232,7 +232,7 @@ struct omap_device_pm_latency omap_keyboard_latency[] = {
int __init omap4_keyboard_init(struct omap4_keypad_platform_data
*sdp4430_keypad_data, struct omap_board_data *bdata)
{
struct omap_device *od;
struct platform_device *pdev;
struct omap_hwmod *oh;
struct omap4_keypad_platform_data *keypad_data;
unsigned int id = -1;
......@@ -247,15 +247,15 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data
keypad_data = sdp4430_keypad_data;
od = omap_device_build(name, id, oh, keypad_data,
pdev = omap_device_build(name, id, oh, keypad_data,
sizeof(struct omap4_keypad_platform_data),
omap_keyboard_latency,
ARRAY_SIZE(omap_keyboard_latency), 0);
if (IS_ERR(od)) {
if (IS_ERR(pdev)) {
WARN(1, "Can't build omap_device for %s:%s.\n",
name, oh->name);
return PTR_ERR(od);
return PTR_ERR(pdev);
}
oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
......@@ -274,7 +274,7 @@ static struct omap_device_pm_latency mbox_latencies[] = {
static inline void omap_init_mbox(void)
{
struct omap_hwmod *oh;
struct omap_device *od;
struct platform_device *pdev;
oh = omap_hwmod_lookup("mailbox");
if (!oh) {
......@@ -282,10 +282,10 @@ static inline void omap_init_mbox(void)
return;
}
od = omap_device_build("omap-mailbox", -1, oh, NULL, 0,
pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0,
mbox_latencies, ARRAY_SIZE(mbox_latencies), 0);
WARN(IS_ERR(od), "%s: could not build device, err %ld\n",
__func__, PTR_ERR(od));
WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
__func__, PTR_ERR(pdev));
}
#else
static inline void omap_init_mbox(void) { }
......@@ -344,7 +344,7 @@ struct omap_device_pm_latency omap_mcspi_latency[] = {
static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
{
struct omap_device *od;
struct platform_device *pdev;
char *name = "omap2_mcspi";
struct omap2_mcspi_platform_config *pdata;
static int spi_num;
......@@ -371,10 +371,10 @@ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
}
spi_num++;
od = omap_device_build(name, spi_num, oh, pdata,
pdev = omap_device_build(name, spi_num, oh, pdata,
sizeof(*pdata), omap_mcspi_latency,
ARRAY_SIZE(omap_mcspi_latency), 0);
WARN(IS_ERR(od), "Can't build omap_device for %s:%s\n",
WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n",
name, oh->name);
kfree(pdata);
return 0;
......@@ -709,7 +709,7 @@ static struct omap_device_pm_latency omap_wdt_latency[] = {
static int __init omap_init_wdt(void)
{
int id = -1;
struct omap_device *od;
struct platform_device *pdev;
struct omap_hwmod *oh;
char *oh_name = "wd_timer2";
char *dev_name = "omap_wdt";
......@@ -723,10 +723,10 @@ static int __init omap_init_wdt(void)
return -EINVAL;
}
od = omap_device_build(dev_name, id, oh, NULL, 0,
pdev = omap_device_build(dev_name, id, oh, NULL, 0,
omap_wdt_latency,
ARRAY_SIZE(omap_wdt_latency), 0);
WARN(IS_ERR(od), "Can't build omap_device for %s:%s.\n",
WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
dev_name, oh->name);
return 0;
}
......
......@@ -78,7 +78,7 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
{
int r = 0;
struct omap_hwmod *oh;
struct omap_device *od;
struct platform_device *pdev;
int i, oh_count;
struct omap_display_platform_data pdata;
const struct omap_dss_hwmod_data *curr_dss_hwmod;
......@@ -108,13 +108,13 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
return -ENODEV;
}
od = omap_device_build(curr_dss_hwmod[i].dev_name,
pdev = omap_device_build(curr_dss_hwmod[i].dev_name,
curr_dss_hwmod[i].id, oh, &pdata,
sizeof(struct omap_display_platform_data),
omap_dss_latency,
ARRAY_SIZE(omap_dss_latency), 0);
if (WARN((IS_ERR(od)), "Could not build omap_device for %s\n",
if (WARN((IS_ERR(pdev)), "Could not build omap_device for %s\n",
curr_dss_hwmod[i].oh_name))
return -ENODEV;
}
......
......@@ -228,7 +228,7 @@ static u32 configure_dma_errata(void)
/* One time initializations */
static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
{
struct omap_device *od;
struct platform_device *pdev;
struct omap_system_dma_plat_info *p;
struct resource *mem;
char *name = "omap_dma_system";
......@@ -258,23 +258,23 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
p->errata = configure_dma_errata();
od = omap_device_build(name, 0, oh, p, sizeof(*p),
pdev = omap_device_build(name, 0, oh, p, sizeof(*p),
omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0);
kfree(p);
if (IS_ERR(od)) {
if (IS_ERR(pdev)) {
pr_err("%s: Can't build omap_device for %s:%s.\n",
__func__, name, oh->name);
return PTR_ERR(od);
return PTR_ERR(pdev);
}
mem = platform_get_resource(&od->pdev, IORESOURCE_MEM, 0);
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!mem) {
dev_err(&od->pdev.dev, "%s: no mem resource\n", __func__);
dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
return -EINVAL;
}
dma_base = ioremap(mem->start, resource_size(mem));
if (!dma_base) {
dev_err(&od->pdev.dev, "%s: ioremap fail\n", __func__);
dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
return -ENOMEM;
}
......@@ -283,7 +283,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
(d->lch_count), GFP_KERNEL);
if (!d->chan) {
dev_err(&od->pdev.dev, "%s: kzalloc fail\n", __func__);
dev_err(&pdev->dev, "%s: kzalloc fail\n", __func__);
return -ENOMEM;
}
return 0;
......
......@@ -34,7 +34,7 @@ static struct omap_device_pm_latency omap_gpio_latency[] = {
static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
{
struct omap_device *od;
struct platform_device *pdev;
struct omap_gpio_platform_data *pdata;
struct omap_gpio_dev_attr *dev_attr;
char *name = "omap_gpio";
......@@ -107,19 +107,19 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
return -EINVAL;
}
od = omap_device_build(name, id - 1, oh, pdata,
pdev = omap_device_build(name, id - 1, oh, pdata,
sizeof(*pdata), omap_gpio_latency,
ARRAY_SIZE(omap_gpio_latency),
false);
kfree(pdata);
if (IS_ERR(od)) {
if (IS_ERR(pdev)) {
WARN(1, "Can't build omap_device for %s:%s.\n",
name, oh->name);
return PTR_ERR(od);
return PTR_ERR(pdev);
}
omap_device_disable_idle_on_suspend(od);
omap_device_disable_idle_on_suspend(pdev);
gpio_bank_count++;
return 0;
......
......@@ -430,7 +430,7 @@ static struct omap_device_pm_latency omap_hsmmc_latency[] = {
void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
{
struct omap_hwmod *oh;
struct omap_device *od;
struct platform_device *pdev;
struct omap_device_pm_latency *ohl;
char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN];
struct omap_mmc_platform_data *mmc_data;
......@@ -471,9 +471,9 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
mmc_data->controller_flags = mmc_dev_attr->flags;
}
od = omap_device_build(name, ctrl_nr - 1, oh, mmc_data,
pdev = omap_device_build(name, ctrl_nr - 1, oh, mmc_data,
sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false);
if (IS_ERR(od)) {
if (IS_ERR(pdev)) {
WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name);
kfree(mmc_data->slots[0].name);
goto done;
......@@ -482,7 +482,7 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
* return device handle to board setup code
* required to populate for regulator framework structure
*/
hsmmcinfo->dev = &od->pdev.dev;
hsmmcinfo->dev = &pdev->dev;
done:
kfree(mmc_data);
......
......@@ -35,7 +35,7 @@ int __init hwspinlocks_init(void)
{
int retval = 0;
struct omap_hwmod *oh;
struct omap_device *od;
struct platform_device *pdev;
const char *oh_name = "spinlock";
const char *dev_name = "omap_hwspinlock";
......@@ -48,13 +48,13 @@ int __init hwspinlocks_init(void)
if (oh == NULL)
return -EINVAL;
od = omap_device_build(dev_name, 0, oh, NULL, 0,
pdev = omap_device_build(dev_name, 0, oh, NULL, 0,
omap_spinlock_latency,
ARRAY_SIZE(omap_spinlock_latency), false);
if (IS_ERR(od)) {
if (IS_ERR(pdev)) {
pr_err("Can't build omap_device for %s:%s\n", dev_name,
oh_name);
retval = PTR_ERR(od);
retval = PTR_ERR(pdev);
}
return retval;
......
......@@ -27,66 +27,69 @@
#include "control.h"
/* McBSP internal signal muxing functions */
/*
* FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
* Sidetone needs non-gated ICLK and sidetone autoidle is broken.
*/
#include "cm2xxx_3xxx.h"
#include "cm-regbits-34xx.h"
void omap2_mcbsp1_mux_clkr_src(u8 mux)
/* McBSP internal signal muxing function */
static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal,
const char *src)
{
u32 v;
v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
if (mux == CLKR_SRC_CLKR)
v &= ~OMAP2_MCBSP1_CLKR_MASK;
else if (mux == CLKR_SRC_CLKX)
v |= OMAP2_MCBSP1_CLKR_MASK;
omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
}
EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src);
void omap2_mcbsp1_mux_fsr_src(u8 mux)
{
u32 v;
if (!strcmp(signal, "clkr")) {
if (!strcmp(src, "clkr"))
v &= ~OMAP2_MCBSP1_CLKR_MASK;
else if (!strcmp(src, "clkx"))
v |= OMAP2_MCBSP1_CLKR_MASK;
else
return -EINVAL;
} else if (!strcmp(signal, "fsr")) {
if (!strcmp(src, "fsr"))
v &= ~OMAP2_MCBSP1_FSR_MASK;
else if (!strcmp(src, "fsx"))
v |= OMAP2_MCBSP1_FSR_MASK;
else
return -EINVAL;
} else {
return -EINVAL;
}
v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
if (mux == FSR_SRC_FSR)
v &= ~OMAP2_MCBSP1_FSR_MASK;
else if (mux == FSR_SRC_FSX)
v |= OMAP2_MCBSP1_FSR_MASK;
omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
return 0;
}
EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src);
/* McBSP CLKS source switching function */
int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk,
const char *src)
{
struct omap_mcbsp *mcbsp;
struct clk *fck_src;
char *fck_src_name;
int r;
if (!omap_mcbsp_check_valid_id(id)) {
pr_err("%s: Invalid id (%d)\n", __func__, id + 1);
return -EINVAL;
}
mcbsp = id_to_mcbsp_ptr(id);
if (fck_src_id == MCBSP_CLKS_PAD_SRC)
if (!strcmp(src, "clks_ext"))
fck_src_name = "pad_fck";
else if (fck_src_id == MCBSP_CLKS_PRCM_SRC)
else if (!strcmp(src, "clks_fclk"))
fck_src_name = "prcm_fck";
else
return -EINVAL;
fck_src = clk_get(mcbsp->dev, fck_src_name);
fck_src = clk_get(dev, fck_src_name);
if (IS_ERR_OR_NULL(fck_src)) {
pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks",
fck_src_name);
return -EINVAL;
}
pm_runtime_put_sync(mcbsp->dev);
pm_runtime_put_sync(dev);
r = clk_set_parent(mcbsp->fclk, fck_src);
r = clk_set_parent(clk, fck_src);
if (IS_ERR_VALUE(r)) {
pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n",
"clks", fck_src_name);
......@@ -94,13 +97,30 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
return -EINVAL;
}
pm_runtime_get_sync(mcbsp->dev);
pm_runtime_get_sync(dev);
clk_put(fck_src);
return 0;
}
EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
static int omap3_enable_st_clock(unsigned int id, bool enable)
{
unsigned int w;
/*
* Sidetone uses McBSP ICLK - which must not idle when sidetones
* are enabled or sidetones start sounding ugly.
*/
w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
if (enable)
w &= ~(1 << (id - 2));
else
w |= 1 << (id - 2);
omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
return 0;
}
struct omap_device_pm_latency omap2_mcbsp_latency[] = {
{
......@@ -116,7 +136,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
char *name = "omap-mcbsp";
struct omap_hwmod *oh_device[2];
struct omap_mcbsp_platform_data *pdata = NULL;
struct omap_device *od;
struct platform_device *pdev;
sscanf(oh->name, "mcbsp%d", &id);
......@@ -126,7 +146,13 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
return -ENOMEM;
}
pdata->mcbsp_config_type = oh->class->rev;
pdata->reg_step = 4;
if (oh->class->rev < MCBSP_CONFIG_TYPE2) {
pdata->reg_size = 2;
} else {
pdata->reg_size = 4;
pdata->has_ccr = true;
}
if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
if (id == 2)
......@@ -137,22 +163,29 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
pdata->buffer_size = 0x80;
}
if (oh->class->rev >= MCBSP_CONFIG_TYPE3)
pdata->has_wakeup = true;
oh_device[0] = oh;
if (oh->dev_attr) {
oh_device[1] = omap_hwmod_lookup((
(struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
pdata->enable_st_clock = omap3_enable_st_clock;
count++;
}
od = omap_device_build_ss(name, id, oh_device, count, pdata,
pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
sizeof(*pdata), omap2_mcbsp_latency,
ARRAY_SIZE(omap2_mcbsp_latency), false);
kfree(pdata);
if (IS_ERR(od)) {
if (IS_ERR(pdev)) {
pr_err("%s: Can't build omap_device for %s:%s.\n", __func__,
name, oh->name);
return PTR_ERR(od);
return PTR_ERR(pdev);
}
pdata->set_clk_src = omap2_mcbsp_set_clk_src;
if (id == 1)
pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
omap_mcbsp_count++;
return 0;
}
......
......@@ -69,7 +69,7 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def,
opp_def->hwmod_name, i);
return -EINVAL;
}
dev = &oh->od->pdev.dev;
dev = &oh->od->pdev->dev;
r = opp_add(dev, opp_def->freq, opp_def->u_volt);
if (r) {
......
......@@ -60,19 +60,19 @@ EXPORT_SYMBOL(omap4_get_dsp_device);
static int _init_omap_device(char *name, struct device **new_dev)
{
struct omap_hwmod *oh;
struct omap_device *od;
struct platform_device *pdev;
oh = omap_hwmod_lookup(name);
if (WARN(!oh, "%s: could not find omap_hwmod for %s\n",
__func__, name))
return -ENODEV;
od = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false);
if (WARN(IS_ERR(od), "%s: could not build omap_device for %s\n",
pdev = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false);
if (WARN(IS_ERR(pdev), "%s: could not build omap_device for %s\n",
__func__, name))
return -ENODEV;
*new_dev = &od->pdev.dev;
*new_dev = &pdev->dev;
return 0;
}
......@@ -136,8 +136,8 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
ret = pwrdm_set_next_pwrst(pwrdm, state);
if (ret) {
printk(KERN_ERR "Unable to set state of powerdomain: %s\n",
pwrdm->name);
pr_err("%s: unable to set state of powerdomain: %s\n",
__func__, pwrdm->name);
goto err;
}
......@@ -161,11 +161,11 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
}
/*
* This API is to be called during init to put the various voltage
* This API is to be called during init to set the various voltage
* domains to the voltage as per the opp table. Typically we boot up
* at the nominal voltage. So this function finds out the rate of
* the clock associated with the voltage domain, finds out the correct
* opp entry and puts the voltage domain to the voltage specifies
* opp entry and sets the voltage domain to the voltage specified
* in the opp entry
*/
static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
......@@ -177,21 +177,20 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
unsigned long freq, bootup_volt;
if (!vdd_name || !clk_name || !dev) {
printk(KERN_ERR "%s: Invalid parameters!\n", __func__);
pr_err("%s: invalid parameters\n", __func__);
goto exit;
}
voltdm = omap_voltage_domain_lookup(vdd_name);
if (IS_ERR(voltdm)) {
printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n",
pr_err("%s: unable to get vdd pointer for vdd_%s\n",
__func__, vdd_name);
goto exit;
}
clk = clk_get(NULL, clk_name);
if (IS_ERR(clk)) {
printk(KERN_ERR "%s: unable to get clk %s\n",
__func__, clk_name);
pr_err("%s: unable to get clk %s\n", __func__, clk_name);
goto exit;
}
......@@ -200,14 +199,14 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
opp = opp_find_freq_ceil(dev, &freq);
if (IS_ERR(opp)) {
printk(KERN_ERR "%s: unable to find boot up OPP for vdd_%s\n",
pr_err("%s: unable to find boot up OPP for vdd_%s\n",
__func__, vdd_name);
goto exit;
}
bootup_volt = opp_get_voltage(opp);
if (!bootup_volt) {
printk(KERN_ERR "%s: unable to find voltage corresponding"
pr_err("%s: unable to find voltage corresponding "
"to the bootup OPP for vdd_%s\n", __func__, vdd_name);
goto exit;
}
......@@ -216,8 +215,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
return 0;
exit:
printk(KERN_ERR "%s: Unable to put vdd_%s to its init voltage\n\n",
__func__, vdd_name);
pr_err("%s: unable to set vdd_%s\n", __func__, vdd_name);
return -EINVAL;
}
......
......@@ -53,8 +53,6 @@
#include "powerdomain.h"
#include "clockdomain.h"
static int omap2_pm_debug;
#ifdef CONFIG_SUSPEND
static suspend_state_t suspend_state = PM_SUSPEND_ON;
static inline bool is_suspending(void)
......@@ -96,7 +94,6 @@ static int omap2_fclks_active(void)
static void omap2_enter_full_retention(void)
{
u32 l;
struct timespec ts_preidle, ts_postidle, ts_idle;
/* There is 1 reference hold for all children of the oscillator
* clock, the following will remove it. If no one else uses the
......@@ -124,10 +121,6 @@ static void omap2_enter_full_retention(void)
omap2_gpio_prepare_for_idle(0);
if (omap2_pm_debug) {
getnstimeofday(&ts_preidle);
}
/* One last check for pending IRQs to avoid extra latency due
* to sleeping unnecessarily. */
if (omap_irq_pending())
......@@ -155,13 +148,6 @@ static void omap2_enter_full_retention(void)
console_unlock();
no_sleep:
if (omap2_pm_debug) {
unsigned long long tmp;
getnstimeofday(&ts_postidle);
ts_idle = timespec_sub(ts_postidle, ts_preidle);
tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC;
}
omap2_gpio_resume_after_idle();
clk_enable(osc_ck);
......@@ -219,7 +205,6 @@ static int omap2_allow_mpu_retention(void)
static void omap2_enter_mpu_retention(void)
{
int only_idle = 0;
struct timespec ts_preidle, ts_postidle, ts_idle;
/* Putting MPU into the WFI state while a transfer is active
* seems to cause the I2C block to timeout. Why? Good question. */
......@@ -246,19 +231,7 @@ static void omap2_enter_mpu_retention(void)
only_idle = 1;
}
if (omap2_pm_debug) {
getnstimeofday(&ts_preidle);
}
omap2_sram_idle();
if (omap2_pm_debug) {
unsigned long long tmp;
getnstimeofday(&ts_postidle);
ts_idle = timespec_sub(ts_postidle, ts_preidle);
tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC;
}
}
static int omap2_can_sleep(void)
......
......@@ -55,7 +55,7 @@
static suspend_state_t suspend_state = PM_SUSPEND_ON;
static inline bool is_suspending(void)
{
return (suspend_state != PM_SUSPEND_ON);
return (suspend_state != PM_SUSPEND_ON) && console_suspend_enabled;
}
#else
static inline bool is_suspending(void)
......
......@@ -711,7 +711,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
{
struct omap_uart_state *uart;
struct omap_hwmod *oh;
struct omap_device *od;
struct platform_device *pdev;
void *pdata = NULL;
u32 pdata_size = 0;
char *name;
......@@ -799,20 +799,20 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
if (WARN_ON(!oh))
return;
od = omap_device_build(name, uart->num, oh, pdata, pdata_size,
pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size,
omap_uart_latency,
ARRAY_SIZE(omap_uart_latency), false);
WARN(IS_ERR(od), "Could not build omap_device for %s: %s.\n",
WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n",
name, oh->name);
omap_device_disable_idle_on_suspend(od);
omap_device_disable_idle_on_suspend(pdev);
oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
uart->irq = oh->mpu_irqs[0].irq;
uart->regshift = 2;
uart->mapbase = oh->slaves[0]->addr->pa_start;
uart->membase = omap_hwmod_get_mpu_rt_va(oh);
uart->pdev = &od->pdev;
uart->pdev = pdev;
oh->dev_attr = uart;
......@@ -846,8 +846,8 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
if ((cpu_is_omap34xx() && uart->padconf) ||
(uart->wk_en && uart->wk_mask)) {
device_init_wakeup(&od->pdev.dev, true);
DEV_CREATE_FILE(&od->pdev.dev, &dev_attr_sleep_timeout);
device_init_wakeup(&pdev->dev, true);
DEV_CREATE_FILE(&pdev->dev, &dev_attr_sleep_timeout);
}
/* Enable the MDR1 errata for OMAP3 */
......
......@@ -80,7 +80,7 @@ static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
static int sr_dev_init(struct omap_hwmod *oh, void *user)
{
struct omap_sr_data *sr_data;
struct omap_device *od;
struct platform_device *pdev;
struct omap_volt_data *volt_data;
char *name = "smartreflex";
static int i;
......@@ -120,10 +120,10 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user)
sr_data->enable_on_init = sr_enable_on_init;
od = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data),
pdev = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data),
omap_sr_latency,
ARRAY_SIZE(omap_sr_latency), 0);
if (IS_ERR(od))
if (IS_ERR(pdev))
pr_warning("%s: Could not build omap_device for %s: %s.\n\n",
__func__, name, oh->name);
exit:
......
......@@ -26,54 +26,8 @@
#include <plat/mmc.h>
#include <mach/gpio.h>
#include <plat/menelaus.h>
#include <plat/mcbsp.h>
#include <plat/omap44xx.h>
/*-------------------------------------------------------------------------*/
#if defined(CONFIG_OMAP_MCBSP) || defined(CONFIG_OMAP_MCBSP_MODULE)
static struct platform_device **omap_mcbsp_devices;
void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
struct omap_mcbsp_platform_data *config, int size)
{
int i;
omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *),
GFP_KERNEL);
if (!omap_mcbsp_devices) {
printk(KERN_ERR "Could not register McBSP devices\n");
return;
}
for (i = 0; i < size; i++) {
struct platform_device *new_mcbsp;
int ret;
new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1);
if (!new_mcbsp)
continue;
platform_device_add_resources(new_mcbsp, &res[i * res_count],
res_count);
new_mcbsp->dev.platform_data = &config[i];
ret = platform_device_add(new_mcbsp);
if (ret) {
platform_device_put(new_mcbsp);
continue;
}
omap_mcbsp_devices[i] = new_mcbsp;
}
}
#else
void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
struct omap_mcbsp_platform_data *config, int size)
{ }
#endif
/*-------------------------------------------------------------------------*/
#if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
......
......@@ -135,7 +135,7 @@ static inline int omap2_i2c_add_bus(int bus_id)
{
int l;
struct omap_hwmod *oh;
struct omap_device *od;
struct platform_device *pdev;
char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
struct omap_i2c_bus_platform_data *pdata;
......@@ -160,12 +160,12 @@ static inline int omap2_i2c_add_bus(int bus_id)
*/
if (cpu_is_omap34xx())
pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
od = omap_device_build(name, bus_id, oh, pdata,
pdev = omap_device_build(name, bus_id, oh, pdata,
sizeof(struct omap_i2c_bus_platform_data),
omap_i2c_latency, ARRAY_SIZE(omap_i2c_latency), 0);
WARN(IS_ERR(od), "Could not build omap_device for %s\n", name);
WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
return PTR_ERR(od);
return PTR_ERR(pdev);
}
#else
static inline int omap2_i2c_add_bus(int bus_id)
......
......@@ -83,7 +83,11 @@ void omap2_set_globals_sdrc(struct omap_globals *);
void omap2_set_globals_control(struct omap_globals *);
void omap2_set_globals_prcm(struct omap_globals *);
void omap242x_map_io(void);
void omap243x_map_io(void);
void omap3_map_io(void);
void omap4_map_io(void);
/**
* omap_test_timeout - busy-loop, testing a condition
......
......@@ -25,9 +25,7 @@
#define __ASM_ARCH_OMAP_MCBSP_H
#include <linux/spinlock.h>
#include <mach/hardware.h>
#include <plat/clock.h>
#include <linux/clk.h>
/* macro for building platform_device for McBSP ports */
#define OMAP_MCBSP_PLATFORM_DEVICE(port_nr) \
......@@ -40,104 +38,60 @@ static struct platform_device omap_mcbsp##port_nr = { \
#define MCBSP_CONFIG_TYPE3 0x3
#define MCBSP_CONFIG_TYPE4 0x4
#define OMAP7XX_MCBSP1_BASE 0xfffb1000
#define OMAP7XX_MCBSP2_BASE 0xfffb1800
#define OMAP1510_MCBSP1_BASE 0xe1011800
#define OMAP1510_MCBSP2_BASE 0xfffb1000
#define OMAP1510_MCBSP3_BASE 0xe1017000
#define OMAP1610_MCBSP1_BASE 0xe1011800
#define OMAP1610_MCBSP2_BASE 0xfffb1000
#define OMAP1610_MCBSP3_BASE 0xe1017000
#ifdef CONFIG_ARCH_OMAP1
#define OMAP_MCBSP_REG_DRR2 0x00
#define OMAP_MCBSP_REG_DRR1 0x02
#define OMAP_MCBSP_REG_DXR2 0x04
#define OMAP_MCBSP_REG_DXR1 0x06
#define OMAP_MCBSP_REG_DRR 0x02
#define OMAP_MCBSP_REG_DXR 0x06
#define OMAP_MCBSP_REG_SPCR2 0x08
#define OMAP_MCBSP_REG_SPCR1 0x0a
#define OMAP_MCBSP_REG_RCR2 0x0c
#define OMAP_MCBSP_REG_RCR1 0x0e
#define OMAP_MCBSP_REG_XCR2 0x10
#define OMAP_MCBSP_REG_XCR1 0x12
#define OMAP_MCBSP_REG_SRGR2 0x14
#define OMAP_MCBSP_REG_SRGR1 0x16
#define OMAP_MCBSP_REG_MCR2 0x18
#define OMAP_MCBSP_REG_MCR1 0x1a
#define OMAP_MCBSP_REG_RCERA 0x1c
#define OMAP_MCBSP_REG_RCERB 0x1e
#define OMAP_MCBSP_REG_XCERA 0x20
#define OMAP_MCBSP_REG_XCERB 0x22
#define OMAP_MCBSP_REG_PCR0 0x24
#define OMAP_MCBSP_REG_RCERC 0x26
#define OMAP_MCBSP_REG_RCERD 0x28
#define OMAP_MCBSP_REG_XCERC 0x2A
#define OMAP_MCBSP_REG_XCERD 0x2C
#define OMAP_MCBSP_REG_RCERE 0x2E
#define OMAP_MCBSP_REG_RCERF 0x30
#define OMAP_MCBSP_REG_XCERE 0x32
#define OMAP_MCBSP_REG_XCERF 0x34
#define OMAP_MCBSP_REG_RCERG 0x36
#define OMAP_MCBSP_REG_RCERH 0x38
#define OMAP_MCBSP_REG_XCERG 0x3A
#define OMAP_MCBSP_REG_XCERH 0x3C
/* Dummy defines, these are not available on omap1 */
#define OMAP_MCBSP_REG_XCCR 0x00
#define OMAP_MCBSP_REG_RCCR 0x00
#else
#define OMAP_MCBSP_REG_DRR2 0x00
#define OMAP_MCBSP_REG_DRR1 0x04
#define OMAP_MCBSP_REG_DXR2 0x08
#define OMAP_MCBSP_REG_DXR1 0x0C
#define OMAP_MCBSP_REG_DRR 0x00
#define OMAP_MCBSP_REG_DXR 0x08
#define OMAP_MCBSP_REG_SPCR2 0x10
#define OMAP_MCBSP_REG_SPCR1 0x14
#define OMAP_MCBSP_REG_RCR2 0x18
#define OMAP_MCBSP_REG_RCR1 0x1C
#define OMAP_MCBSP_REG_XCR2 0x20
#define OMAP_MCBSP_REG_XCR1 0x24
#define OMAP_MCBSP_REG_SRGR2 0x28
#define OMAP_MCBSP_REG_SRGR1 0x2C
#define OMAP_MCBSP_REG_MCR2 0x30
#define OMAP_MCBSP_REG_MCR1 0x34
#define OMAP_MCBSP_REG_RCERA 0x38
#define OMAP_MCBSP_REG_RCERB 0x3C
#define OMAP_MCBSP_REG_XCERA 0x40
#define OMAP_MCBSP_REG_XCERB 0x44
#define OMAP_MCBSP_REG_PCR0 0x48
#define OMAP_MCBSP_REG_RCERC 0x4C
#define OMAP_MCBSP_REG_RCERD 0x50
#define OMAP_MCBSP_REG_XCERC 0x54
#define OMAP_MCBSP_REG_XCERD 0x58
#define OMAP_MCBSP_REG_RCERE 0x5C
#define OMAP_MCBSP_REG_RCERF 0x60
#define OMAP_MCBSP_REG_XCERE 0x64
#define OMAP_MCBSP_REG_XCERF 0x68
#define OMAP_MCBSP_REG_RCERG 0x6C
#define OMAP_MCBSP_REG_RCERH 0x70
#define OMAP_MCBSP_REG_XCERG 0x74
#define OMAP_MCBSP_REG_XCERH 0x78
#define OMAP_MCBSP_REG_SYSCON 0x8C
#define OMAP_MCBSP_REG_THRSH2 0x90
#define OMAP_MCBSP_REG_THRSH1 0x94
#define OMAP_MCBSP_REG_IRQST 0xA0
#define OMAP_MCBSP_REG_IRQEN 0xA4
#define OMAP_MCBSP_REG_WAKEUPEN 0xA8
#define OMAP_MCBSP_REG_XCCR 0xAC
#define OMAP_MCBSP_REG_RCCR 0xB0
#define OMAP_MCBSP_REG_XBUFFSTAT 0xB4
#define OMAP_MCBSP_REG_RBUFFSTAT 0xB8
#define OMAP_MCBSP_REG_SSELCR 0xBC
/* McBSP register numbers. Register address offset = num * reg_step */
enum {
/* Common registers */
OMAP_MCBSP_REG_SPCR2 = 4,
OMAP_MCBSP_REG_SPCR1,
OMAP_MCBSP_REG_RCR2,
OMAP_MCBSP_REG_RCR1,
OMAP_MCBSP_REG_XCR2,
OMAP_MCBSP_REG_XCR1,
OMAP_MCBSP_REG_SRGR2,
OMAP_MCBSP_REG_SRGR1,
OMAP_MCBSP_REG_MCR2,
OMAP_MCBSP_REG_MCR1,
OMAP_MCBSP_REG_RCERA,
OMAP_MCBSP_REG_RCERB,
OMAP_MCBSP_REG_XCERA,
OMAP_MCBSP_REG_XCERB,
OMAP_MCBSP_REG_PCR0,
OMAP_MCBSP_REG_RCERC,
OMAP_MCBSP_REG_RCERD,
OMAP_MCBSP_REG_XCERC,
OMAP_MCBSP_REG_XCERD,
OMAP_MCBSP_REG_RCERE,
OMAP_MCBSP_REG_RCERF,
OMAP_MCBSP_REG_XCERE,
OMAP_MCBSP_REG_XCERF,
OMAP_MCBSP_REG_RCERG,
OMAP_MCBSP_REG_RCERH,
OMAP_MCBSP_REG_XCERG,
OMAP_MCBSP_REG_XCERH,
/* OMAP1-OMAP2420 registers */
OMAP_MCBSP_REG_DRR2 = 0,
OMAP_MCBSP_REG_DRR1,
OMAP_MCBSP_REG_DXR2,
OMAP_MCBSP_REG_DXR1,
/* OMAP2430 and onwards */
OMAP_MCBSP_REG_DRR = 0,
OMAP_MCBSP_REG_DXR = 2,
OMAP_MCBSP_REG_SYSCON = 35,
OMAP_MCBSP_REG_THRSH2,
OMAP_MCBSP_REG_THRSH1,
OMAP_MCBSP_REG_IRQST = 40,
OMAP_MCBSP_REG_IRQEN,
OMAP_MCBSP_REG_WAKEUPEN,
OMAP_MCBSP_REG_XCCR,
OMAP_MCBSP_REG_RCCR,
OMAP_MCBSP_REG_XBUFFSTAT,
OMAP_MCBSP_REG_RBUFFSTAT,
OMAP_MCBSP_REG_SSELCR,
};
/* OMAP3 sidetone control registers */
#define OMAP_ST_REG_REV 0x00
#define OMAP_ST_REG_SYSCONFIG 0x10
#define OMAP_ST_REG_IRQSTATUS 0x18
......@@ -146,8 +100,6 @@ static struct platform_device omap_mcbsp##port_nr = { \
#define OMAP_ST_REG_SFIRCR 0x28
#define OMAP_ST_REG_SSELCR 0x2C
#endif
/************************** McBSP SPCR1 bit definitions ***********************/
#define RRST 0x0001
#define RRDY 0x0002
......@@ -344,20 +296,20 @@ typedef enum {
struct omap_mcbsp_ops {
void (*request)(unsigned int);
void (*free)(unsigned int);
int (*set_clks_src)(u8, u8);
};
struct omap_mcbsp_platform_data {
unsigned long phys_base;
u8 dma_rx_sync, dma_tx_sync;
u16 rx_irq, tx_irq;
struct omap_mcbsp_ops *ops;
#ifdef CONFIG_ARCH_OMAP3
/* Sidetone block for McBSP 2 and 3 */
unsigned long phys_base_st;
#endif
u16 buffer_size;
unsigned int mcbsp_config_type;
u8 reg_size;
u8 reg_step;
/* McBSP platform and instance specific features */
bool has_wakeup; /* Wakeup capability */
bool has_ccr; /* Transceiver has configuration control registers */
int (*enable_st_clock)(unsigned int, bool);
int (*set_clk_src)(struct device *dev, struct clk *clk, const char *src);
int (*mux_signal)(struct device *dev, const char *signal, const char *src);
};
struct omap_mcbsp_st_data {
......@@ -389,14 +341,12 @@ struct omap_mcbsp {
spinlock_t lock;
struct omap_mcbsp_platform_data *pdata;
struct clk *fclk;
#ifdef CONFIG_ARCH_OMAP3
struct omap_mcbsp_st_data *st_data;
int dma_op_mode;
u16 max_tx_thres;
u16 max_rx_thres;
#endif
void *reg_cache;
unsigned int mcbsp_config_type;
int reg_cache_size;
};
/**
......@@ -408,16 +358,10 @@ struct omap_mcbsp_dev_attr {
};
extern struct omap_mcbsp **mcbsp_ptr;
extern int omap_mcbsp_count, omap_mcbsp_cache_size;
#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
#define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
extern int omap_mcbsp_count;
int omap_mcbsp_init(void);
void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
struct omap_mcbsp_platform_data *config, int size);
void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config);
#ifdef CONFIG_ARCH_OMAP3
void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold);
void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold);
u16 omap_mcbsp_get_max_tx_threshold(unsigned int id);
......@@ -426,18 +370,6 @@ u16 omap_mcbsp_get_fifo_size(unsigned int id);
u16 omap_mcbsp_get_tx_delay(unsigned int id);
u16 omap_mcbsp_get_rx_delay(unsigned int id);
int omap_mcbsp_get_dma_op_mode(unsigned int id);
#else
static inline void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
{ }
static inline void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
{ }
static inline u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) { return 0; }
static inline u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) { return 0; }
static inline u16 omap_mcbsp_get_fifo_size(unsigned int id) { return 0; }
static inline u16 omap_mcbsp_get_tx_delay(unsigned int id) { return 0; }
static inline u16 omap_mcbsp_get_rx_delay(unsigned int id) { return 0; }
static inline int omap_mcbsp_get_dma_op_mode(unsigned int id) { return 0; }
#endif
int omap_mcbsp_request(unsigned int id);
void omap_mcbsp_free(unsigned int id);
void omap_mcbsp_start(unsigned int id, int tx, int rx);
......@@ -453,21 +385,11 @@ void omap2_mcbsp1_mux_fsr_src(u8 mux);
int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream);
int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream);
#ifdef CONFIG_ARCH_OMAP3
/* Sidetone specific API */
int omap_st_set_chgain(unsigned int id, int channel, s16 chgain);
int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain);
int omap_st_enable(unsigned int id);
int omap_st_disable(unsigned int id);
int omap_st_is_enabled(unsigned int id);
#else
static inline int omap_st_set_chgain(unsigned int id, int channel,
s16 chgain) { return 0; }
static inline int omap_st_get_chgain(unsigned int id, int channel,
s16 *chgain) { return 0; }
static inline int omap_st_enable(unsigned int id) { return 0; }
static inline int omap_st_disable(unsigned int id) { return 0; }
static inline int omap_st_is_enabled(unsigned int id) { return 0; }
#endif
#endif
......@@ -68,7 +68,7 @@ extern struct device omap_device_parent;
*
*/
struct omap_device {
struct platform_device pdev;
struct platform_device *pdev;
struct omap_hwmod **hwmods;
struct omap_device_pm_latency *pm_lats;
u32 dev_wakeup_lat;
......@@ -88,24 +88,18 @@ int omap_device_shutdown(struct platform_device *pdev);
/* Core code interface */
int omap_device_count_resources(struct omap_device *od);
int omap_device_fill_resources(struct omap_device *od, struct resource *res);
struct omap_device *omap_device_build(const char *pdev_name, int pdev_id,
struct platform_device *omap_device_build(const char *pdev_name, int pdev_id,
struct omap_hwmod *oh, void *pdata,
int pdata_len,
struct omap_device_pm_latency *pm_lats,
int pm_lats_cnt, int is_early_device);
struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
struct omap_hwmod **oh, int oh_cnt,
void *pdata, int pdata_len,
struct omap_device_pm_latency *pm_lats,
int pm_lats_cnt, int is_early_device);
int omap_device_register(struct omap_device *od);
int omap_early_device_register(struct omap_device *od);
void __iomem *omap_device_get_rt_va(struct omap_device *od);
/* OMAP PM interface */
......@@ -122,11 +116,6 @@ int omap_device_enable_hwmods(struct omap_device *od);
int omap_device_disable_clocks(struct omap_device *od);
int omap_device_enable_clocks(struct omap_device *od);
static inline void omap_device_disable_idle_on_suspend(struct omap_device *od)
{
od->flags |= OMAP_DEVICE_NO_IDLE_ON_SUSPEND;
}
/*
* Entries should be kept in latency order ascending
*
......@@ -157,6 +146,17 @@ struct omap_device_pm_latency {
#define OMAP_DEVICE_LATENCY_AUTO_ADJUST BIT(1)
/* Get omap_device pointer from platform_device pointer */
#define to_omap_device(x) container_of((x), struct omap_device, pdev)
static inline struct omap_device *to_omap_device(struct platform_device *pdev)
{
return pdev ? pdev->archdata.od : NULL;
}
static inline
void omap_device_disable_idle_on_suspend(struct platform_device *pdev)
{
struct omap_device *od = to_omap_device(pdev);
od->flags |= OMAP_DEVICE_NO_IDLE_ON_SUSPEND;
}
#endif
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