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Commit 2d6c7177 authored by Kalle Valo's avatar Kalle Valo
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Merge tag 'rtw-next-2024-05-04-v2' of https://github.com/pkshih/rtw 

rtw-next patches for v6.10

Major changes are listed as below

rtl8xxxu:

 - remove rtl8xxxu_ prefix from filename
 - cleanup includes of header files

rtlwifi:

 - adjust code to share with coming support of rtl8192du

rtw89:

 - complete features of new WiFi 7 chip 8922AE including BT-coexistence
   and WoWLAN
 - use BIOS ACPI settings to set TX power and channels
parents f1c26960 82b85a83
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Showing with 8371 additions and 8438 deletions
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c → drivers/net/wireless/realtek/rtl8xxxu/8188e.c
View file @ 2d6c7177
......@@ -13,24 +13,8 @@
* additional 8xxx chips like the 8192cu, 8188cus, etc.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/usb.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/ethtool.h>
#include <linux/wireless.h>
#include <linux/firmware.h>
#include <linux/moduleparam.h>
#include <net/mac80211.h>
#include "regs.h"
#include "rtl8xxxu.h"
#include "rtl8xxxu_regs.h"
static const struct rtl8xxxu_reg8val rtl8188e_mac_init_table[] = {
{0x026, 0x41}, {0x027, 0x35}, {0x040, 0x00}, {0x421, 0x0f},
......
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c → drivers/net/wireless/realtek/rtl8xxxu/8188f.c
View file @ 2d6c7177
......@@ -11,24 +11,8 @@
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/usb.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/ethtool.h>
#include <linux/wireless.h>
#include <linux/firmware.h>
#include <linux/moduleparam.h>
#include <net/mac80211.h>
#include "regs.h"
#include "rtl8xxxu.h"
#include "rtl8xxxu_regs.h"
static const struct rtl8xxxu_reg8val rtl8188f_mac_init_table[] = {
{0x024, 0xDF}, {0x025, 0x07}, {0x02B, 0x1C}, {0x283, 0x20},
......
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192c.c → drivers/net/wireless/realtek/rtl8xxxu/8192c.c
View file @ 2d6c7177
......@@ -13,24 +13,8 @@
* additional 8xxx chips like the 8192cu, 8188cus, etc.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/usb.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/ethtool.h>
#include <linux/wireless.h>
#include <linux/firmware.h>
#include <linux/moduleparam.h>
#include <net/mac80211.h>
#include "regs.h"
#include "rtl8xxxu.h"
#include "rtl8xxxu_regs.h"
#ifdef CONFIG_RTL8XXXU_UNTESTED
static struct rtl8xxxu_power_base rtl8192c_power_base = {
......@@ -77,6 +61,32 @@ static struct rtl8xxxu_power_base rtl8188r_power_base = {
.reg_0868 = 0x00020204,
};
static const struct rtl8xxxu_reg8val rtl8192cu_mac_init_table[] = {
{0x420, 0x80}, {0x423, 0x00}, {0x430, 0x00}, {0x431, 0x00},
{0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, {0x435, 0x05},
{0x436, 0x06}, {0x437, 0x07}, {0x438, 0x00}, {0x439, 0x00},
{0x43a, 0x00}, {0x43b, 0x01}, {0x43c, 0x04}, {0x43d, 0x05},
{0x43e, 0x06}, {0x43f, 0x07}, {0x440, 0x5d}, {0x441, 0x01},
{0x442, 0x00}, {0x444, 0x15}, {0x445, 0xf0}, {0x446, 0x0f},
{0x447, 0x00}, {0x458, 0x41}, {0x459, 0xa8}, {0x45a, 0x72},
{0x45b, 0xb9}, {0x460, 0x66}, {0x461, 0x66}, {0x462, 0x08},
{0x463, 0x03}, {0x4c8, 0xff}, {0x4c9, 0x08}, {0x4cc, 0xff},
{0x4cd, 0xff}, {0x4ce, 0x01}, {0x500, 0x26}, {0x501, 0xa2},
{0x502, 0x2f}, {0x503, 0x00}, {0x504, 0x28}, {0x505, 0xa3},
{0x506, 0x5e}, {0x507, 0x00}, {0x508, 0x2b}, {0x509, 0xa4},
{0x50a, 0x5e}, {0x50b, 0x00}, {0x50c, 0x4f}, {0x50d, 0xa4},
{0x50e, 0x00}, {0x50f, 0x00}, {0x512, 0x1c}, {0x514, 0x0a},
{0x515, 0x10}, {0x516, 0x0a}, {0x517, 0x10}, {0x51a, 0x16},
{0x524, 0x0f}, {0x525, 0x4f}, {0x546, 0x40}, {0x547, 0x00},
{0x550, 0x10}, {0x551, 0x10}, {0x559, 0x02}, {0x55a, 0x02},
{0x55d, 0xff}, {0x605, 0x30}, {0x608, 0x0e}, {0x609, 0x2a},
{0x652, 0x20}, {0x652, 0x20}, {0x63c, 0x08}, {0x63d, 0x08},
{0x63e, 0x0c}, {0x63f, 0x0c}, {0x66e, 0x05}, {0x700, 0x21},
{0x701, 0x43}, {0x702, 0x65}, {0x703, 0x87}, {0x708, 0x21},
{0x709, 0x43}, {0x70a, 0x65}, {0x70b, 0x87},
{0xffff, 0xff},
};
static const struct rtl8xxxu_rfregval rtl8192cu_radioa_2t_init_table[] = {
{0x00, 0x00030159}, {0x01, 0x00031284},
{0x02, 0x00098000}, {0x03, 0x00018c63},
......@@ -583,6 +593,26 @@ static int rtl8192cu_power_on(struct rtl8xxxu_priv *priv)
return 0;
}
static int rtl8192cu_led_brightness_set(struct led_classdev *led_cdev,
enum led_brightness brightness)
{
struct rtl8xxxu_priv *priv = container_of(led_cdev,
struct rtl8xxxu_priv,
led_cdev);
u8 ledcfg = rtl8xxxu_read8(priv, REG_LEDCFG0);
if (brightness == LED_OFF)
ledcfg = LEDCFG2_SW_LED_CONTROL | LEDCFG2_SW_LED_DISABLE;
else if (brightness == LED_ON)
ledcfg = LEDCFG2_SW_LED_CONTROL;
else if (brightness == RTL8XXXU_HW_LED_CONTROL)
ledcfg = LEDCFG2_HW_LED_CONTROL | LEDCFG2_HW_LED_ENABLE;
rtl8xxxu_write8(priv, REG_LEDCFG0, ledcfg);
return 0;
}
struct rtl8xxxu_fileops rtl8192cu_fops = {
.identify_chip = rtl8192cu_identify_chip,
.parse_efuse = rtl8192cu_parse_efuse,
......@@ -609,6 +639,7 @@ struct rtl8xxxu_fileops rtl8192cu_fops = {
.report_rssi = rtl8xxxu_gen1_report_rssi,
.fill_txdesc = rtl8xxxu_fill_txdesc_v1,
.cck_rssi = rtl8723a_cck_rssi,
.led_classdev_brightness_set = rtl8192cu_led_brightness_set,
.writeN_block_size = 128,
.rx_agg_buf_size = 16000,
.tx_desc_size = sizeof(struct rtl8xxxu_txdesc32),
......@@ -621,7 +652,7 @@ struct rtl8xxxu_fileops rtl8192cu_fops = {
.trxff_boundary = 0x27ff,
.pbp_rx = PBP_PAGE_SIZE_128,
.pbp_tx = PBP_PAGE_SIZE_128,
.mactable = rtl8xxxu_gen1_mac_init_table,
.mactable = rtl8192cu_mac_init_table,
.total_page_num = TX_TOTAL_PAGE_NUM,
.page_num_hi = TX_PAGE_NUM_HI_PQ,
.page_num_lo = TX_PAGE_NUM_LO_PQ,
......
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c → drivers/net/wireless/realtek/rtl8xxxu/8192e.c
View file @ 2d6c7177
......@@ -13,24 +13,8 @@
* additional 8xxx chips like the 8192cu, 8188cus, etc.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/usb.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/ethtool.h>
#include <linux/wireless.h>
#include <linux/firmware.h>
#include <linux/moduleparam.h>
#include <net/mac80211.h>
#include "regs.h"
#include "rtl8xxxu.h"
#include "rtl8xxxu_regs.h"
static const struct rtl8xxxu_reg8val rtl8192e_mac_init_table[] = {
{0x011, 0xeb}, {0x012, 0x07}, {0x014, 0x75}, {0x303, 0xa7},
......
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192f.c → drivers/net/wireless/realtek/rtl8xxxu/8192f.c
View file @ 2d6c7177
......@@ -11,24 +11,8 @@
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/usb.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/ethtool.h>
#include <linux/wireless.h>
#include <linux/firmware.h>
#include <linux/moduleparam.h>
#include <net/mac80211.h>
#include "regs.h"
#include "rtl8xxxu.h"
#include "rtl8xxxu_regs.h"
static const struct rtl8xxxu_reg8val rtl8192f_mac_init_table[] = {
{0x420, 0x00}, {0x422, 0x78}, {0x428, 0x0a}, {0x429, 0x10},
......
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8710b.c → drivers/net/wireless/realtek/rtl8xxxu/8710b.c
View file @ 2d6c7177
......@@ -11,24 +11,8 @@
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/usb.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/ethtool.h>
#include <linux/wireless.h>
#include <linux/firmware.h>
#include <linux/moduleparam.h>
#include <net/mac80211.h>
#include "regs.h"
#include "rtl8xxxu.h"
#include "rtl8xxxu_regs.h"
static const struct rtl8xxxu_reg8val rtl8710b_mac_init_table[] = {
{0x421, 0x0F}, {0x428, 0x0A}, {0x429, 0x10}, {0x430, 0x00},
......
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8723a.c → drivers/net/wireless/realtek/rtl8xxxu/8723a.c
View file @ 2d6c7177
......@@ -13,24 +13,8 @@
* additional 8xxx chips like the 8192cu, 8188cus, etc.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/usb.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/ethtool.h>
#include <linux/wireless.h>
#include <linux/firmware.h>
#include <linux/moduleparam.h>
#include <net/mac80211.h>
#include "regs.h"
#include "rtl8xxxu.h"
#include "rtl8xxxu_regs.h"
static struct rtl8xxxu_power_base rtl8723a_power_base = {
.reg_0e00 = 0x0a0c0c0c,
......@@ -54,6 +38,31 @@ static struct rtl8xxxu_power_base rtl8723a_power_base = {
.reg_0868 = 0x02040608,
};
static const struct rtl8xxxu_reg8val rtl8723au_mac_init_table[] = {
{0x420, 0x80}, {0x423, 0x00}, {0x430, 0x00}, {0x431, 0x00},
{0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, {0x435, 0x05},
{0x436, 0x06}, {0x437, 0x07}, {0x438, 0x00}, {0x439, 0x00},
{0x43a, 0x00}, {0x43b, 0x01}, {0x43c, 0x04}, {0x43d, 0x05},
{0x43e, 0x06}, {0x43f, 0x07}, {0x440, 0x5d}, {0x441, 0x01},
{0x442, 0x00}, {0x444, 0x15}, {0x445, 0xf0}, {0x446, 0x0f},
{0x447, 0x00}, {0x458, 0x41}, {0x459, 0xa8}, {0x45a, 0x72},
{0x45b, 0xb9}, {0x460, 0x66}, {0x461, 0x66}, {0x462, 0x08},
{0x463, 0x03}, {0x4c8, 0xff}, {0x4c9, 0x08}, {0x4cc, 0xff},
{0x4cd, 0xff}, {0x4ce, 0x01}, {0x500, 0x26}, {0x501, 0xa2},
{0x502, 0x2f}, {0x503, 0x00}, {0x504, 0x28}, {0x505, 0xa3},
{0x506, 0x5e}, {0x507, 0x00}, {0x508, 0x2b}, {0x509, 0xa4},
{0x50a, 0x5e}, {0x50b, 0x00}, {0x50c, 0x4f}, {0x50d, 0xa4},
{0x50e, 0x00}, {0x50f, 0x00}, {0x512, 0x1c}, {0x514, 0x0a},
{0x515, 0x10}, {0x516, 0x0a}, {0x517, 0x10}, {0x51a, 0x16},
{0x524, 0x0f}, {0x525, 0x4f}, {0x546, 0x40}, {0x547, 0x00},
{0x550, 0x10}, {0x551, 0x10}, {0x559, 0x02}, {0x55a, 0x02},
{0x55d, 0xff}, {0x605, 0x30}, {0x608, 0x0e}, {0x609, 0x2a},
{0x652, 0x20}, {0x63c, 0x0a}, {0x63d, 0x0a}, {0x63e, 0x0e},
{0x63f, 0x0e}, {0x66e, 0x05}, {0x700, 0x21}, {0x701, 0x43},
{0x702, 0x65}, {0x703, 0x87}, {0x708, 0x21}, {0x709, 0x43},
{0x70a, 0x65}, {0x70b, 0x87}, {0xffff, 0xff},
};
static const struct rtl8xxxu_rfregval rtl8723au_radioa_1t_init_table[] = {
{0x00, 0x00030159}, {0x01, 0x00031284},
{0x02, 0x00098000}, {0x03, 0x00039c63},
......@@ -518,7 +527,7 @@ struct rtl8xxxu_fileops rtl8723au_fops = {
.trxff_boundary = 0x27ff,
.pbp_rx = PBP_PAGE_SIZE_128,
.pbp_tx = PBP_PAGE_SIZE_128,
.mactable = rtl8xxxu_gen1_mac_init_table,
.mactable = rtl8723au_mac_init_table,
.total_page_num = TX_TOTAL_PAGE_NUM,
.page_num_hi = TX_PAGE_NUM_HI_PQ,
.page_num_lo = TX_PAGE_NUM_LO_PQ,
......
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8723b.c → drivers/net/wireless/realtek/rtl8xxxu/8723b.c
View file @ 2d6c7177
......@@ -13,24 +13,8 @@
* additional 8xxx chips like the 8192cu, 8188cus, etc.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/usb.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/ethtool.h>
#include <linux/wireless.h>
#include <linux/firmware.h>
#include <linux/moduleparam.h>
#include <net/mac80211.h>
#include "regs.h"
#include "rtl8xxxu.h"
#include "rtl8xxxu_regs.h"
static const struct rtl8xxxu_reg8val rtl8723b_mac_init_table[] = {
{0x02f, 0x30}, {0x035, 0x00}, {0x039, 0x08}, {0x04e, 0xe0},
......@@ -1701,6 +1685,28 @@ static s8 rtl8723b_cck_rssi(struct rtl8xxxu_priv *priv, struct rtl8723au_phy_sta
return rx_pwr_all;
}
static int rtl8723bu_led_brightness_set(struct led_classdev *led_cdev,
enum led_brightness brightness)
{
struct rtl8xxxu_priv *priv = container_of(led_cdev,
struct rtl8xxxu_priv,
led_cdev);
u8 ledcfg = rtl8xxxu_read8(priv, REG_LEDCFG2);
ledcfg &= LEDCFG2_DPDT_SELECT;
if (brightness == LED_OFF)
ledcfg |= LEDCFG2_SW_LED_CONTROL | LEDCFG2_SW_LED_DISABLE;
else if (brightness == LED_ON)
ledcfg |= LEDCFG2_SW_LED_CONTROL;
else if (brightness == RTL8XXXU_HW_LED_CONTROL)
ledcfg |= LEDCFG2_HW_LED_CONTROL | LEDCFG2_HW_LED_ENABLE;
rtl8xxxu_write8(priv, REG_LEDCFG2, ledcfg);
return 0;
}
struct rtl8xxxu_fileops rtl8723bu_fops = {
.identify_chip = rtl8723bu_identify_chip,
.parse_efuse = rtl8723bu_parse_efuse,
......@@ -1731,6 +1737,7 @@ struct rtl8xxxu_fileops rtl8723bu_fops = {
.fill_txdesc = rtl8xxxu_fill_txdesc_v2,
.set_crystal_cap = rtl8723a_set_crystal_cap,
.cck_rssi = rtl8723b_cck_rssi,
.led_classdev_brightness_set = rtl8723bu_led_brightness_set,
.writeN_block_size = 1024,
.tx_desc_size = sizeof(struct rtl8xxxu_txdesc40),
.rx_desc_size = sizeof(struct rtl8xxxu_rxdesc24),
......
drivers/net/wireless/realtek/rtl8xxxu/Makefile
View file @ 2d6c7177
# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_RTL8XXXU) += rtl8xxxu.o
rtl8xxxu-y := rtl8xxxu_core.o rtl8xxxu_8192e.o rtl8xxxu_8723b.o \
rtl8xxxu_8723a.o rtl8xxxu_8192c.o rtl8xxxu_8188f.o \
rtl8xxxu_8188e.o rtl8xxxu_8710b.o rtl8xxxu_8192f.o
rtl8xxxu-y := core.o 8192e.o 8723b.o \
8723a.o 8192c.o 8188f.o \
8188e.o 8710b.o 8192f.o
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c → drivers/net/wireless/realtek/rtl8xxxu/core.c
View file @ 2d6c7177
......@@ -13,24 +13,9 @@
* additional 8xxx chips like the 8192cu, 8188cus, etc.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/usb.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/ethtool.h>
#include <linux/wireless.h>
#include <linux/firmware.h>
#include <linux/moduleparam.h>
#include <net/mac80211.h>
#include "regs.h"
#include "rtl8xxxu.h"
#include "rtl8xxxu_regs.h"
#define DRIVER_NAME "rtl8xxxu"
......@@ -132,31 +117,6 @@ static struct ieee80211_supported_band rtl8xxxu_supported_band = {
.n_bitrates = ARRAY_SIZE(rtl8xxxu_rates),
};
const struct rtl8xxxu_reg8val rtl8xxxu_gen1_mac_init_table[] = {
{0x420, 0x80}, {0x423, 0x00}, {0x430, 0x00}, {0x431, 0x00},
{0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, {0x435, 0x05},
{0x436, 0x06}, {0x437, 0x07}, {0x438, 0x00}, {0x439, 0x00},
{0x43a, 0x00}, {0x43b, 0x01}, {0x43c, 0x04}, {0x43d, 0x05},
{0x43e, 0x06}, {0x43f, 0x07}, {0x440, 0x5d}, {0x441, 0x01},
{0x442, 0x00}, {0x444, 0x15}, {0x445, 0xf0}, {0x446, 0x0f},
{0x447, 0x00}, {0x458, 0x41}, {0x459, 0xa8}, {0x45a, 0x72},
{0x45b, 0xb9}, {0x460, 0x66}, {0x461, 0x66}, {0x462, 0x08},
{0x463, 0x03}, {0x4c8, 0xff}, {0x4c9, 0x08}, {0x4cc, 0xff},
{0x4cd, 0xff}, {0x4ce, 0x01}, {0x500, 0x26}, {0x501, 0xa2},
{0x502, 0x2f}, {0x503, 0x00}, {0x504, 0x28}, {0x505, 0xa3},
{0x506, 0x5e}, {0x507, 0x00}, {0x508, 0x2b}, {0x509, 0xa4},
{0x50a, 0x5e}, {0x50b, 0x00}, {0x50c, 0x4f}, {0x50d, 0xa4},
{0x50e, 0x00}, {0x50f, 0x00}, {0x512, 0x1c}, {0x514, 0x0a},
{0x515, 0x10}, {0x516, 0x0a}, {0x517, 0x10}, {0x51a, 0x16},
{0x524, 0x0f}, {0x525, 0x4f}, {0x546, 0x40}, {0x547, 0x00},
{0x550, 0x10}, {0x551, 0x10}, {0x559, 0x02}, {0x55a, 0x02},
{0x55d, 0xff}, {0x605, 0x30}, {0x608, 0x0e}, {0x609, 0x2a},
{0x652, 0x20}, {0x63c, 0x0a}, {0x63d, 0x0a}, {0x63e, 0x0e},
{0x63f, 0x0e}, {0x66e, 0x05}, {0x700, 0x21}, {0x701, 0x43},
{0x702, 0x65}, {0x703, 0x87}, {0x708, 0x21}, {0x709, 0x43},
{0x70a, 0x65}, {0x70b, 0x87}, {0xffff, 0xff},
};
static const struct rtl8xxxu_reg32val rtl8723a_phy_1t_init_table[] = {
{0x800, 0x80040000}, {0x804, 0x00000003},
{0x808, 0x0000fc00}, {0x80c, 0x0000000a},
......@@ -1505,13 +1465,13 @@ rtl8xxxu_gen1_set_tx_power(struct rtl8xxxu_priv *priv, int channel, bool ht40)
u8 cck[RTL8723A_MAX_RF_PATHS], ofdm[RTL8723A_MAX_RF_PATHS];
u8 ofdmbase[RTL8723A_MAX_RF_PATHS], mcsbase[RTL8723A_MAX_RF_PATHS];
u32 val32, ofdm_a, ofdm_b, mcs_a, mcs_b;
u8 val8;
u8 val8, base;
int group, i;
group = rtl8xxxu_gen1_channel_to_group(channel);
cck[0] = priv->cck_tx_power_index_A[group] - 1;
cck[1] = priv->cck_tx_power_index_B[group] - 1;
cck[0] = priv->cck_tx_power_index_A[group];
cck[1] = priv->cck_tx_power_index_B[group];
if (priv->hi_pa) {
if (cck[0] > 0x20)
......@@ -1522,10 +1482,6 @@ rtl8xxxu_gen1_set_tx_power(struct rtl8xxxu_priv *priv, int channel, bool ht40)
ofdm[0] = priv->ht40_1s_tx_power_index_A[group];
ofdm[1] = priv->ht40_1s_tx_power_index_B[group];
if (ofdm[0])
ofdm[0] -= 1;
if (ofdm[1])
ofdm[1] -= 1;
ofdmbase[0] = ofdm[0] + priv->ofdm_tx_power_index_diff[group].a;
ofdmbase[1] = ofdm[1] + priv->ofdm_tx_power_index_diff[group].b;
......@@ -1614,20 +1570,19 @@ rtl8xxxu_gen1_set_tx_power(struct rtl8xxxu_priv *priv, int channel, bool ht40)
rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS15_MCS12,
mcs_a + power_base->reg_0e1c);
val8 = u32_get_bits(mcs_a + power_base->reg_0e1c, 0xff000000);
for (i = 0; i < 3; i++) {
if (i != 2)
val8 = (mcsbase[0] > 8) ? (mcsbase[0] - 8) : 0;
else
val8 = (mcsbase[0] > 6) ? (mcsbase[0] - 6) : 0;
base = i != 2 ? 8 : 6;
val8 = max_t(int, val8 - base, 0);
rtl8xxxu_write8(priv, REG_OFDM0_XC_TX_IQ_IMBALANCE + i, val8);
}
rtl8xxxu_write32(priv, REG_TX_AGC_B_MCS15_MCS12,
mcs_b + power_base->reg_0868);
val8 = u32_get_bits(mcs_b + power_base->reg_0868, 0xff000000);
for (i = 0; i < 3; i++) {
if (i != 2)
val8 = (mcsbase[1] > 8) ? (mcsbase[1] - 8) : 0;
else
val8 = (mcsbase[1] > 6) ? (mcsbase[1] - 6) : 0;
base = i != 2 ? 8 : 6;
val8 = max_t(int, val8 - base, 0);
rtl8xxxu_write8(priv, REG_OFDM0_XD_TX_IQ_IMBALANCE + i, val8);
}
}
......@@ -4385,7 +4340,7 @@ static int rtl8xxxu_init_device(struct ieee80211_hw *hw)
/* Let the 8051 take control of antenna setting */
if (priv->rtl_chip != RTL8192E && priv->rtl_chip != RTL8188F &&
priv->rtl_chip != RTL8710B) {
priv->rtl_chip != RTL8710B && priv->rtl_chip != RTL8192C) {
val8 = rtl8xxxu_read8(priv, REG_LEDCFG2);
val8 |= LEDCFG2_DPDT_SELECT;
rtl8xxxu_write8(priv, REG_LEDCFG2, val8);
......@@ -6474,8 +6429,7 @@ int rtl8xxxu_parse_rxdesc16(struct rtl8xxxu_priv *priv, struct sk_buff *skb)
rx_status->flag |= RX_FLAG_MACTIME_START;
if (!rx_desc->swdec &&
!(_ieee80211_is_robust_mgmt_frame(hdr) &&
ieee80211_has_protected(hdr->frame_control)))
rx_desc->security != RX_DESC_ENC_NONE)
rx_status->flag |= RX_FLAG_DECRYPTED;
if (rx_desc->crc32)
rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
......@@ -6581,8 +6535,7 @@ int rtl8xxxu_parse_rxdesc24(struct rtl8xxxu_priv *priv, struct sk_buff *skb)
rx_status->flag |= RX_FLAG_MACTIME_START;
if (!rx_desc->swdec &&
!(_ieee80211_is_robust_mgmt_frame(hdr) &&
ieee80211_has_protected(hdr->frame_control)))
rx_desc->security != RX_DESC_ENC_NONE)
rx_status->flag |= RX_FLAG_DECRYPTED;
if (rx_desc->crc32)
rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
......
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
View file @ 2d6c7177
......@@ -5,8 +5,9 @@
* Register definitions taken from original Realtek rtl8723au driver
*/
#include <asm/byteorder.h>
#include <linux/average.h>
#include <linux/usb.h>
#include <net/mac80211.h>
#define RTL8XXXU_DEBUG_REG_WRITE 0x01
#define RTL8XXXU_DEBUG_REG_READ 0x02
......@@ -122,6 +123,15 @@ enum rtl8xxxu_rx_type {
RX_TYPE_ERROR = -1
};
enum rtl8xxxu_rx_desc_enc {
RX_DESC_ENC_NONE = 0,
RX_DESC_ENC_WEP40 = 1,
RX_DESC_ENC_TKIP_WO_MIC = 2,
RX_DESC_ENC_TKIP_MIC = 3,
RX_DESC_ENC_AES = 4,
RX_DESC_ENC_WEP104 = 5,
};
struct rtl8xxxu_rxdesc16 {
#ifdef __LITTLE_ENDIAN
u32 pktlen:14;
......@@ -2022,7 +2032,6 @@ struct rtl8xxxu_fileops {
extern int rtl8xxxu_debug;
extern const struct rtl8xxxu_reg8val rtl8xxxu_gen1_mac_init_table[];
extern const u32 rtl8xxxu_iqk_phy_iq_bb_reg[];
u8 rtl8xxxu_read8(struct rtl8xxxu_priv *priv, u16 addr);
u16 rtl8xxxu_read16(struct rtl8xxxu_priv *priv, u16 addr);
......
drivers/net/wireless/realtek/rtlwifi/Kconfig
View file @ 2d6c7177
......@@ -37,6 +37,7 @@ config RTL8192SE
config RTL8192DE
tristate "Realtek RTL8192DE/RTL8188DE PCIe Wireless Network Adapter"
depends on PCI
select RTL8192D_COMMON
select RTLWIFI
select RTLWIFI_PCI
help
......@@ -142,6 +143,9 @@ config RTL8192C_COMMON
depends on RTL8192CE || RTL8192CU
default y
config RTL8192D_COMMON
tristate
config RTL8723_COMMON
tristate
depends on RTL8723AE || RTL8723BE
......
drivers/net/wireless/realtek/rtlwifi/Makefile
View file @ 2d6c7177
......@@ -23,6 +23,7 @@ obj-$(CONFIG_RTL8192C_COMMON) += rtl8192c/
obj-$(CONFIG_RTL8192CE) += rtl8192ce/
obj-$(CONFIG_RTL8192CU) += rtl8192cu/
obj-$(CONFIG_RTL8192SE) += rtl8192se/
obj-$(CONFIG_RTL8192D_COMMON) += rtl8192d/
obj-$(CONFIG_RTL8192DE) += rtl8192de/
obj-$(CONFIG_RTL8723AE) += rtl8723ae/
obj-$(CONFIG_RTL8723BE) += rtl8723be/
......
drivers/net/wireless/realtek/rtlwifi/cam.c
View file @ 2d6c7177
......@@ -18,7 +18,8 @@ void rtl_cam_reset_sec_info(struct ieee80211_hw *hw)
}
static void rtl_cam_program_entry(struct ieee80211_hw *hw, u32 entry_no,
u8 *mac_addr, u8 *key_cont_128, u16 us_config)
const u8 *mac_addr, u8 *key_cont_128,
u16 us_config)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
......@@ -94,7 +95,7 @@ static void rtl_cam_program_entry(struct ieee80211_hw *hw, u32 entry_no,
"after set key, usconfig:%x\n", us_config);
}
u8 rtl_cam_add_one_entry(struct ieee80211_hw *hw, u8 *mac_addr,
u8 rtl_cam_add_one_entry(struct ieee80211_hw *hw, const u8 *mac_addr,
u32 ul_key_id, u32 ul_entry_idx, u32 ul_enc_alg,
u32 ul_default_key, u8 *key_content)
{
......
drivers/net/wireless/realtek/rtlwifi/cam.h
View file @ 2d6c7177
......@@ -14,9 +14,9 @@
#define CAM_CONFIG_NO_USEDK 0
void rtl_cam_reset_all_entry(struct ieee80211_hw *hw);
u8 rtl_cam_add_one_entry(struct ieee80211_hw *hw, u8 *mac_addr,
u32 ul_key_id, u32 ul_entry_idx, u32 ul_enc_alg,
u32 ul_default_key, u8 *key_content);
u8 rtl_cam_add_one_entry(struct ieee80211_hw *hw, const u8 *mac_addr,
u32 ul_key_id, u32 ul_entry_idx, u32 ul_enc_alg,
u32 ul_default_key, u8 *key_content);
int rtl_cam_delete_one_entry(struct ieee80211_hw *hw, u8 *mac_addr,
u32 ul_key_id);
void rtl_cam_mark_invalid(struct ieee80211_hw *hw, u8 uc_index);
......
drivers/net/wireless/realtek/rtlwifi/efuse.c
View file @ 2d6c7177
......@@ -1211,7 +1211,7 @@ static u8 efuse_calculate_word_cnts(u8 word_en)
}
int rtl_get_hwinfo(struct ieee80211_hw *hw, struct rtl_priv *rtlpriv,
int max_size, u8 *hwinfo, int *params)
int max_size, u8 *hwinfo, const int *params)
{
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
......
drivers/net/wireless/realtek/rtlwifi/efuse.h
View file @ 2d6c7177
......@@ -89,7 +89,7 @@ void efuse_force_write_vendor_id(struct ieee80211_hw *hw);
void efuse_re_pg_section(struct ieee80211_hw *hw, u8 section_idx);
void efuse_power_switch(struct ieee80211_hw *hw, u8 write, u8 pwrstate);
int rtl_get_hwinfo(struct ieee80211_hw *hw, struct rtl_priv *rtlpriv,
int max_size, u8 *hwinfo, int *params);
int max_size, u8 *hwinfo, const int *params);
void rtl_fill_dummy(u8 *pfwbuf, u32 *pfwlen);
void rtl_fw_page_write(struct ieee80211_hw *hw, u32 page, u8 *buffer,
u32 size);
......
drivers/net/wireless/realtek/rtlwifi/rtl8192d/Makefile 0 → 100644
View file @ 2d6c7177
# SPDX-License-Identifier: GPL-2.0
rtl8192d-common-objs := \
dm_common.o \
fw_common.o \
hw_common.o \
main.o \
phy_common.o \
rf_common.o \
trx_common.o
obj-$(CONFIG_RTL8192D_COMMON) += rtl8192d-common.o
drivers/net/wireless/realtek/rtlwifi/rtl8192d/dm_common.c 0 → 100644
View file @ 2d6c7177
This diff is collapsed.
drivers/net/wireless/realtek/rtlwifi/rtl8192d/dm_common.h 0 → 100644
View file @ 2d6c7177
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright(c) 2009-2012 Realtek Corporation.*/
#ifndef __RTL92D_DM_COMMON_H__
#define __RTL92D_DM_COMMON_H__
#define HAL_DM_DIG_DISABLE BIT(0)
#define HAL_DM_HIPWR_DISABLE BIT(1)
#define OFDM_TABLE_LENGTH 37
#define OFDM_TABLE_SIZE_92D 43
#define CCK_TABLE_LENGTH 33
#define CCK_TABLE_SIZE 33
#define BW_AUTO_SWITCH_HIGH_LOW 25
#define BW_AUTO_SWITCH_LOW_HIGH 30
#define DM_DIG_FA_UPPER 0x32
#define DM_DIG_FA_LOWER 0x20
#define DM_DIG_FA_TH0 0x100
#define DM_DIG_FA_TH1 0x400
#define DM_DIG_FA_TH2 0x600
#define RXPATHSELECTION_SS_TH_LOW 30
#define RXPATHSELECTION_DIFF_TH 18
#define DM_RATR_STA_INIT 0
#define DM_RATR_STA_HIGH 1
#define DM_RATR_STA_MIDDLE 2
#define DM_RATR_STA_LOW 3
#define CTS2SELF_THVAL 30
#define REGC38_TH 20
#define WAIOTTHVAL 25
#define TXHIGHPWRLEVEL_NORMAL 0
#define TXHIGHPWRLEVEL_LEVEL1 1
#define TXHIGHPWRLEVEL_LEVEL2 2
#define TXHIGHPWRLEVEL_BT1 3
#define TXHIGHPWRLEVEL_BT2 4
#define DM_TYPE_BYFW 0
#define DM_TYPE_BYDRIVER 1
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
#define INDEX_MAPPING_NUM 13
enum dm_1r_cca {
CCA_1R = 0,
CCA_2R = 1,
CCA_MAX = 2,
};
enum dm_rf {
RF_SAVE = 0,
RF_NORMAL = 1,
RF_MAX = 2,
};
enum dm_sw_ant_switch {
ANS_ANTENNA_B = 1,
ANS_ANTENNA_A = 2,
ANS_ANTENNA_MAX = 3,
};
void rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw *hw);
void rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw *hw);
void rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw);
void rtl92d_dm_find_minimum_rssi(struct ieee80211_hw *hw);
void rtl92d_dm_write_dig(struct ieee80211_hw *hw);
void rtl92d_dm_dig(struct ieee80211_hw *hw);
void rtl92d_dm_init_edca_turbo(struct ieee80211_hw *hw);
void rtl92d_dm_check_edca_turbo(struct ieee80211_hw *hw);
void rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw);
#endif
drivers/net/wireless/realtek/rtlwifi/rtl8192d/fw_common.c 0 → 100644
View file @ 2d6c7177
This diff is collapsed.
drivers/net/wireless/realtek/rtlwifi/rtl8192d/fw_common.h 0 → 100644
View file @ 2d6c7177
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright(c) 2009-2012 Realtek Corporation.*/
#ifndef __RTL92D_FW_COMMON_H__
#define __RTL92D_FW_COMMON_H__
#define FW_8192D_START_ADDRESS 0x1000
#define FW_8192D_PAGE_SIZE 4096
#define FW_8192D_POLLING_TIMEOUT_COUNT 1000
#define IS_FW_HEADER_EXIST(_pfwhdr) \
((GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFF0) == 0x92C0 || \
(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFF0) == 0x88C0 || \
(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D0 || \
(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D1 || \
(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D2 || \
(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D3)
/* Firmware Header(8-byte alinment required) */
/* --- LONG WORD 0 ---- */
#define GET_FIRMWARE_HDR_SIGNATURE(__fwhdr) \
le32_get_bits(*(__le32 *)__fwhdr, GENMASK(15, 0))
#define GET_FIRMWARE_HDR_VERSION(__fwhdr) \
le32_get_bits(*(__le32 *)((__fwhdr) + 4), GENMASK(15, 0))
#define GET_FIRMWARE_HDR_SUB_VER(__fwhdr) \
le32_get_bits(*(__le32 *)((__fwhdr) + 4), GENMASK(23, 16))
#define RAID_MASK GENMASK(31, 28)
#define RATE_MASK_MASK GENMASK(27, 0)
#define SHORT_GI_MASK BIT(5)
#define MACID_MASK GENMASK(4, 0)
struct rtl92d_rate_mask_h2c {
__le32 rate_mask_and_raid;
u8 macid_and_short_gi;
} __packed;
bool rtl92d_is_fw_downloaded(struct rtl_priv *rtlpriv);
void rtl92d_enable_fw_download(struct ieee80211_hw *hw, bool enable);
void rtl92d_write_fw(struct ieee80211_hw *hw,
enum version_8192d version, u8 *buffer, u32 size);
int rtl92d_fw_free_to_go(struct ieee80211_hw *hw);
void rtl92d_firmware_selfreset(struct ieee80211_hw *hw);
int rtl92d_fw_init(struct ieee80211_hw *hw);
void rtl92d_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
u32 cmd_len, u8 *p_cmdbuffer);
void rtl92d_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus);
#endif
drivers/net/wireless/realtek/rtlwifi/rtl8192d/hw_common.c 0 → 100644
View file @ 2d6c7177
This diff is collapsed.
drivers/net/wireless/realtek/rtlwifi/rtl8192d/hw_common.h 0 → 100644
View file @ 2d6c7177
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright(c) 2009-2012 Realtek Corporation.*/
#ifndef __RTL92D_HW_COMMON_H__
#define __RTL92D_HW_COMMON_H__
void rtl92de_stop_tx_beacon(struct ieee80211_hw *hw);
void rtl92de_resume_tx_beacon(struct ieee80211_hw *hw);
void rtl92d_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val);
void rtl92d_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val);
bool rtl92de_llt_write(struct ieee80211_hw *hw, u32 address, u32 data);
void rtl92de_enable_hw_security_config(struct ieee80211_hw *hw);
void rtl92de_set_qos(struct ieee80211_hw *hw, int aci);
void rtl92de_read_eeprom_info(struct ieee80211_hw *hw);
void rtl92de_update_hal_rate_tbl(struct ieee80211_hw *hw,
struct ieee80211_sta *sta,
u8 rssi_level, bool update_bw);
void rtl92de_update_channel_access_setting(struct ieee80211_hw *hw);
bool rtl92de_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid);
void rtl92de_set_key(struct ieee80211_hw *hw, u32 key_index,
u8 *p_macaddr, bool is_group, u8 enc_algo,
bool is_wepkey, bool clear_all);
#endif
drivers/net/wireless/realtek/rtlwifi/rtl8192d/main.c 0 → 100644
View file @ 2d6c7177
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2009-2012 Realtek Corporation.*/
#include "../wifi.h"
#include <linux/module.h>
MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Realtek 8192D 802.11n common routines");
drivers/net/wireless/realtek/rtlwifi/rtl8192d/phy_common.c 0 → 100644
View file @ 2d6c7177
This diff is collapsed.
drivers/net/wireless/realtek/rtlwifi/rtl8192d/phy_common.h 0 → 100644
View file @ 2d6c7177
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright(c) 2009-2012 Realtek Corporation.*/
#ifndef __RTL92D_PHY_COMMON_H__
#define __RTL92D_PHY_COMMON_H__
#define TARGET_CHNL_NUM_5G 221
#define TARGET_CHNL_NUM_2G 14
#define CV_CURVE_CNT 64
#define RT_CANNOT_IO(hw) false
#define RX_INDEX_MAPPING_NUM 15
#define IQK_BB_REG_NUM 10
#define IQK_DELAY_TIME 1
#define MAX_TOLERANCE 5
#define MAX_TOLERANCE_92D 3
enum baseband_config_type {
BASEBAND_CONFIG_PHY_REG = 0,
BASEBAND_CONFIG_AGC_TAB = 1,
};
enum rf_content {
radioa_txt = 0,
radiob_txt = 1,
radioc_txt = 2,
radiod_txt = 3
};
static inline void rtl92d_acquire_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
unsigned long *flag)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
if (rtlpriv->rtlhal.interface == INTF_USB)
return;
if (rtlpriv->rtlhal.interfaceindex == 1)
spin_lock_irqsave(&rtlpriv->locks.cck_and_rw_pagea_lock, *flag);
}
static inline void rtl92d_release_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
unsigned long *flag)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
if (rtlpriv->rtlhal.interface == INTF_USB)
return;
if (rtlpriv->rtlhal.interfaceindex == 1)
spin_unlock_irqrestore(&rtlpriv->locks.cck_and_rw_pagea_lock,
*flag);
}
u32 rtl92d_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
u32 regaddr, u32 bitmask);
void rtl92d_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
u32 regaddr, u32 bitmask, u32 data);
void rtl92d_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw);
void rtl92d_store_pwrindex_diffrate_offset(struct ieee80211_hw *hw,
u32 regaddr, u32 bitmask, u32 data);
void rtl92d_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
void rtl92d_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel);
void rtl92d_phy_enable_rf_env(struct ieee80211_hw *hw, u8 rfpath,
u32 *pu4_regval);
void rtl92d_phy_restore_rf_env(struct ieee80211_hw *hw, u8 rfpath,
u32 *pu4_regval);
u8 rtl92d_get_rightchnlplace_for_iqk(u8 chnl);
void rtl92d_phy_save_adda_registers(struct ieee80211_hw *hw, const u32 *adda_reg,
u32 *adda_backup, u32 regnum);
void rtl92d_phy_save_mac_registers(struct ieee80211_hw *hw,
const u32 *macreg, u32 *macbackup);
void rtl92d_phy_path_adda_on(struct ieee80211_hw *hw,
const u32 *adda_reg, bool patha_on, bool is2t);
void rtl92d_phy_mac_setting_calibration(struct ieee80211_hw *hw,
const u32 *macreg, u32 *macbackup);
void rtl92d_phy_calc_curvindex(struct ieee80211_hw *hw,
const u32 *targetchnl, u32 *curvecount_val,
bool is5g, u32 *curveindex);
void rtl92d_phy_reset_iqk_result(struct ieee80211_hw *hw);
bool rtl92d_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
void rtl92d_phy_config_macphymode(struct ieee80211_hw *hw);
void rtl92d_phy_config_macphymode_info(struct ieee80211_hw *hw);
u8 rtl92d_get_chnlgroup_fromarray(u8 chnl);
u8 rtl92d_phy_get_chnlgroup_bypg(u8 chnlindex);
void rtl92d_phy_config_maccoexist_rfpage(struct ieee80211_hw *hw);
/* Without these declarations sparse warns about context imbalance. */
void rtl92d_acquire_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
unsigned long *flag);
void rtl92d_release_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
unsigned long *flag);
/* Without these helpers and the declarations sparse warns about
* context imbalance.
*/
static inline void rtl92d_pci_lock(struct rtl_priv *rtlpriv)
{
if (rtlpriv->rtlhal.interface == INTF_PCI)
spin_lock(&rtlpriv->locks.rf_lock);
}
static inline void rtl92d_pci_unlock(struct rtl_priv *rtlpriv)
{
if (rtlpriv->rtlhal.interface == INTF_PCI)
spin_unlock(&rtlpriv->locks.rf_lock);
}
void rtl92d_pci_lock(struct rtl_priv *rtlpriv);
void rtl92d_pci_unlock(struct rtl_priv *rtlpriv);
#endif
drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h → drivers/net/wireless/realtek/rtlwifi/rtl8192d/reg.h
View file @ 2d6c7177
......@@ -50,6 +50,9 @@
#define REG_HMEBOX_EXT_1 0x008A
#define REG_HMEBOX_EXT_2 0x008C
#define REG_HMEBOX_EXT_3 0x008E
#define SIZE_OF_REG_HMEBOX_EXT 2
#define REG_EFUSE_ACCESS 0x00CF
#define REG_BIST_SCAN 0x00D0
#define REG_BIST_RPT 0x00D4
......@@ -86,6 +89,7 @@
#define REG_CPWM 0x012F
#define REG_FWIMR 0x0130
#define REG_FWISR 0x0134
#define REG_FTIMR 0x0138
#define REG_PKTBUF_DBG_CTRL 0x0140
#define REG_PKTBUF_DBG_DATA_L 0x0144
#define REG_PKTBUF_DBG_DATA_H 0x0148
......@@ -109,6 +113,7 @@
#define REG_HMEBOX_1 0x01D4
#define REG_HMEBOX_2 0x01D8
#define REG_HMEBOX_3 0x01DC
#define SIZE_OF_REG_HMEBOX 4
#define REG_LLT_INIT 0x01E0
#define REG_BB_ACCEESS_CTRL 0x01E8
......@@ -197,6 +202,8 @@
#define REG_POWER_STAGE1 0x04B4
#define REG_POWER_STAGE2 0x04B8
#define REG_PKT_LIFE_TIME 0x04C0
#define REG_PKT_VO_VI_LIFE_TIME 0x04C0
#define REG_PKT_BE_BK_LIFE_TIME 0x04C2
#define REG_STBC_SETTING 0x04C4
#define REG_PROT_MODE_CTRL 0x04C8
#define REG_MAX_AGGR_NUM 0x04CA
......@@ -233,6 +240,7 @@
#define REG_RD_NAV_NXT 0x0544
#define REG_NAV_PROT_LEN 0x0546
#define REG_BCN_CTRL 0x0550
#define REG_BCN_CTRL_1 0x0551
#define REG_MBID_NUM 0x0552
#define REG_DUAL_TSF_RST 0x0553
#define REG_BCN_INTERVAL 0x0554
......@@ -319,6 +327,8 @@
#define REG_BT_COEX_TABLE 0x06C0
#define REG_WMAC_RESP_TXINFO 0x06D8
#define REG_USB_Queue_Select_MAC0 0xFE44
#define REG_USB_Queue_Select_MAC1 0xFE47
/* ----------------------------------------------------- */
/* Redifine 8192C register definition for compatibility */
......@@ -355,27 +365,27 @@
#define RRSR_RSC_UPSUBCHNL 0x400000
#define RRSR_RSC_LOWSUBCHNL 0x200000
#define RRSR_SHORT 0x800000
#define RRSR_1M BIT0
#define RRSR_2M BIT1
#define RRSR_5_5M BIT2
#define RRSR_11M BIT3
#define RRSR_6M BIT4
#define RRSR_9M BIT5
#define RRSR_12M BIT6
#define RRSR_18M BIT7
#define RRSR_24M BIT8
#define RRSR_36M BIT9
#define RRSR_48M BIT10
#define RRSR_54M BIT11
#define RRSR_MCS0 BIT12
#define RRSR_MCS1 BIT13
#define RRSR_MCS2 BIT14
#define RRSR_MCS3 BIT15
#define RRSR_MCS4 BIT16
#define RRSR_MCS5 BIT17
#define RRSR_MCS6 BIT18
#define RRSR_MCS7 BIT19
#define BRSR_ACKSHORTPMB BIT23
#define RRSR_1M BIT(0)
#define RRSR_2M BIT(1)
#define RRSR_5_5M BIT(2)
#define RRSR_11M BIT(3)
#define RRSR_6M BIT(4)
#define RRSR_9M BIT(5)
#define RRSR_12M BIT(6)
#define RRSR_18M BIT(7)
#define RRSR_24M BIT(8)
#define RRSR_36M BIT(9)
#define RRSR_48M BIT(10)
#define RRSR_54M BIT(11)
#define RRSR_MCS0 BIT(12)
#define RRSR_MCS1 BIT(13)
#define RRSR_MCS2 BIT(14)
#define RRSR_MCS3 BIT(15)
#define RRSR_MCS4 BIT(16)
#define RRSR_MCS5 BIT(17)
#define RRSR_MCS6 BIT(18)
#define RRSR_MCS7 BIT(19)
#define BRSR_ACKSHORTPMB BIT(23)
/* ----------------------------------------------------- */
/* 8192C Rate Definition */
......@@ -600,7 +610,11 @@
#define EEPROM_SVID 0x2C /* SE Vendor ID.E-F */
#define EEPROM_SMID 0x2E /* SE PCI Subsystem ID. 10-11 */
#define EEPROM_VID_USB 0xC
#define EEPROM_PID_USB 0xE
#define EEPROM_ENDPOINT_SETTING 0x10
#define EEPROM_MAC_ADDR 0x16 /* SEMAC Address. 12-17 */
#define EEPROM_MAC_ADDR_MAC0_92DU 0x19
#define EEPROM_MAC_ADDR_MAC0_92D 0x55
#define EEPROM_MAC_ADDR_MAC1_92D 0x5B
......@@ -915,6 +929,42 @@
#define BD_HCI_SEL BIT(26)
#define TYPE_ID BIT(27)
#define HCI_TXDMA_EN BIT(0)
#define HCI_RXDMA_EN BIT(1)
#define TXDMA_EN BIT(2)
#define RXDMA_EN BIT(3)
#define PROTOCOL_EN BIT(4)
#define SCHEDULE_EN BIT(5)
#define MACTXEN BIT(6)
#define MACRXEN BIT(7)
#define ENSWBCN BIT(8)
#define ENSEC BIT(9)
#define HQSEL_VOQ BIT(0)
#define HQSEL_VIQ BIT(1)
#define HQSEL_BEQ BIT(2)
#define HQSEL_BKQ BIT(3)
#define HQSEL_MGTQ BIT(4)
#define HQSEL_HIQ BIT(5)
#define TXDMA_HIQ_MAP GENMASK(15, 14)
#define TXDMA_MGQ_MAP GENMASK(13, 12)
#define TXDMA_BKQ_MAP GENMASK(11, 10)
#define TXDMA_BEQ_MAP GENMASK(9, 8)
#define TXDMA_VIQ_MAP GENMASK(7, 6)
#define TXDMA_VOQ_MAP GENMASK(5, 4)
#define QUEUE_LOW 1
#define QUEUE_NORMAL 2
#define QUEUE_HIGH 3
#define HPQ_MASK GENMASK(7, 0)
#define LPQ_MASK GENMASK(15, 8)
#define PUBQ_MASK GENMASK(23, 16)
#define LD_RQPN BIT(31)
#define DROP_DATA_EN BIT(9)
/* LLT_INIT */
#define _LLT_NO_ACTIVE 0x0
#define _LLT_WRITE_ACCESS 0x1
......@@ -929,6 +979,10 @@
/* ----------------------------------------------------- */
/* 0x0400h ~ 0x047Fh Protocol Configuration */
/* ----------------------------------------------------- */
/* FWHW_TXQ_CTRL */
#define EN_AMPDU_RTY_NEW BIT(7)
#define EN_BCNQ_DL BIT(22)
#define RETRY_LIMIT_SHORT_SHIFT 8
#define RETRY_LIMIT_LONG_SHIFT 0
......@@ -942,6 +996,13 @@
#define AC_PARAM_ECW_MIN_OFFSET 8
#define AC_PARAM_AIFS_OFFSET 0
/* REG_RD_CTRL */
#define DIS_EDCA_CNT_DWN BIT(11)
/* REG_BCN_CTRL */
#define EN_BCN_FUNCTION BIT(3)
#define DIS_TSF_UDT BIT(4)
/* ACMHWCTRL */
#define ACMHW_HWEN BIT(0)
#define ACMHW_BEQEN BIT(1)
......@@ -1073,6 +1134,11 @@
#define RCCK0_FACOUNTERLOWER 0xa5c
#define RCCK0_FACOUNTERUPPER 0xa58
#define RPDP_ANTA 0xb00
#define RCONFIG_ANTA 0xb68
#define RCONFIG_ANTB 0xb6c
#define RPDP_ANTB 0xb70
/* 6. PageC(0xC00) */
#define ROFDM0_LSTF 0xc00
......@@ -1126,6 +1192,7 @@
#define ROFDM0_TXPSEUDONOISEWGT 0xce4
#define ROFDM0_FRAMESYNC 0xcf0
#define ROFDM0_DFSREPORT 0xcf4
#define ROFDM0_RXIQEXTANTA 0xca0
#define ROFDM0_TXCOEFF1 0xca4
#define ROFDM0_TXCOEFF2 0xca8
#define ROFDM0_TXCOEFF3 0xcac
......@@ -1184,17 +1251,70 @@
#define RTXAGC_B_MCS15_MCS12 0x868
#define RTXAGC_B_CCK11_A_CCK2_11 0x86c
#define RFPGA0_IQK 0xe28
#define RTX_IQK_TONE_A 0xe30
#define RRX_IQK_TONE_A 0xe34
#define RTX_IQK_PI_A 0xe38
#define RRX_IQK_PI_A 0xe3c
#define RTX_IQK 0xe40
#define RRX_IQK 0xe44
#define RIQK_AGC_PTS 0xe48
#define RIQK_AGC_RSP 0xe4c
#define RTX_IQK_TONE_B 0xe50
#define RRX_IQK_TONE_B 0xe54
#define RTX_IQK_PI_B 0xe58
#define RRX_IQK_PI_B 0xe5c
#define RIQK_AGC_CONT 0xe60
#define RBLUE_TOOTH 0xe6c
#define RRX_WAIT_CCA 0xe70
#define RTX_CCK_RFON 0xe74
#define RTX_CCK_BBON 0xe78
#define RTX_OFDM_RFON 0xe7c
#define RTX_OFDM_BBON 0xe80
#define RTX_TO_RX 0xe84
#define RTX_TO_TX 0xe88
#define RRX_CCK 0xe8c
#define RTX_POWER_BEFORE_IQK_A 0xe94
#define RTX_POWER_AFTER_IQK_A 0xe9c
#define RRX_POWER_BEFORE_IQK_A 0xea0
#define RRX_POWER_BEFORE_IQK_A_2 0xea4
#define RRX_POWER_AFTER_IQK_A 0xea8
#define RRX_POWER_AFTER_IQK_A_2 0xeac
#define RTX_POWER_BEFORE_IQK_B 0xeb4
#define RTX_POWER_AFTER_IQK_B 0xebc
#define RRX_POWER_BEFORE_IQK_B 0xec0
#define RRX_POWER_BEFORE_IQK_B_2 0xec4
#define RRX_POWER_AFTER_IQK_B 0xec8
#define RRX_POWER_AFTER_IQK_B_2 0xecc
#define MASK_IQK_RESULT 0x03ff0000
#define RRX_OFDM 0xed0
#define RRX_WAIT_RIFS 0xed4
#define RRX_TO_RX 0xed8
#define RSTANDBY 0xedc
#define RSLEEP 0xee0
#define RPMPD_ANAEN 0xeec
/* RL6052 Register definition */
#define RF_AC 0x00
#define RF_IQADJ_G1 0x01
#define RF_IQADJ_G2 0x02
#define RF_BS_PA_APSET_G1_G4 0x03
#define RF_POW_TRSW 0x05
#define RF_GAIN_RX 0x06
#define RF_GAIN_TX 0x07
#define RF_TXM_IDAC 0x08
#define RF_TXPA_AG 0x0B
#define RF_BS_IQGEN 0x0F
#define RF_MODE1 0x10
......
drivers/net/wireless/realtek/rtlwifi/rtl8192d/rf_common.c 0 → 100644
View file @ 2d6c7177
This diff is collapsed.
drivers/net/wireless/realtek/rtlwifi/rtl8192d/rf_common.h 0 → 100644
View file @ 2d6c7177
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright(c) 2009-2012 Realtek Corporation.*/
#ifndef __RTL92D_RF_COMMON_H__
#define __RTL92D_RF_COMMON_H__
void rtl92d_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth);
void rtl92d_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw,
u8 *ppowerlevel);
void rtl92d_phy_rf6052_set_ofdm_txpower(struct ieee80211_hw *hw,
u8 *ppowerlevel, u8 channel);
#endif
drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.c 0 → 100644
View file @ 2d6c7177
This diff is collapsed.
drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.h 0 → 100644
View file @ 2d6c7177
This diff is collapsed.
drivers/net/wireless/realtek/rtlwifi/rtl8192de/dm.h
View file @ 2d6c7177
......@@ -4,94 +4,7 @@
#ifndef __RTL92C_DM_H__
#define __RTL92C_DM_H__
#define HAL_DM_DIG_DISABLE BIT(0)
#define HAL_DM_HIPWR_DISABLE BIT(1)
#define OFDM_TABLE_LENGTH 37
#define OFDM_TABLE_SIZE_92D 43
#define CCK_TABLE_LENGTH 33
#define CCK_TABLE_SIZE 33
#define BW_AUTO_SWITCH_HIGH_LOW 25
#define BW_AUTO_SWITCH_LOW_HIGH 30
#define DM_DIG_FA_UPPER 0x32
#define DM_DIG_FA_LOWER 0x20
#define DM_DIG_FA_TH0 0x100
#define DM_DIG_FA_TH1 0x400
#define DM_DIG_FA_TH2 0x600
#define RXPATHSELECTION_SS_TH_LOW 30
#define RXPATHSELECTION_DIFF_TH 18
#define DM_RATR_STA_INIT 0
#define DM_RATR_STA_HIGH 1
#define DM_RATR_STA_MIDDLE 2
#define DM_RATR_STA_LOW 3
#define CTS2SELF_THVAL 30
#define REGC38_TH 20
#define WAIOTTHVAL 25
#define TXHIGHPWRLEVEL_NORMAL 0
#define TXHIGHPWRLEVEL_LEVEL1 1
#define TXHIGHPWRLEVEL_LEVEL2 2
#define TXHIGHPWRLEVEL_BT1 3
#define TXHIGHPWRLEVEL_BT2 4
#define DM_TYPE_BYFW 0
#define DM_TYPE_BYDRIVER 1
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
#define INDEX_MAPPING_NUM 13
struct swat {
u8 failure_cnt;
u8 try_flag;
u8 stop_trying;
long pre_rssi;
long trying_threshold;
u8 cur_antenna;
u8 pre_antenna;
};
enum tag_dynamic_init_gain_operation_type_definition {
DIG_TYPE_THRESH_HIGH = 0,
DIG_TYPE_THRESH_LOW = 1,
DIG_TYPE_BACKOFF = 2,
DIG_TYPE_RX_GAIN_MIN = 3,
DIG_TYPE_RX_GAIN_MAX = 4,
DIG_TYPE_ENABLE = 5,
DIG_TYPE_DISABLE = 6,
DIG_OP_TYPE_MAX
};
enum dm_1r_cca {
CCA_1R = 0,
CCA_2R = 1,
CCA_MAX = 2,
};
enum dm_rf {
RF_SAVE = 0,
RF_NORMAL = 1,
RF_MAX = 2,
};
enum dm_sw_ant_switch {
ANS_ANTENNA_B = 1,
ANS_ANTENNA_A = 2,
ANS_ANTENNA_MAX = 3,
};
void rtl92d_dm_init(struct ieee80211_hw *hw);
void rtl92d_dm_watchdog(struct ieee80211_hw *hw);
void rtl92d_dm_init_edca_turbo(struct ieee80211_hw *hw);
void rtl92d_dm_write_dig(struct ieee80211_hw *hw);
void rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw *hw);
void rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw);
void rtl92de_dm_init(struct ieee80211_hw *hw);
void rtl92de_dm_watchdog(struct ieee80211_hw *hw);
#endif
drivers/net/wireless/realtek/rtlwifi/rtl8192de/fw.h
View file @ 2d6c7177
......@@ -4,44 +4,7 @@
#ifndef __RTL92D__FW__H__
#define __RTL92D__FW__H__
#define FW_8192D_START_ADDRESS 0x1000
#define FW_8192D_PAGE_SIZE 4096
#define FW_8192D_POLLING_TIMEOUT_COUNT 1000
#define IS_FW_HEADER_EXIST(_pfwhdr) \
((GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFF0) == 0x92C0 || \
(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFF0) == 0x88C0 || \
(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D0 || \
(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D1 || \
(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D2 || \
(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D3)
/* Firmware Header(8-byte alinment required) */
/* --- LONG WORD 0 ---- */
#define GET_FIRMWARE_HDR_SIGNATURE(__fwhdr) \
le32_get_bits(*(__le32 *)__fwhdr, GENMASK(15, 0))
#define GET_FIRMWARE_HDR_VERSION(__fwhdr) \
le32_get_bits(*(__le32 *)(__fwhdr + 4), GENMASK(15, 0))
#define GET_FIRMWARE_HDR_SUB_VER(__fwhdr) \
le32_get_bits(*(__le32 *)(__fwhdr + 4), GENMASK(23, 16))
#define pagenum_128(_len) \
(u32)(((_len) >> 7) + ((_len) & 0x7F ? 1 : 0))
#define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__ph2ccmd, __val) \
*(u8 *)__ph2ccmd = __val;
#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__ph2ccmd, __val) \
*(u8 *)__ph2ccmd = __val;
#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__ph2ccmd, __val) \
*(u8 *)(__ph2ccmd + 1) = __val;
#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val) \
*(u8 *)(__ph2ccmd + 2) = __val;
int rtl92d_download_fw(struct ieee80211_hw *hw);
void rtl92d_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
u32 cmd_len, u8 *p_cmdbuffer);
void rtl92d_firmware_selfreset(struct ieee80211_hw *hw);
void rtl92d_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished);
void rtl92d_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus);
#endif
drivers/net/wireless/realtek/rtlwifi/rtl8192de/hw.h
View file @ 2d6c7177
......@@ -5,7 +5,6 @@
#define __RTL92DE_HW_H__
void rtl92de_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val);
void rtl92de_read_eeprom_info(struct ieee80211_hw *hw);
void rtl92de_interrupt_recognized(struct ieee80211_hw *hw,
struct rtl_int *int_vec);
int rtl92de_hw_init(struct ieee80211_hw *hw);
......@@ -14,21 +13,11 @@ void rtl92de_enable_interrupt(struct ieee80211_hw *hw);
void rtl92de_disable_interrupt(struct ieee80211_hw *hw);
int rtl92de_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type);
void rtl92de_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid);
void rtl92de_set_qos(struct ieee80211_hw *hw, int aci);
void rtl92de_set_beacon_related_registers(struct ieee80211_hw *hw);
void rtl92de_set_beacon_interval(struct ieee80211_hw *hw);
void rtl92de_update_interrupt_mask(struct ieee80211_hw *hw,
u32 add_msr, u32 rm_msr);
void rtl92de_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val);
void rtl92de_update_hal_rate_tbl(struct ieee80211_hw *hw,
struct ieee80211_sta *sta, u8 rssi_level,
bool update_bw);
void rtl92de_update_channel_access_setting(struct ieee80211_hw *hw);
bool rtl92de_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid);
void rtl92de_enable_hw_security_config(struct ieee80211_hw *hw);
void rtl92de_set_key(struct ieee80211_hw *hw, u32 key_index,
u8 *p_macaddr, bool is_group, u8 enc_algo,
bool is_wepkey, bool clear_all);
void rtl92de_write_dword_dbi(struct ieee80211_hw *hw, u16 offset, u32 value,
u8 direct);
......
drivers/net/wireless/realtek/rtlwifi/rtl8192de/led.c
View file @ 2d6c7177
......@@ -3,7 +3,7 @@
#include "../wifi.h"
#include "../pci.h"
#include "reg.h"
#include "../rtl8192d/reg.h"
#include "led.h"
void rtl92de_sw_led_on(struct ieee80211_hw *hw, enum rtl_led_pin pin)
......
drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.h
View file @ 2d6c7177
......@@ -10,11 +10,8 @@
#define MAX_DOZE_WAITING_TIMES_9x 64
#define RT_CANNOT_IO(hw) false
#define HIGHPOWER_RADIOA_ARRAYLEN 22
#define MAX_TOLERANCE 5
#define APK_BB_REG_NUM 5
#define APK_AFE_REG_NUM 16
#define APK_CURVE_REG_NUM 4
......@@ -27,12 +24,8 @@
#define RESET_CNT_LIMIT 3
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM 10
#define IQK_BB_REG_NUM_test 6
#define IQK_MAC_REG_NUM 4
#define RX_INDEX_MAPPING_NUM 15
#define IQK_DELAY_TIME 1
#define CT_OFFSET_MAC_ADDR 0X16
......@@ -68,80 +61,30 @@ struct swchnlcmd {
u32 msdelay;
};
enum baseband_config_type {
BASEBAND_CONFIG_PHY_REG = 0,
BASEBAND_CONFIG_AGC_TAB = 1,
};
enum rf_content {
radioa_txt = 0,
radiob_txt = 1,
radioc_txt = 2,
radiod_txt = 3
};
static inline void rtl92d_acquire_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
unsigned long *flag)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
if (rtlpriv->rtlhal.interfaceindex == 1)
spin_lock_irqsave(&rtlpriv->locks.cck_and_rw_pagea_lock, *flag);
}
static inline void rtl92d_release_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
unsigned long *flag)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
if (rtlpriv->rtlhal.interfaceindex == 1)
spin_unlock_irqrestore(&rtlpriv->locks.cck_and_rw_pagea_lock,
*flag);
}
u32 rtl92d_phy_query_bb_reg(struct ieee80211_hw *hw,
u32 regaddr, u32 bitmask);
void rtl92d_phy_set_bb_reg(struct ieee80211_hw *hw,
u32 regaddr, u32 bitmask, u32 data);
u32 rtl92d_phy_query_rf_reg(struct ieee80211_hw *hw,
enum radio_path rfpath, u32 regaddr,
u32 bitmask);
void rtl92d_phy_set_rf_reg(struct ieee80211_hw *hw,
enum radio_path rfpath, u32 regaddr,
u32 bitmask, u32 data);
bool rtl92d_phy_mac_config(struct ieee80211_hw *hw);
bool rtl92d_phy_bb_config(struct ieee80211_hw *hw);
bool rtl92d_phy_rf_config(struct ieee80211_hw *hw);
bool rtl92c_phy_config_rf_with_feaderfile(struct ieee80211_hw *hw,
enum radio_path rfpath);
void rtl92d_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
void rtl92d_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel);
void rtl92d_phy_set_bw_mode(struct ieee80211_hw *hw,
enum nl80211_channel_type ch_type);
u8 rtl92d_phy_sw_chnl(struct ieee80211_hw *hw);
bool rtl92d_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
enum rf_content content,
enum radio_path rfpath);
bool rtl92d_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
bool rtl92d_phy_set_rf_power_state(struct ieee80211_hw *hw,
enum rf_pwrstate rfpwr_state);
void rtl92d_phy_config_macphymode(struct ieee80211_hw *hw);
void rtl92d_phy_config_macphymode_info(struct ieee80211_hw *hw);
u8 rtl92d_get_chnlgroup_fromarray(u8 chnl);
void rtl92d_phy_set_poweron(struct ieee80211_hw *hw);
void rtl92d_phy_config_maccoexist_rfpage(struct ieee80211_hw *hw);
bool rtl92d_phy_check_poweroff(struct ieee80211_hw *hw);
void rtl92d_phy_lc_calibrate(struct ieee80211_hw *hw);
void rtl92d_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t);
void rtl92d_update_bbrf_configuration(struct ieee80211_hw *hw);
void rtl92d_phy_ap_calibrate(struct ieee80211_hw *hw, s8 delta);
void rtl92d_phy_iq_calibrate(struct ieee80211_hw *hw);
void rtl92d_phy_reset_iqk_result(struct ieee80211_hw *hw);
void rtl92d_release_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
unsigned long *flag);
void rtl92d_acquire_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
unsigned long *flag);
u8 rtl92d_get_rightchnlplace_for_iqk(u8 chnl);
void rtl92d_phy_reload_iqk_setting(struct ieee80211_hw *hw, u8 channel);
#endif
drivers/net/wireless/realtek/rtlwifi/rtl8192de/rf.h
View file @ 2d6c7177
......@@ -4,11 +4,6 @@
#ifndef __RTL92D_RF_H__
#define __RTL92D_RF_H__
void rtl92d_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth);
void rtl92d_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw,
u8 *ppowerlevel);
void rtl92d_phy_rf6052_set_ofdm_txpower(struct ieee80211_hw *hw,
u8 *ppowerlevel, u8 channel);
bool rtl92d_phy_rf6052_config(struct ieee80211_hw *hw);
bool rtl92d_phy_enable_anotherphy(struct ieee80211_hw *hw, bool bmac0);
void rtl92d_phy_powerdown_anotherphy(struct ieee80211_hw *hw, bool bmac0);
......
drivers/net/wireless/realtek/rtlwifi/rtl8192de/sw.c
View file @ 2d6c7177
......@@ -5,8 +5,12 @@
#include "../core.h"
#include "../pci.h"
#include "../base.h"
#include "reg.h"
#include "def.h"
#include "../rtl8192d/reg.h"
#include "../rtl8192d/def.h"
#include "../rtl8192d/dm_common.h"
#include "../rtl8192d/hw_common.h"
#include "../rtl8192d/phy_common.h"
#include "../rtl8192d/trx_common.h"
#include "phy.h"
#include "dm.h"
#include "hw.h"
......@@ -207,7 +211,7 @@ static struct rtl_hal_ops rtl8192de_hal_ops = {
.radio_onoff_checking = rtl92de_gpio_radio_on_off_checking,
.set_bw_mode = rtl92d_phy_set_bw_mode,
.switch_channel = rtl92d_phy_sw_chnl,
.dm_watchdog = rtl92d_dm_watchdog,
.dm_watchdog = rtl92de_dm_watchdog,
.scan_operation_backup = rtl_phy_scan_operation_backup,
.set_rf_power_state = rtl92d_phy_set_rf_power_state,
.led_control = rtl92de_led_control,
......@@ -223,6 +227,8 @@ static struct rtl_hal_ops rtl8192de_hal_ops = {
.set_rfreg = rtl92d_phy_set_rf_reg,
.linked_set_reg = rtl92d_linked_set_reg,
.get_btc_status = rtl_btc_status_false,
.phy_iq_calibrate = rtl92d_phy_iq_calibrate,
.phy_lc_calibrate = rtl92d_phy_lc_calibrate,
};
static struct rtl_mod_params rtl92de_mod_params = {
......
drivers/net/wireless/realtek/rtlwifi/usb.c
View file @ 2d6c7177
......@@ -979,6 +979,9 @@ int rtl_usb_probe(struct usb_interface *intf,
usb_priv->dev.intf = intf;
usb_priv->dev.udev = udev;
usb_set_intfdata(intf, hw);
/* For dual MAC RTL8192DU, which has two interfaces. */
rtlpriv->rtlhal.interfaceindex =
intf->altsetting[0].desc.bInterfaceNumber;
/* init cfg & intf_ops */
rtlpriv->rtlhal.interface = INTF_USB;
rtlpriv->cfg = rtl_hal_cfg;
......
drivers/net/wireless/realtek/rtlwifi/wifi.h
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drivers/net/wireless/realtek/rtw88/debug.h
View file @ 2d6c7177
......@@ -26,6 +26,7 @@ enum rtw_debug_mask {
RTW_DBG_STATE = 0x00020000,
RTW_DBG_SDIO = 0x00040000,
RTW_DBG_UNEXP = 0x80000000,
RTW_DBG_ALL = 0xffffffff
};
......
drivers/net/wireless/realtek/rtw88/mac.c
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drivers/net/wireless/realtek/rtw88/pci.c
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drivers/net/wireless/realtek/rtw89/acpi.c
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drivers/net/wireless/realtek/rtw89/acpi.h
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drivers/net/wireless/realtek/rtw89/cam.c
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drivers/net/wireless/realtek/rtw89/cam.h
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drivers/net/wireless/realtek/rtw89/coex.c
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drivers/net/wireless/realtek/rtw89/coex.h
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drivers/net/wireless/realtek/rtw89/core.c
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drivers/net/wireless/realtek/rtw89/core.h
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drivers/net/wireless/realtek/rtw89/fw.c
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drivers/net/wireless/realtek/rtw89/fw.h
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drivers/net/wireless/realtek/rtw89/mac.c
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drivers/net/wireless/realtek/rtw89/mac.h
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drivers/net/wireless/realtek/rtw89/mac_be.c
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drivers/net/wireless/realtek/rtw89/pci.c
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drivers/net/wireless/realtek/rtw89/phy.c
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drivers/net/wireless/realtek/rtw89/ps.c
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drivers/net/wireless/realtek/rtw89/reg.h
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drivers/net/wireless/realtek/rtw89/regd.c
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drivers/net/wireless/realtek/rtw89/sar.h
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drivers/net/wireless/realtek/rtw89/wow.c
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drivers/net/wireless/realtek/rtw89/wow.h
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