Commit 2ed9ae81 authored by Herve Codina's avatar Herve Codina Committed by Bjorn Helgaas

dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for R9A06G032

Add internal PCI bridge support for the R9A06G032 SOC. The Renesas RZ/N1D
(R9A06G032) internal PCI bridge is compatible with the one present in the
R-Car Gen2 family, but compared to R-Car Gen2, it needs three clocks
instead of one.

The 'resets' property is not required for the RZ/N1 family.

Link: https://lore.kernel.org/r/20220520094155.313784-3-herve.codina@bootlin.comSigned-off-by: default avatarHerve Codina <herve.codina@bootlin.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
parent 409ae431
...@@ -15,9 +15,6 @@ description: | ...@@ -15,9 +15,6 @@ description: |
AHB. There is one bridge instance per USB port connected to the internal AHB. There is one bridge instance per USB port connected to the internal
OHCI and EHCI controllers. OHCI and EHCI controllers.
allOf:
- $ref: /schemas/pci/pci-bus.yaml#
properties: properties:
compatible: compatible:
oneOf: oneOf:
...@@ -32,6 +29,10 @@ properties: ...@@ -32,6 +29,10 @@ properties:
- renesas,pci-r8a7793 # R-Car M2-N - renesas,pci-r8a7793 # R-Car M2-N
- renesas,pci-r8a7794 # R-Car E2 - renesas,pci-r8a7794 # R-Car E2
- const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1 - const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1
- items:
- enum:
- renesas,pci-r9a06g032 # RZ/N1D
- const: renesas,pci-rzn1 # RZ/N1
reg: reg:
items: items:
...@@ -41,13 +42,9 @@ properties: ...@@ -41,13 +42,9 @@ properties:
interrupts: interrupts:
maxItems: 1 maxItems: 1
clocks: clocks: true
items:
- description: Device clock
clock-names: clock-names: true
items:
- const: pclk
resets: resets:
maxItems: 1 maxItems: 1
...@@ -106,13 +103,46 @@ required: ...@@ -106,13 +103,46 @@ required:
- interrupt-map - interrupt-map
- interrupt-map-mask - interrupt-map-mask
- clocks - clocks
- resets
- power-domains - power-domains
- bus-range - bus-range
- "#address-cells" - "#address-cells"
- "#size-cells" - "#size-cells"
- "#interrupt-cells" - "#interrupt-cells"
allOf:
- $ref: /schemas/pci/pci-bus.yaml#
- if:
properties:
compatible:
contains:
enum:
- renesas,pci-rzn1
then:
properties:
clocks:
items:
- description: Internal bus clock (AHB) for HOST
- description: Internal bus clock (AHB) Power Management
- description: PCI clock for USB subsystem
clock-names:
items:
- const: hclkh
- const: hclkpm
- const: pciclk
required:
- clock-names
else:
properties:
clocks:
items:
- description: Device clock
clock-names:
items:
- const: pclk
required:
- resets
unevaluatedProperties: false unevaluatedProperties: false
examples: examples:
......
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