Commit 2f519c6e authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://linux-dj.bkbits.net/agpgart

into laptop.osdl.org:/home/torvalds/v2.5/linux
parents 3ad142f9 e2c8fd94
......@@ -76,7 +76,6 @@ static u32 northbridge_flush_word[NR_CPUS + 1];
#define EMERGENCY_PAGES 32 /* = 128KB */
#ifdef CONFIG_AGP
extern int agp_init(void);
#define AGPEXTERN extern
#else
#define AGPEXTERN
......
......@@ -80,8 +80,8 @@ config AGP_INTEL
tristate "Intel 440LX/BX/GX, I8xx and E7x05 chipset support"
depends on AGP && X86 && !X86_64
help
This option gives you AGP support for the GLX component of
XFree86 4.x on Intel 440LX/BX/GX, 815, 820, 830, 840, 845, 850, 860
This option gives you AGP support for the GLX component of XFree86 4.x
on Intel 440LX/BX/GX, 815, 820, 830, 840, 845, 850, 860, 875,
E7205 and E7505 chipsets and full support for the 810, 815, 830M, 845G,
852GM, 855GM and 865G integrated graphics chipsets.
......
......@@ -183,7 +183,7 @@ alpha_core_agp_setup(void)
alpha_bridge->dev = pdev;
alpha_bridge->mode = agp->capability.lw;
printk(KERN_INFO "Detected AGP on hose %d\n", agp->hose->index);
printk(KERN_INFO PFX "Detected AGP on hose %d\n", agp->hose->index);
return agp_add_bridge(alpha_bridge);
fail:
......
......@@ -8,6 +8,7 @@
* work is done in the northbridge(s).
*/
#include <linux/config.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
......@@ -252,15 +253,15 @@ static int __init aperture_valid(u64 aper, u32 size)
static int not_first_call;
u32 pfn, c;
if (aper == 0) {
printk(KERN_ERR "No aperture\n");
printk(KERN_ERR PFX "No aperture\n");
return 0;
}
if (size < 32*1024*1024) {
printk(KERN_ERR "Aperture too small (%d MB)\n", size>>20);
printk(KERN_ERR PFX "Aperture too small (%d MB)\n", size>>20);
return 0;
}
if (aper + size > 0xffffffff) {
printk(KERN_ERR "Aperture out of bounds\n");
printk(KERN_ERR PFX "Aperture out of bounds\n");
return 0;
}
pfn = aper >> PAGE_SHIFT;
......@@ -268,7 +269,7 @@ static int __init aperture_valid(u64 aper, u32 size)
if (!pfn_valid(pfn + c))
break;
if (!PageReserved(pfn_to_page(pfn + c))) {
printk(KERN_ERR "Aperture pointing to RAM\n");
printk(KERN_ERR PFX "Aperture pointing to RAM\n");
return 0;
}
}
......@@ -279,7 +280,7 @@ static int __init aperture_valid(u64 aper, u32 size)
Maybe better to use pci_assign_resource/pci_enable_device instead trusting
the bridges? */
if (!not_first_call && request_mem_region(aper, size, "aperture") < 0) {
printk(KERN_ERR "Aperture conflicts with PCI mapping.\n");
printk(KERN_ERR PFX "Aperture conflicts with PCI mapping.\n");
return 0;
}
......@@ -328,7 +329,7 @@ static __init int fix_northbridge(struct pci_dev *nb, struct pci_dev *agp,
pci_read_config_dword(agp, 0x10, &aper_low);
pci_read_config_dword(agp, 0x14, &aper_hi);
aper = (aper_low & ~((1<<22)-1)) | ((u64)aper_hi << 32);
printk(KERN_INFO "Aperture from AGP @ %Lx size %u MB\n", aper, 32 << order);
printk(KERN_INFO PFX "Aperture from AGP @ %Lx size %u MB\n", aper, 32 << order);
if (order < 0 || !aperture_valid(aper, (32*1024*1024)<<order))
return -1;
......@@ -347,17 +348,17 @@ static __init int cache_nbs (struct pci_dev *pdev, u32 cap_ptr)
while ((loop_dev = pci_find_device(PCI_VENDOR_ID_AMD, 0x1103, loop_dev))
!= NULL) {
if (fix_northbridge(loop_dev, pdev, cap_ptr) < 0) {
printk("No usable aperture found.\n");
printk(KERN_INFO PFX "No usable aperture found.\n");
#ifdef __x86_64__
/* should port this to i386 */
printk("Consider rebooting with iommu=memaper=2 to get a good aperture.\n");
printk(KERN_INFO PFX "Consider rebooting with iommu=memaper=2 to get a good aperture.\n");
#endif
return -1;
}
hammers[i++] = loop_dev;
nr_garts = i;
if (i == MAX_HAMMER_GARTS) {
printk(KERN_INFO "Too many northbridges for AGP\n");
printk(KERN_INFO PFX "Too many northbridges for AGP\n");
return -1;
}
}
......@@ -495,14 +496,14 @@ int __init agp_amd64_init(void)
int err = 0;
if (agp_off)
return -EINVAL;
if (pci_module_init(&agp_amd64_pci_driver) == 0) {
if (pci_module_init(&agp_amd64_pci_driver) > 0) {
struct pci_dev *dev;
if (!agp_try_unsupported && !agp_try_unsupported_boot) {
printk(KERN_INFO "No supported AGP bridge found.\n");
printk(KERN_INFO PFX "No supported AGP bridge found.\n");
#ifdef MODULE
printk(KERN_INFO "You can try agp_try_unsupported=1\n");
printk(KERN_INFO PFX "You can try agp_try_unsupported=1\n");
#else
printk(KERN_INFO "You can boot with agp=try_unsupported\n");
printk(KERN_INFO PFX "You can boot with agp=try_unsupported\n");
#endif
return -ENODEV;
}
......
......@@ -214,7 +214,7 @@ static int ati_configure(void)
/*
pci_read_config_dword(agp_bridge.dev, AGP_APBASE, &temp);
agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
printk(KERN_INFO "IGP320 gart_bus_addr: %x\n", agp_bridge.gart_bus_addr);
printk(KERN_INFO PFX "IGP320 gart_bus_addr: %x\n", agp_bridge.gart_bus_addr);
*/
OUTREG32(ati_generic_private.registers, ATI_GART_FEATURE_ID, 0x60000);
......@@ -226,8 +226,6 @@ static int ati_configure(void)
OUTREG32(ati_generic_private.registers, ATI_GART_BASE,
agp_bridge->gatt_bus_addr);
/* Flush the tlb */
OUTREG32(ati_generic_private.registers, ATI_GART_CACHE_CNTRL, 1);
return 0;
}
......
......@@ -26,7 +26,6 @@
* TODO:
* - Allocate more than order 0 pages to avoid too much linear map splitting.
*/
#include <linux/config.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
......@@ -34,6 +33,7 @@
#include <linux/miscdevice.h>
#include <linux/pm.h>
#include <linux/agp_backend.h>
#include <linux/agpgart.h>
#include <linux/vmalloc.h>
#include <asm/io.h>
#include "agp.h"
......
......@@ -42,6 +42,8 @@
/* AGP bridge need not be PCI device, but DRM thinks it is. */
static struct pci_dev fake_bridge_dev;
static int hp_zx1_gart_found;
static struct aper_size_info_fixed hp_zx1_sizes[] =
{
{0, 0, 0}, /* filled in by hp_zx1_fetch_size() */
......@@ -386,8 +388,6 @@ hp_zx1_setup (u64 ioc_hpa, u64 lba_hpa)
struct agp_bridge_data *bridge;
int error;
printk(KERN_INFO PFX "Detected HP ZX1 AGP chipset (ioc=%lx, lba=%lx)\n", ioc_hpa, lba_hpa);
error = hp_zx1_ioc_init(ioc_hpa, lba_hpa);
if (error)
return error;
......@@ -416,7 +416,7 @@ zx1_gart_probe (acpi_handle obj, u32 depth, void *context, void **ret)
status = hp_acpi_csr_space(obj, &lba_hpa, &length);
if (ACPI_FAILURE(status))
return 1;
return AE_OK;
/* Look for an enclosing IOC scope and find its CSR space */
handle = obj;
......@@ -436,7 +436,7 @@ zx1_gart_probe (acpi_handle obj, u32 depth, void *context, void **ret)
else {
printk(KERN_ERR PFX "Detected HP ZX1 "
"AGP LBA but no IOC.\n");
return status;
return AE_OK;
}
}
}
......@@ -446,22 +446,28 @@ zx1_gart_probe (acpi_handle obj, u32 depth, void *context, void **ret)
} while (ACPI_SUCCESS(status));
if (hp_zx1_setup(sba_hpa + HP_ZX1_IOC_OFFSET, lba_hpa))
return 1;
return 0;
return AE_OK;
printk(KERN_INFO PFX "Detected HP ZX1 %s AGP chipset (ioc=%lx, lba=%lx)\n",
(char *) context, sba_hpa + HP_ZX1_IOC_OFFSET, lba_hpa);
hp_zx1_gart_found = 1;
return AE_CTRL_TERMINATE;
}
static int __init
agp_hp_init (void)
{
acpi_status status;
status = acpi_get_devices("HWP0003", zx1_gart_probe, "HWP0003 AGP LBA", NULL);
if (!(ACPI_SUCCESS(status))) {
agp_bridge->type = NOT_SUPPORTED;
printk(KERN_INFO PFX "Failed to initialize zx1 AGP.\n");
return -ENODEV;
}
return 0;
acpi_get_devices("HWP0003", zx1_gart_probe, "HWP0003", NULL);
if (hp_zx1_gart_found)
return 0;
acpi_get_devices("HWP0007", zx1_gart_probe, "HWP0007", NULL);
if (hp_zx1_gart_found)
return 0;
return -ENODEV;
}
static void __exit
......
......@@ -445,7 +445,7 @@ static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start,
num_entries = A_SIZE_FIX(temp)->num_entries;
if (pg_start < intel_i830_private.gtt_entries) {
printk (KERN_DEBUG "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
pg_start,intel_i830_private.gtt_entries);
printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
......
......@@ -196,7 +196,7 @@ static void nvidia_tlbflush(struct agp_memory *mem)
pci_read_config_dword(nvidia_private.dev_1,
NVIDIA_1_WBC, &wbc_reg);
if ((signed)(end - jiffies) <= 0) {
printk(KERN_ERR
printk(KERN_ERR PFX
"TLB flush took more than 3 seconds.\n");
}
} while (wbc_reg & nvidia_private.wbc_mask);
......
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