Commit 2ff0b450 authored by Neil Armstrong's avatar Neil Armstrong Committed by Rob Herring

dt-bindings: soc: amlogic: canvas: convert to yaml

Now that we have the DT validation in place, let's convert the device tree
bindings for the Amlogic Canvas over to a YAML schemas.

Cc: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
[robh: update title]
Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent a90cc244
Amlogic Canvas
================================
A canvas is a collection of metadata that describes a pixel buffer.
Those metadata include: width, height, phyaddr, wrapping and block mode.
Starting with GXBB the endianness can also be described.
Many IPs within Amlogic SoCs rely on canvas indexes to read/write pixel data
rather than use the phy addresses directly. For instance, this is the case for
the video decoders and the display.
Amlogic SoCs have 256 canvas.
Device Tree Bindings:
---------------------
Video Lookup Table
--------------------------
Required properties:
- compatible: has to be one of:
- "amlogic,meson8-canvas", "amlogic,canvas" on Meson8
- "amlogic,meson8b-canvas", "amlogic,canvas" on Meson8b
- "amlogic,meson8m2-canvas", "amlogic,canvas" on Meson8m2
- "amlogic,canvas" on GXBB and newer
- reg: Base physical address and size of the canvas registers.
Example:
canvas: video-lut@48 {
compatible = "amlogic,canvas";
reg = <0x0 0x48 0x0 0x14>;
};
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2019 BayLibre, SAS
%YAML 1.2
---
$id: "http://devicetree.org/schemas/soc/amlogic/amlogic,canvas.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Amlogic Canvas Video Lookup Table
maintainers:
- Neil Armstrong <narmstrong@baylibre.com>
- Maxime Jourdan <mjourdan@baylibre.com>
description: |
A canvas is a collection of metadata that describes a pixel buffer.
Those metadata include: width, height, phyaddr, wrapping and block mode.
Starting with GXBB the endianness can also be described.
Many IPs within Amlogic SoCs rely on canvas indexes to read/write pixel data
rather than use the phy addresses directly. For instance, this is the case for
the video decoders and the display.
Amlogic SoCs have 256 canvas.
properties:
compatible:
oneOf:
- items:
- enum:
- amlogic,meson8-canvas
- amlogic,meson8b-canvas
- amlogic,meson8m2-canvas
- const: amlogic,canvas
- const: amlogic,canvas # GXBB and newer SoCs
reg:
maxItems: 1
required:
- compatible
- reg
examples:
- |
canvas: video-lut@48 {
compatible = "amlogic,canvas";
reg = <0x48 0x14>;
};
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