Commit 3088a5c7 authored by Linus Walleij's avatar Linus Walleij

ARM: dts: Augment VGA connector bridge on PB1176

The PL111 in the ARM reference platforms are connected to
"panels" that are actually dumb VGA DAC connector bridges.
Now that we can support the proper bridges in the DRM driver,
fix this up.

Cc: Mali DP Maintainers <malidp@foss.arm.com>
Reviewed-by: default avatarLiviu Dudau <liviu.dudau@arm.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 82089116
...@@ -161,6 +161,43 @@ usb@3b000000 { ...@@ -161,6 +161,43 @@ usb@3b000000 {
port1-otg; port1-otg;
}; };
bridge {
compatible = "ti,ths8134a", "ti,ths8134";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&clcd_pads>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};
vga {
compatible = "vga-connector";
port {
vga_con_in: endpoint {
remote-endpoint = <&vga_bridge_out>;
};
};
};
soc { soc {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -403,36 +440,15 @@ clcd@10112000 { ...@@ -403,36 +440,15 @@ clcd@10112000 {
interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&oscclk0>, <&pclk>; clocks = <&oscclk0>, <&pclk>;
clock-names = "clcdclk", "apb_pclk"; clock-names = "clcdclk", "apb_pclk";
/* 1024x768 16bpp @65MHz works fine */
max-memory-bandwidth = <95000000>;
port { port {
clcd_pads: endpoint { clcd_pads: endpoint {
remote-endpoint = <&clcd_panel>; remote-endpoint = <&vga_bridge_in>;
arm,pl11x,tft-r0g0b0-pads = <0 8 16>; arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
}; };
}; };
panel {
compatible = "panel-dpi";
port {
clcd_panel: endpoint {
remote-endpoint = <&clcd_pads>;
};
};
/* Standard 640x480 VGA timings */
panel-timing {
clock-frequency = <25175000>;
hactive = <640>;
hback-porch = <48>;
hfront-porch = <16>;
hsync-len = <96>;
vactive = <480>;
vback-porch = <33>;
vfront-porch = <10>;
vsync-len = <2>;
};
};
}; };
}; };
...@@ -564,7 +580,5 @@ fpga_rtc: rtc@10017000 { ...@@ -564,7 +580,5 @@ fpga_rtc: rtc@10017000 {
clocks = <&pclk>; clocks = <&pclk>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
}; };
}; };
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