Commit 30dfd12f authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Bartlomiej Zolnierkiewicz

piix: tuneproc() fixes/cleanups

Fix/cleanup the driver's tuneproc() and ratemask() methods:

- PPE, IE, and TIME bits need to be cleared beforehand for the slave drive as
  well as master (Alan probably just forgot about it);

- this driver only supports PIO modes up to 4, so must pass the correct limit
  to ide_get_best_pio_mode();

- use min_t() macro instead of min();

- simplify slave vs master drive evaluation;

- do come coding and formatting cleanups...
Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
parent d2872239
/* /*
* linux/drivers/ide/pci/piix.c Version 0.45 May 12, 2006 * linux/drivers/ide/pci/piix.c Version 0.46 December 3, 2006
* *
* Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
* Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
...@@ -163,7 +163,7 @@ static u8 piix_ratemask (ide_drive_t *drive) ...@@ -163,7 +163,7 @@ static u8 piix_ratemask (ide_drive_t *drive)
* if the drive cannot see an 80pin cable. * if the drive cannot see an 80pin cable.
*/ */
if (!eighty_ninty_three(drive)) if (!eighty_ninty_three(drive))
mode = min(mode, (u8)1); mode = min_t(u8, mode, 1);
return mode; return mode;
} }
...@@ -216,7 +216,7 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio) ...@@ -216,7 +216,7 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio)
{ {
ide_hwif_t *hwif = HWIF(drive); ide_hwif_t *hwif = HWIF(drive);
struct pci_dev *dev = hwif->pci_dev; struct pci_dev *dev = hwif->pci_dev;
int is_slave = (&hwif->drives[1] == drive); int is_slave = drive->dn & 1;
int master_port = hwif->channel ? 0x42 : 0x40; int master_port = hwif->channel ? 0x42 : 0x40;
int slave_port = 0x44; int slave_port = 0x44;
unsigned long flags; unsigned long flags;
...@@ -225,7 +225,7 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio) ...@@ -225,7 +225,7 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio)
static DEFINE_SPINLOCK(tune_lock); static DEFINE_SPINLOCK(tune_lock);
int control = 0; int control = 0;
/* ISP RTC */ /* ISP RTC */
static const u8 timings[][2]= { static const u8 timings[][2]= {
{ 0, 0 }, { 0, 0 },
{ 0, 0 }, { 0, 0 },
...@@ -233,7 +233,7 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio) ...@@ -233,7 +233,7 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio)
{ 2, 1 }, { 2, 1 },
{ 2, 3 }, }; { 2, 3 }, };
pio = ide_get_best_pio_mode(drive, pio, 5, NULL); pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
/* /*
* Master vs slave is synchronized above us but the slave register is * Master vs slave is synchronized above us but the slave register is
...@@ -243,25 +243,24 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio) ...@@ -243,25 +243,24 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio)
spin_lock_irqsave(&tune_lock, flags); spin_lock_irqsave(&tune_lock, flags);
pci_read_config_word(dev, master_port, &master_data); pci_read_config_word(dev, master_port, &master_data);
if (pio >= 2) if (pio > 1)
control |= 1; /* Programmable timing on */ control |= 1; /* Programmable timing on */
if (drive->media == ide_disk) if (drive->media == ide_disk)
control |= 4; /* Prefetch, post write */ control |= 4; /* Prefetch, post write */
if (pio >= 3) if (pio > 2)
control |= 2; /* IORDY */ control |= 2; /* IORDY */
if (is_slave) { if (is_slave) {
master_data = master_data | 0x4000; master_data |= 0x4000;
master_data &= ~0x0070;
if (pio > 1) { if (pio > 1) {
/* enable PPE, IE and TIME */ /* enable PPE, IE and TIME */
master_data = master_data | (control << 4); master_data = master_data | (control << 4);
} else {
master_data &= ~0x0070;
} }
pci_read_config_byte(dev, slave_port, &slave_data); pci_read_config_byte(dev, slave_port, &slave_data);
slave_data = slave_data & (hwif->channel ? 0x0f : 0xf0); slave_data = slave_data & (hwif->channel ? 0x0f : 0xf0);
slave_data = slave_data | (((timings[pio][0] << 2) | timings[pio][1]) << (hwif->channel ? 4 : 0)); slave_data = slave_data | (((timings[pio][0] << 2) | timings[pio][1]) << (hwif->channel ? 4 : 0));
} else { } else {
master_data = master_data & 0xccf8; master_data &= ~0x3307;
if (pio > 1) { if (pio > 1) {
/* enable PPE, IE and TIME */ /* enable PPE, IE and TIME */
master_data = master_data | control; master_data = master_data | control;
......
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