Commit 3161160c authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'tegra-for-5.12-arm64-dt' of...

Merge tag 'tegra-for-5.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.12-rc1

Fixes an issue with HDA codec detection by properly wiring up the
power-domain for the HDA controller. This also fixes one of the USB-C
ports on Jetson AGX Xavier and enables support for audio on various
Tegra210, Tegra186 and Tegra194 boards. The Jetson Nano and Jetson TX1
also gain QSPI support.

* tag 'tegra-for-5.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Audio graph sound card for Jetson AGX Xavier
  arm64: tegra: Audio graph sound card for Jetson TX2
  Revert "arm64: tegra: Disable the ACONNECT for Jetson TX2"
  arm64: tegra: Add RT5658 device entry
  arm64: tegra: Add support for Jetson Xavier NX with eMMC
  arm64: tegra: Prepare for supporting the Jetson Xavier NX with eMMC
  arm64: tegra: Enable QSPI on Jetson Xavier NX
  arm64: tegra: Add QSPI nodes on Tegra194
  arm64: tegra: Enable QSPI on Jetson Nano
  arm64: tegra: Audio graph sound card for Jetson Nano and TX1
  arm64: tegra: Audio graph header for Tegra210
  arm64: tegra: Order nodes alphabetically on Tegra210
  arm64: tegra: Enable Jetson-Xavier J512 USB host
  arm64: tegra: Add XUSB pad controller's "nvidia,pmc" property on Tegra210
  arm64: tegra: Add power-domain for Tegra210 HDA
  dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM

Link: https://lore.kernel.org/r/20210129193254.3610492-5-thierry.reding@gmail.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 7b76b46d 5b4f6323
......@@ -9,4 +9,5 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2894-0050-a08.dtb
dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb
dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb
dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0001.dtb
dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb
......@@ -1678,6 +1678,28 @@ pmu_a57 {
interrupt-affinity = <&ca57_0 &ca57_1 &ca57_2 &ca57_3>;
};
sound {
status = "disabled";
clocks = <&bpmp TEGRA186_CLK_PLLA>,
<&bpmp TEGRA186_CLK_PLL_A_OUT0>;
clock-names = "pll_a", "plla_out0";
assigned-clocks = <&bpmp TEGRA186_CLK_PLLA>,
<&bpmp TEGRA186_CLK_PLL_A_OUT0>,
<&bpmp TEGRA186_CLK_AUD_MCLK>;
assigned-clock-parents = <0>,
<&bpmp TEGRA186_CLK_PLLA>,
<&bpmp TEGRA186_CLK_PLL_A_OUT0>;
/*
* PLLA supports dynamic ramp. Below initial rate is chosen
* for this to work and oscillate between base rates required
* for 8x and 11.025x sample rate streams.
*/
assigned-clock-rates = <258000000>;
iommus = <&smmu TEGRA186_SID_APE>;
};
thermal-zones {
a57 {
polling-delay = <0>;
......
......@@ -93,6 +93,10 @@ padctl@3520000 {
vclamp-usb-supply = <&vdd_1v8ao>;
ports {
usb2-0 {
vbus-supply = <&vdd_5v0_sys>;
};
usb2-1 {
vbus-supply = <&vdd_5v0_sys>;
};
......@@ -105,6 +109,10 @@ usb3-0 {
vbus-supply = <&vdd_5v0_sys>;
};
usb3-2 {
vbus-supply = <&vdd_5v0_sys>;
};
usb3-3 {
vbus-supply = <&vdd_5v0_sys>;
};
......
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/input/gpio-keys.h>
#include "tegra194-p3668-0000.dtsi"
#include "tegra194-p3509-0000.dtsi"
/ {
model = "NVIDIA Jetson Xavier NX Developer Kit";
model = "NVIDIA Jetson Xavier NX Developer Kit (SD-card)";
compatible = "nvidia,p3509-0000+p3668-0000", "nvidia,tegra194";
bus@0 {
aconnect@2900000 {
status = "okay";
dma-controller@2930000 {
status = "okay";
};
interrupt-controller@2a40000 {
status = "okay";
};
};
ddc: i2c@3190000 {
status = "okay";
};
i2c@3160000 {
eeprom@57 {
compatible = "atmel,24c02";
reg = <0x57>;
label = "system";
vcc-supply = <&vdd_1v8>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
};
hda@3510000 {
nvidia,model = "jetson-xavier-nx-hda";
status = "okay";
};
padctl@3520000 {
status = "okay";
pads {
usb2 {
lanes {
usb2-1 {
status = "okay";
};
usb2-2 {
status = "okay";
};
};
};
usb3 {
lanes {
usb3-2 {
status = "okay";
};
};
};
};
ports {
usb2-1 {
mode = "host";
status = "okay";
};
usb2-2 {
mode = "host";
vbus-supply = <&vdd_5v0_sys>;
status = "okay";
};
usb3-2 {
nvidia,usb2-companion = <1>;
vbus-supply = <&vdd_5v0_sys>;
status = "okay";
};
};
};
usb@3610000 {
status = "okay";
phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
<&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>,
<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>;
phy-names = "usb2-1", "usb2-2", "usb3-2";
};
pwm@32d0000 {
status = "okay";
};
host1x@13e00000 {
display-hub@15200000 {
status = "okay";
};
dpaux@155c0000 {
status = "okay";
};
dpaux@155d0000 {
status = "okay";
};
/* DP0 */
sor@15b00000 {
status = "okay";
avdd-io-hdmi-dp-supply = <&vdd_1v0>;
vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
nvidia,dpaux = <&dpaux0>;
};
/* HDMI */
sor@15b40000 {
status = "okay";
avdd-io-hdmi-dp-supply = <&vdd_1v0>;
vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
hdmi-supply = <&vdd_hdmi>;
nvidia,ddc-i2c-bus = <&ddc>;
nvidia,hpd-gpio = <&gpio TEGRA194_MAIN_GPIO(M, 1)
GPIO_ACTIVE_LOW>;
};
};
};
pcie@14160000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8ao>;
phys = <&p2u_hsio_11>;
phy-names = "p2u-0";
};
pcie@141a0000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8ao>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7";
};
pcie_ep@141a0000 {
status = "disabled";
vddio-pex-ctl-supply = <&vdd_1v8ao>;
reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>;
nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5)
GPIO_ACTIVE_HIGH>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7";
};
fan: fan {
compatible = "pwm-fan";
pwms = <&pwm6 0 45334>;
cooling-levels = <0 64 128 255>;
#cooling-cells = <2>;
};
gpio-keys {
compatible = "gpio-keys";
force-recovery {
label = "Force Recovery";
gpios = <&gpio TEGRA194_MAIN_GPIO(G, 0)
GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_SLEEP>;
debounce-interval = <10>;
};
power {
label = "Power";
gpios = <&gpio_aon TEGRA194_AON_GPIO(EE, 4)
GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_POWER>;
debounce-interval = <10>;
wakeup-event-action = <EV_ACT_ASSERTED>;
wakeup-source;
};
};
vdd_5v0_sys: regulator@100 {
compatible = "regulator-fixed";
regulator-name = "VDD_5V_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_3v3_sys: regulator@101 {
compatible = "regulator-fixed";
regulator-name = "VDD_3V3_SYS";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vdd_3v3_ao: regulator@102 {
compatible = "regulator-fixed";
regulator-name = "VDD_3V3_AO";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8: regulator@103 {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vdd_hdmi: regulator@104 {
compatible = "regulator-fixed";
regulator-name = "VDD_5V0_HDMI_CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
thermal-zones {
cpu {
polling-delay = <0>;
polling-delay-passive = <500>;
status = "okay";
trips {
cpu_trip_critical: critical {
temperature = <96500>;
hysteresis = <0>;
type = "critical";
};
cpu_trip_hot: hot {
temperature = <70000>;
hysteresis = <2000>;
type = "hot";
};
cpu_trip_active: active {
temperature = <50000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_passive: passive {
temperature = <30000>;
hysteresis = <2000>;
type = "passive";
};
};
cooling-maps {
cpu-critical {
cooling-device = <&fan 3 3>;
trip = <&cpu_trip_critical>;
};
cpu-hot {
cooling-device = <&fan 2 2>;
trip = <&cpu_trip_hot>;
};
cpu-active {
cooling-device = <&fan 1 1>;
trip = <&cpu_trip_active>;
};
cpu-passive {
cooling-device = <&fan 0 0>;
trip = <&cpu_trip_passive>;
};
};
};
gpu {
polling-delay = <0>;
polling-delay-passive = <500>;
status = "okay";
trips {
gpu_alert0: critical {
temperature = <99000>;
hysteresis = <0>;
type = "critical";
};
};
};
aux {
polling-delay = <0>;
polling-delay-passive = <500>;
status = "okay";
trips {
aux_alert0: critical {
temperature = <90000>;
hysteresis = <0>;
type = "critical";
};
};
};
};
};
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "tegra194-p3668-0001.dtsi"
#include "tegra194-p3509-0000.dtsi"
/ {
model = "NVIDIA Jetson Xavier NX Developer Kit (eMMC)";
compatible = "nvidia,p3509-0000+p3668-0001", "nvidia,tegra194";
};
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/input/gpio-keys.h>
/ {
bus@0 {
aconnect@2900000 {
status = "okay";
dma-controller@2930000 {
status = "okay";
};
interrupt-controller@2a40000 {
status = "okay";
};
};
ddc: i2c@3190000 {
status = "okay";
};
i2c@3160000 {
eeprom@57 {
compatible = "atmel,24c02";
reg = <0x57>;
label = "system";
vcc-supply = <&vdd_1v8>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
};
hda@3510000 {
nvidia,model = "jetson-xavier-nx-hda";
status = "okay";
};
padctl@3520000 {
status = "okay";
pads {
usb2 {
lanes {
usb2-1 {
status = "okay";
};
usb2-2 {
status = "okay";
};
};
};
usb3 {
lanes {
usb3-2 {
status = "okay";
};
};
};
};
ports {
usb2-1 {
mode = "host";
status = "okay";
};
usb2-2 {
mode = "host";
vbus-supply = <&vdd_5v0_sys>;
status = "okay";
};
usb3-2 {
nvidia,usb2-companion = <1>;
vbus-supply = <&vdd_5v0_sys>;
status = "okay";
};
};
};
usb@3610000 {
status = "okay";
phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
<&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>,
<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>;
phy-names = "usb2-1", "usb2-2", "usb3-2";
};
spi@3270000 {
status = "okay";
flash@0 {
compatible = "spi-nor";
reg = <0>;
spi-max-frequency = <102000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
};
pwm@32d0000 {
status = "okay";
};
host1x@13e00000 {
display-hub@15200000 {
status = "okay";
};
dpaux@155c0000 {
status = "okay";
};
dpaux@155d0000 {
status = "okay";
};
/* DP0 */
sor@15b00000 {
status = "okay";
avdd-io-hdmi-dp-supply = <&vdd_1v0>;
vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
nvidia,dpaux = <&dpaux0>;
};
/* HDMI */
sor@15b40000 {
status = "okay";
avdd-io-hdmi-dp-supply = <&vdd_1v0>;
vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
hdmi-supply = <&vdd_hdmi>;
nvidia,ddc-i2c-bus = <&ddc>;
nvidia,hpd-gpio = <&gpio TEGRA194_MAIN_GPIO(M, 1)
GPIO_ACTIVE_LOW>;
};
};
};
pcie@14160000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8ao>;
phys = <&p2u_hsio_11>;
phy-names = "p2u-0";
};
pcie@141a0000 {
status = "okay";
vddio-pex-ctl-supply = <&vdd_1v8ao>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7";
};
pcie_ep@141a0000 {
status = "disabled";
vddio-pex-ctl-supply = <&vdd_1v8ao>;
reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>;
nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5)
GPIO_ACTIVE_HIGH>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7";
};
fan: fan {
compatible = "pwm-fan";
pwms = <&pwm6 0 45334>;
cooling-levels = <0 64 128 255>;
#cooling-cells = <2>;
};
gpio-keys {
compatible = "gpio-keys";
force-recovery {
label = "Force Recovery";
gpios = <&gpio TEGRA194_MAIN_GPIO(G, 0)
GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_SLEEP>;
debounce-interval = <10>;
};
power {
label = "Power";
gpios = <&gpio_aon TEGRA194_AON_GPIO(EE, 4)
GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_POWER>;
debounce-interval = <10>;
wakeup-event-action = <EV_ACT_ASSERTED>;
wakeup-source;
};
};
vdd_5v0_sys: regulator@100 {
compatible = "regulator-fixed";
regulator-name = "VDD_5V_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_3v3_sys: regulator@101 {
compatible = "regulator-fixed";
regulator-name = "VDD_3V3_SYS";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vdd_3v3_ao: regulator@102 {
compatible = "regulator-fixed";
regulator-name = "VDD_3V3_AO";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8: regulator@103 {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vdd_hdmi: regulator@104 {
compatible = "regulator-fixed";
regulator-name = "VDD_5V0_HDMI_CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
thermal-zones {
cpu {
polling-delay = <0>;
polling-delay-passive = <500>;
status = "okay";
trips {
cpu_trip_critical: critical {
temperature = <96500>;
hysteresis = <0>;
type = "critical";
};
cpu_trip_hot: hot {
temperature = <70000>;
hysteresis = <2000>;
type = "hot";
};
cpu_trip_active: active {
temperature = <50000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_passive: passive {
temperature = <30000>;
hysteresis = <2000>;
type = "passive";
};
};
cooling-maps {
cpu-critical {
cooling-device = <&fan 3 3>;
trip = <&cpu_trip_critical>;
};
cpu-hot {
cooling-device = <&fan 2 2>;
trip = <&cpu_trip_hot>;
};
cpu-active {
cooling-device = <&fan 1 1>;
trip = <&cpu_trip_active>;
};
cpu-passive {
cooling-device = <&fan 0 0>;
trip = <&cpu_trip_passive>;
};
};
};
gpu {
polling-delay = <0>;
polling-delay-passive = <500>;
status = "okay";
trips {
gpu_alert0: critical {
temperature = <99000>;
hysteresis = <0>;
type = "critical";
};
};
};
aux {
polling-delay = <0>;
polling-delay-passive = <500>;
status = "okay";
trips {
aux_alert0: critical {
temperature = <90000>;
hysteresis = <0>;
type = "critical";
};
};
};
};
};
// SPDX-License-Identifier: GPL-2.0
#include "tegra194.dtsi"
#include <dt-bindings/mfd/max77620.h>
#include "tegra194-p3668.dtsi"
/ {
model = "NVIDIA Jetson Xavier NX";
model = "NVIDIA Jetson Xavier NX (SD-card)";
compatible = "nvidia,p3668-0000", "nvidia,tegra194";
aliases {
ethernet0 = "/bus@0/ethernet@2490000";
i2c0 = "/bpmp/i2c";
i2c1 = "/bus@0/i2c@3160000";
i2c2 = "/bus@0/i2c@c240000";
i2c3 = "/bus@0/i2c@3180000";
i2c4 = "/bus@0/i2c@3190000";
i2c5 = "/bus@0/i2c@31c0000";
i2c6 = "/bus@0/i2c@c250000";
i2c7 = "/bus@0/i2c@31e0000";
mmc0 = "/bus@0/mmc@3460000";
rtc0 = "/bpmp/i2c/pmic@3c";
rtc1 = "/bus@0/rtc@c2a0000";
serial0 = &tcu;
};
chosen {
bootargs = "console=ttyS0,115200n8";
stdout-path = "serial0:115200n8";
};
bus@0 {
ethernet@2490000 {
status = "okay";
phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>;
phy-handle = <&phy>;
phy-mode = "rgmii-id";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA194_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>;
#phy-cells = <0>;
};
};
};
memory-controller@2c00000 {
status = "okay";
};
serial@3100000 {
status = "okay";
};
i2c@3160000 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
label = "module";
vcc-supply = <&vdd_1v8ls>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
};
/* SDMMC1 (SD/MMC) */
mmc@3400000 {
status = "okay";
......@@ -82,216 +14,6 @@ mmc@3400000 {
disable-wp;
vmmc-supply = <&vdd_3v3_sd>;
};
padctl@3520000 {
avdd-usb-supply = <&vdd_usb_3v3>;
vclamp-usb-supply = <&vdd_1v8ao>;
ports {
usb2-1 {
vbus-supply = <&vdd_5v0_sys>;
};
usb2-3 {
vbus-supply = <&vdd_5v0_sys>;
};
usb3-0 {
vbus-supply = <&vdd_5v0_sys>;
};
usb3-3 {
vbus-supply = <&vdd_5v0_sys>;
};
};
};
rtc@c2a0000 {
status = "okay";
};
pmc@c360000 {
nvidia,invert-interrupt;
};
};
bpmp {
i2c {
status = "okay";
pmic: pmic@3c {
compatible = "maxim,max20024";
reg = <0x3c>;
interrupt-parent = <&pmc>;
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
#interrupt-cells = <2>;
interrupt-controller;
#gpio-cells = <2>;
gpio-controller;
pinctrl-names = "default";
pinctrl-0 = <&max20024_default>;
max20024_default: pinmux {
gpio0 {
pins = "gpio0";
function = "gpio";
};
gpio1 {
pins = "gpio1";
function = "fps-out";
maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>;
};
gpio2 {
pins = "gpio2";
function = "fps-out";
maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>;
};
gpio3 {
pins = "gpio3";
function = "fps-out";
maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>;
};
gpio4 {
pins = "gpio4";
function = "32k-out1";
drive-push-pull = <1>;
};
gpio6 {
pins = "gpio6";
function = "gpio";
drive-push-pull = <1>;
};
gpio7 {
pins = "gpio7";
function = "gpio";
drive-push-pull = <0>;
};
};
fps {
fps0 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
fps1 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,shutdown-fps-time-period-us = <640>;
maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
};
regulators {
in-sd0-supply = <&vdd_5v0_sys>;
in-sd1-supply = <&vdd_5v0_sys>;
in-sd2-supply = <&vdd_5v0_sys>;
in-sd3-supply = <&vdd_5v0_sys>;
in-sd4-supply = <&vdd_5v0_sys>;
in-ldo0-1-supply = <&vdd_5v0_sys>;
in-ldo2-supply = <&vdd_5v0_sys>;
in-ldo3-5-supply = <&vdd_5v0_sys>;
in-ldo4-6-supply = <&vdd_5v0_sys>;
in-ldo7-8-supply = <&vdd_1v8ls>;
vdd_1v0: sd0 {
regulator-name = "VDDIO_SYS_1V0";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8hs: sd1 {
regulator-name = "VDDIO_SYS_1V8HS";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8ls: sd2 {
regulator-name = "VDDIO_SYS_1V8LS";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8ao: sd3 {
regulator-name = "VDDIO_AO_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
sd4 {
regulator-name = "VDD_DDR_1V1";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-boot-on;
};
ldo0 {
regulator-name = "VDD_RTC";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
regulator-always-on;
regulator-boot-on;
};
ldo2 {
regulator-name = "VDDIO_AO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
ldo3 {
regulator-name = "VDD_EMMC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vdd_usb_3v3: ldo5 {
regulator-name = "VDD_USB_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
ldo6 {
regulator-name = "VDD_SDIO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo7 {
regulator-name = "AVDD_CSI_1V2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
};
};
};
};
vdd_3v3_sd: regulator@0 {
......
// SPDX-License-Identifier: GPL-2.0
#include "tegra194-p3668.dtsi"
/ {
model = "NVIDIA Jetson Xavier NX (eMMC)";
compatible = "nvidia,p3668-0001", "nvidia,tegra194";
bus@0 {
/* SDMMC4 (eMMC) */
mmc@3460000 {
status = "okay";
bus-width = <8>;
non-removable;
vqmmc-supply = <&vdd_1v8ls>;
vmmc-supply = <&vdd_emmc_3v3>;
};
};
};
// SPDX-License-Identifier: GPL-2.0
#include "tegra194.dtsi"
#include <dt-bindings/mfd/max77620.h>
/ {
aliases {
ethernet0 = "/bus@0/ethernet@2490000";
i2c0 = "/bpmp/i2c";
i2c1 = "/bus@0/i2c@3160000";
i2c2 = "/bus@0/i2c@c240000";
i2c3 = "/bus@0/i2c@3180000";
i2c4 = "/bus@0/i2c@3190000";
i2c5 = "/bus@0/i2c@31c0000";
i2c6 = "/bus@0/i2c@c250000";
i2c7 = "/bus@0/i2c@31e0000";
mmc0 = "/bus@0/mmc@3460000";
rtc0 = "/bpmp/i2c/pmic@3c";
rtc1 = "/bus@0/rtc@c2a0000";
serial0 = &tcu;
};
chosen {
bootargs = "console=ttyS0,115200n8";
stdout-path = "serial0:115200n8";
};
bus@0 {
ethernet@2490000 {
status = "okay";
phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>;
phy-handle = <&phy>;
phy-mode = "rgmii-id";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA194_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>;
#phy-cells = <0>;
};
};
};
memory-controller@2c00000 {
status = "okay";
};
serial@3100000 {
status = "okay";
};
i2c@3160000 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
label = "module";
vcc-supply = <&vdd_1v8ls>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
};
padctl@3520000 {
avdd-usb-supply = <&vdd_usb_3v3>;
vclamp-usb-supply = <&vdd_1v8ao>;
ports {
usb2-1 {
vbus-supply = <&vdd_5v0_sys>;
};
usb2-3 {
vbus-supply = <&vdd_5v0_sys>;
};
usb3-0 {
vbus-supply = <&vdd_5v0_sys>;
};
usb3-3 {
vbus-supply = <&vdd_5v0_sys>;
};
};
};
rtc@c2a0000 {
status = "okay";
};
pmc@c360000 {
nvidia,invert-interrupt;
};
};
bpmp {
i2c {
status = "okay";
pmic: pmic@3c {
compatible = "maxim,max20024";
reg = <0x3c>;
interrupt-parent = <&pmc>;
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
#interrupt-cells = <2>;
interrupt-controller;
#gpio-cells = <2>;
gpio-controller;
pinctrl-names = "default";
pinctrl-0 = <&max20024_default>;
max20024_default: pinmux {
gpio0 {
pins = "gpio0";
function = "gpio";
};
gpio1 {
pins = "gpio1";
function = "fps-out";
maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>;
};
gpio2 {
pins = "gpio2";
function = "fps-out";
maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>;
};
gpio3 {
pins = "gpio3";
function = "fps-out";
maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>;
};
gpio4 {
pins = "gpio4";
function = "32k-out1";
drive-push-pull = <1>;
};
gpio6 {
pins = "gpio6";
function = "gpio";
drive-push-pull = <1>;
};
gpio7 {
pins = "gpio7";
function = "gpio";
drive-push-pull = <0>;
};
};
fps {
fps0 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
fps1 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
maxim,shutdown-fps-time-period-us = <640>;
maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
maxim,shutdown-fps-time-period-us = <640>;
};
};
regulators {
in-sd0-supply = <&vdd_5v0_sys>;
in-sd1-supply = <&vdd_5v0_sys>;
in-sd2-supply = <&vdd_5v0_sys>;
in-sd3-supply = <&vdd_5v0_sys>;
in-sd4-supply = <&vdd_5v0_sys>;
in-ldo0-1-supply = <&vdd_5v0_sys>;
in-ldo2-supply = <&vdd_5v0_sys>;
in-ldo3-5-supply = <&vdd_5v0_sys>;
in-ldo4-6-supply = <&vdd_5v0_sys>;
in-ldo7-8-supply = <&vdd_1v8ls>;
vdd_1v0: sd0 {
regulator-name = "VDDIO_SYS_1V0";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8hs: sd1 {
regulator-name = "VDDIO_SYS_1V8HS";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8ls: sd2 {
regulator-name = "VDDIO_SYS_1V8LS";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v8ao: sd3 {
regulator-name = "VDDIO_AO_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
sd4 {
regulator-name = "VDD_DDR_1V1";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-boot-on;
};
ldo0 {
regulator-name = "VDD_RTC";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
regulator-always-on;
regulator-boot-on;
};
ldo2 {
regulator-name = "VDDIO_AO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vdd_emmc_3v3: ldo3 {
regulator-name = "VDD_EMMC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vdd_usb_3v3: ldo5 {
regulator-name = "VDD_USB_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
ldo6 {
regulator-name = "VDD_SDIO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo7 {
regulator-name = "AVDD_CSI_1V2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
};
};
};
};
};
......@@ -609,6 +609,34 @@ dp_aux_ch3_i2c: i2c@31e0000 {
status = "disabled";
};
spi@3270000 {
compatible = "nvidia,tegra194-qspi";
reg = <0x3270000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA194_CLK_QSPI0>,
<&bpmp TEGRA194_CLK_QSPI0_PM>;
clock-names = "qspi", "qspi_out";
resets = <&bpmp TEGRA194_RESET_QSPI0>;
reset-names = "qspi";
status = "disabled";
};
spi@3300000 {
compatible = "nvidia,tegra194-qspi";
reg = <0x3300000 0x1000>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA194_CLK_QSPI1>,
<&bpmp TEGRA194_CLK_QSPI1_PM>;
clock-names = "qspi", "qspi_out";
resets = <&bpmp TEGRA194_RESET_QSPI1>;
reset-names = "qspi";
status = "disabled";
};
pwm1: pwm@3280000 {
compatible = "nvidia,tegra194-pwm",
"nvidia,tegra186-pwm";
......@@ -2323,6 +2351,26 @@ psci {
method = "smc";
};
sound {
status = "disabled";
clocks = <&bpmp TEGRA194_CLK_PLLA>,
<&bpmp TEGRA194_CLK_PLLA_OUT0>;
clock-names = "pll_a", "plla_out0";
assigned-clocks = <&bpmp TEGRA194_CLK_PLLA>,
<&bpmp TEGRA194_CLK_PLLA_OUT0>,
<&bpmp TEGRA194_CLK_AUD_MCLK>;
assigned-clock-parents = <0>,
<&bpmp TEGRA194_CLK_PLLA>,
<&bpmp TEGRA194_CLK_PLLA_OUT0>;
/*
* PLLA supports dynamic ramp. Below initial rate is chosen
* for this to work and oscillate between base rates required
* for 8x and 11.025x sample rate streams.
*/
assigned-clock-rates = <258000000>;
};
tcu: tcu {
compatible = "nvidia,tegra194-tcu";
mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_RX(0)>,
......
......@@ -126,5 +126,304 @@ dma-controller@702e2000 {
interrupt-controller@702f9000 {
status = "okay";
};
ahub@702d0800 {
status = "okay";
admaif@702d0000 {
status = "okay";
};
i2s@702d1000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
i2s1_cif_ep: endpoint {
remote-endpoint = <&xbar_i2s1_ep>;
};
};
i2s1_port: port@1 {
reg = <1>;
i2s1_dap_ep: endpoint {
dai-format = "i2s";
/* Placeholder for external Codec */
};
};
};
};
i2s@702d1100 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
i2s2_cif_ep: endpoint {
remote-endpoint = <&xbar_i2s2_ep>;
};
};
i2s2_port: port@1 {
reg = <1>;
i2s2_dap_ep: endpoint {
dai-format = "i2s";
/* Placeholder for external Codec */
};
};
};
};
i2s@702d1200 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
i2s3_cif_ep: endpoint {
remote-endpoint = <&xbar_i2s3_ep>;
};
};
i2s3_port: port@1 {
reg = <1>;
i2s3_dap_ep: endpoint {
dai-format = "i2s";
/* Placeholder for external Codec */
};
};
};
};
i2s@702d1300 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
i2s4_cif_ep: endpoint {
remote-endpoint = <&xbar_i2s4_ep>;
};
};
i2s4_port: port@1 {
reg = <1>;
i2s4_dap_ep: endpoint {
dai-format = "i2s";
/* Placeholder for external Codec */
};
};
};
};
i2s@702d1400 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
i2s5_cif_ep: endpoint {
remote-endpoint = <&xbar_i2s5_ep>;
};
};
i2s5_port: port@1 {
reg = <1>;
i2s5_dap_ep: endpoint {
dai-format = "i2s";
/* Placeholder for external Codec */
};
};
};
};
dmic@702d4000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic1_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic1_ep>;
};
};
dmic1_port: port@1 {
reg = <1>;
dmic1_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
dmic@702d4100 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic2_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic2_ep>;
};
};
dmic2_port: port@1 {
reg = <1>;
dmic2_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
dmic@702d4200 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic3_cif_ep: endpoint {
remote-endpoint = <&xbar_dmic3_ep>;
};
};
dmic3_port: port@1 {
reg = <1>;
dmic3_dap_ep: endpoint {
/* Placeholder for external Codec */
};
};
};
};
ports {
xbar_i2s1_port: port@a {
reg = <0xa>;
xbar_i2s1_ep: endpoint {
remote-endpoint = <&i2s1_cif_ep>;
};
};
xbar_i2s2_port: port@b {
reg = <0xb>;
xbar_i2s2_ep: endpoint {
remote-endpoint = <&i2s2_cif_ep>;
};
};
xbar_i2s3_port: port@c {
reg = <0xc>;
xbar_i2s3_ep: endpoint {
remote-endpoint = <&i2s3_cif_ep>;
};
};
xbar_i2s4_port: port@d {
reg = <0xd>;
xbar_i2s4_ep: endpoint {
remote-endpoint = <&i2s4_cif_ep>;
};
};
xbar_i2s5_port: port@e {
reg = <0xe>;
xbar_i2s5_ep: endpoint {
remote-endpoint = <&i2s5_cif_ep>;
};
};
xbar_dmic1_port: port@f {
reg = <0xf>;
xbar_dmic1_ep: endpoint {
remote-endpoint = <&dmic1_cif_ep>;
};
};
xbar_dmic2_port: port@10 {
reg = <0x10>;
xbar_dmic2_ep: endpoint {
remote-endpoint = <&dmic2_cif_ep>;
};
};
xbar_dmic3_port: port@11 {
reg = <0x11>;
xbar_dmic3_ep: endpoint {
remote-endpoint = <&dmic3_cif_ep>;
};
};
};
};
};
sound {
compatible = "nvidia,tegra210-audio-graph-card";
status = "okay";
dais = /* FE */
<&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
<&admaif4_port>, <&admaif5_port>, <&admaif6_port>,
<&admaif7_port>, <&admaif8_port>, <&admaif9_port>,
<&admaif10_port>,
/* Router */
<&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
<&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_dmic1_port>,
<&xbar_dmic2_port>, <&xbar_dmic3_port>,
/* I/O DAP Ports */
<&i2s1_port>, <&i2s2_port>, <&i2s3_port>, <&i2s4_port>,
<&i2s5_port>, <&dmic1_port>, <&dmic2_port>, <&dmic3_port>;
label = "jetson-tx1-ape";
};
};
......@@ -636,6 +636,162 @@ dma-controller@702e2000 {
interrupt-controller@702f9000 {
status = "okay";
};
ahub@702d0800 {
status = "okay";
admaif@702d0000 {
status = "okay";
};
i2s@702d1200 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
i2s3_cif_ep: endpoint {
remote-endpoint = <&xbar_i2s3_ep>;
};
};
i2s3_port: port@1 {
reg = <1>;
i2s3_dap_ep: endpoint {
dai-format = "i2s";
/* Placeholder for external Codec */
};
};
};
};
i2s@702d1300 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
i2s4_cif_ep: endpoint {
remote-endpoint = <&xbar_i2s4_ep>;
};
};
i2s4_port: port@1 {
reg = <1>;
i2s4_dap_ep: endpoint@0 {
dai-format = "i2s";
/* Placeholder for external Codec */
};
};
};
};
dmic@702d4000 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic1_cif_ep: endpoint@0 {
remote-endpoint = <&xbar_dmic1_ep>;
};
};
dmic1_port: port@1 {
reg = <1>;
dmic1_dap_ep: endpoint@0 {
/* Placeholder for external Codec */
};
};
};
};
dmic@702d4100 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dmic2_cif_ep: endpoint@0 {
remote-endpoint = <&xbar_dmic2_ep>;
};
};
dmic2_port: port@1 {
reg = <1>;
dmic2_dap_ep: endpoint@0 {
/* Placeholder for external Codec */
};
};
};
};
ports {
xbar_i2s3_port: port@c {
reg = <0xc>;
xbar_i2s3_ep: endpoint {
remote-endpoint = <&i2s3_cif_ep>;
};
};
xbar_i2s4_port: port@d {
reg = <0xd>;
xbar_i2s4_ep: endpoint {
remote-endpoint = <&i2s4_cif_ep>;
};
};
xbar_dmic1_port: port@f {
reg = <0xf>;
xbar_dmic1_ep: endpoint {
remote-endpoint = <&dmic1_cif_ep>;
};
};
xbar_dmic2_port: port@10 {
reg = <0x10>;
xbar_dmic2_ep: endpoint {
remote-endpoint = <&dmic2_cif_ep>;
};
};
};
};
};
spi@70410000 {
status = "okay";
flash@0 {
compatible = "spi-nor";
reg = <0>;
spi-max-frequency = <104000000>;
spi-tx-bus-width = <2>;
spi-rx-bus-width = <2>;
};
};
clk32k_in: clock@0 {
......@@ -870,4 +1026,23 @@ vdd_5v0_usb: regulator@8 {
vin-supply = <&vdd_5v0_sys>;
};
sound {
compatible = "nvidia,tegra210-audio-graph-card";
status = "okay";
dais = /* FE */
<&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
<&admaif4_port>, <&admaif5_port>, <&admaif6_port>,
<&admaif7_port>, <&admaif8_port>, <&admaif9_port>,
<&admaif10_port>,
/* Router */
<&xbar_i2s3_port>, <&xbar_i2s4_port>,
<&xbar_dmic1_port>, <&xbar_dmic2_port>,
/* I/O DAP Ports */
<&i2s3_port>, <&i2s4_port>,
<&dmic1_port>, <&dmic2_port>;
label = "jetson-nano-ape";
};
};
......@@ -997,6 +997,7 @@ hda@70030000 {
<&tegra_car 128>, /* hda2hdmi */
<&tegra_car 111>; /* hda2codec_2x */
reset-names = "hda", "hda2hdmi", "hda2codec_2x";
power-domains = <&pd_sor>;
status = "disabled";
};
......@@ -1043,6 +1044,7 @@ padctl: padctl@7009f000 {
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
resets = <&tegra_car 142>;
reset-names = "padctl";
nvidia,pmc = <&tegra_pmc>;
status = "disabled";
......@@ -1307,6 +1309,32 @@ usb@700d0000 {
status = "disabled";
};
soctherm: thermal-sensor@700e2000 {
compatible = "nvidia,tegra210-soctherm";
reg = <0x0 0x700e2000 0x0 0x600>, /* SOC_THERM reg_base */
<0x0 0x60006000 0x0 0x400>; /* CAR reg_base */
reg-names = "soctherm-reg", "car-reg";
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "thermal", "edp";
clocks = <&tegra_car TEGRA210_CLK_TSENSOR>,
<&tegra_car TEGRA210_CLK_SOC_THERM>;
clock-names = "tsensor", "soctherm";
resets = <&tegra_car 78>;
reset-names = "soctherm";
#thermal-sensor-cells = <1>;
throttle-cfgs {
throttle_heavy: heavy {
nvidia,priority = <100>;
nvidia,cpu-throt-percent = <85>;
nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
#cooling-cells = <2>;
};
};
};
mipi: mipi@700e3000 {
compatible = "nvidia,tegra210-mipi";
reg = <0x0 0x700e3000 0x0 0x100>;
......@@ -1425,6 +1453,91 @@ tegra_admaif: admaif@702d0000 {
"rx9", "tx9",
"rx10", "tx10";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
admaif1_port: port@0 {
reg = <0>;
admaif1_ep: endpoint {
remote-endpoint = <&xbar_admaif1_ep>;
};
};
admaif2_port: port@1 {
reg = <1>;
admaif2_ep: endpoint {
remote-endpoint = <&xbar_admaif2_ep>;
};
};
admaif3_port: port@2 {
reg = <2>;
admaif3_ep: endpoint {
remote-endpoint = <&xbar_admaif3_ep>;
};
};
admaif4_port: port@3 {
reg = <3>;
admaif4_ep: endpoint {
remote-endpoint = <&xbar_admaif4_ep>;
};
};
admaif5_port: port@4 {
reg = <4>;
admaif5_ep: endpoint {
remote-endpoint = <&xbar_admaif5_ep>;
};
};
admaif6_port: port@5 {
reg = <5>;
admaif6_ep: endpoint {
remote-endpoint = <&xbar_admaif6_ep>;
};
};
admaif7_port: port@6 {
reg = <6>;
admaif7_ep: endpoint {
remote-endpoint = <&xbar_admaif7_ep>;
};
};
admaif8_port: port@7 {
reg = <7>;
admaif8_ep: endpoint {
remote-endpoint = <&xbar_admaif8_ep>;
};
};
admaif9_port: port@8 {
reg = <8>;
admaif9_ep: endpoint {
remote-endpoint = <&xbar_admaif9_ep>;
};
};
admaif10_port: port@9 {
reg = <9>;
admaif10_ep: endpoint {
remote-endpoint = <&xbar_admaif10_ep>;
};
};
};
};
tegra_i2s1: i2s@702d1000 {
......@@ -1527,6 +1640,89 @@ tegra_dmic3: dmic@702d4200 {
sound-name-prefix = "DMIC3";
status = "disabled";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0x0>;
xbar_admaif1_ep: endpoint {
remote-endpoint = <&admaif1_ep>;
};
};
port@1 {
reg = <0x1>;
xbar_admaif2_ep: endpoint {
remote-endpoint = <&admaif2_ep>;
};
};
port@2 {
reg = <0x2>;
xbar_admaif3_ep: endpoint {
remote-endpoint = <&admaif3_ep>;
};
};
port@3 {
reg = <0x3>;
xbar_admaif4_ep: endpoint {
remote-endpoint = <&admaif4_ep>;
};
};
port@4 {
reg = <0x4>;
xbar_admaif5_ep: endpoint {
remote-endpoint = <&admaif5_ep>;
};
};
port@5 {
reg = <0x5>;
xbar_admaif6_ep: endpoint {
remote-endpoint = <&admaif6_ep>;
};
};
port@6 {
reg = <0x6>;
xbar_admaif7_ep: endpoint {
remote-endpoint = <&admaif7_ep>;
};
};
port@7 {
reg = <0x7>;
xbar_admaif8_ep: endpoint {
remote-endpoint = <&admaif8_ep>;
};
};
port@8 {
reg = <0x8>;
xbar_admaif9_ep: endpoint {
remote-endpoint = <&admaif9_ep>;
};
};
port@9 {
reg = <0x9>;
xbar_admaif10_ep: endpoint {
remote-endpoint = <&admaif10_ep>;
};
};
};
};
};
......@@ -1536,8 +1732,9 @@ spi@70410000 {
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car TEGRA210_CLK_QSPI>;
clock-names = "qspi";
clocks = <&tegra_car TEGRA210_CLK_QSPI>,
<&tegra_car TEGRA210_CLK_QSPI_PM>;
clock-names = "qspi", "qspi_out";
resets = <&tegra_car 211>;
reset-names = "qspi";
dmas = <&apbdma 5>, <&apbdma 5>;
......@@ -1692,44 +1889,18 @@ pmu {
&{/cpus/cpu@2} &{/cpus/cpu@3}>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
interrupt-parent = <&gic>;
arm,no-tick-in-suspend;
};
soctherm: thermal-sensor@700e2000 {
compatible = "nvidia,tegra210-soctherm";
reg = <0x0 0x700e2000 0x0 0x600>, /* SOC_THERM reg_base */
<0x0 0x60006000 0x0 0x400>; /* CAR reg_base */
reg-names = "soctherm-reg", "car-reg";
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "thermal", "edp";
clocks = <&tegra_car TEGRA210_CLK_TSENSOR>,
<&tegra_car TEGRA210_CLK_SOC_THERM>;
clock-names = "tsensor", "soctherm";
resets = <&tegra_car 78>;
reset-names = "soctherm";
#thermal-sensor-cells = <1>;
sound {
status = "disabled";
throttle-cfgs {
throttle_heavy: heavy {
nvidia,priority = <100>;
nvidia,cpu-throt-percent = <85>;
nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
<&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
clock-names = "pll_a", "plla_out0";
#cooling-cells = <2>;
};
};
assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
<&tegra_car TEGRA210_CLK_PLL_A_OUT0>,
<&tegra_car TEGRA210_CLK_EXTERN1>;
assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
assigned-clock-rates = <368640000>, <49152000>, <12288000>;
};
thermal-zones {
......@@ -1866,4 +2037,18 @@ cooling-maps {
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
interrupt-parent = <&gic>;
arm,no-tick-in-suspend;
};
};
......@@ -307,7 +307,7 @@
#define TEGRA210_CLK_AUDIO4 275
#define TEGRA210_CLK_SPDIF 276
/* 277 */
/* 278 */
#define TEGRA210_CLK_QSPI_PM 278
/* 279 */
/* 280 */
#define TEGRA210_CLK_SOR0_LVDS 281 /* deprecated */
......
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