Commit 340d9d31 authored by Vutla, Lokesh's avatar Vutla, Lokesh Committed by Herbert Xu

crypto: omap-aes - Use BIT() macro

Use BIT()/GENMASK() macros for all register definitions instead of
hand-writing bit masks.
Signed-off-by: default avatarLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 5396c6c0
...@@ -52,17 +52,17 @@ ...@@ -52,17 +52,17 @@
#define AES_REG_IV(dd, x) ((dd)->pdata->iv_ofs + ((x) * 0x04)) #define AES_REG_IV(dd, x) ((dd)->pdata->iv_ofs + ((x) * 0x04))
#define AES_REG_CTRL(dd) ((dd)->pdata->ctrl_ofs) #define AES_REG_CTRL(dd) ((dd)->pdata->ctrl_ofs)
#define AES_REG_CTRL_CTR_WIDTH_MASK (3 << 7) #define AES_REG_CTRL_CTR_WIDTH_MASK GENMASK(8, 7)
#define AES_REG_CTRL_CTR_WIDTH_32 (0 << 7) #define AES_REG_CTRL_CTR_WIDTH_32 0
#define AES_REG_CTRL_CTR_WIDTH_64 (1 << 7) #define AES_REG_CTRL_CTR_WIDTH_64 BIT(7)
#define AES_REG_CTRL_CTR_WIDTH_96 (2 << 7) #define AES_REG_CTRL_CTR_WIDTH_96 BIT(8)
#define AES_REG_CTRL_CTR_WIDTH_128 (3 << 7) #define AES_REG_CTRL_CTR_WIDTH_128 GENMASK(8, 7)
#define AES_REG_CTRL_CTR (1 << 6) #define AES_REG_CTRL_CTR BIT(6)
#define AES_REG_CTRL_CBC (1 << 5) #define AES_REG_CTRL_CBC BIT(5)
#define AES_REG_CTRL_KEY_SIZE (3 << 3) #define AES_REG_CTRL_KEY_SIZE GENMASK(4, 3)
#define AES_REG_CTRL_DIRECTION (1 << 2) #define AES_REG_CTRL_DIRECTION BIT(2)
#define AES_REG_CTRL_INPUT_READY (1 << 1) #define AES_REG_CTRL_INPUT_READY BIT(1)
#define AES_REG_CTRL_OUTPUT_READY (1 << 0) #define AES_REG_CTRL_OUTPUT_READY BIT(0)
#define AES_REG_CTRL_MASK GENMASK(24, 2) #define AES_REG_CTRL_MASK GENMASK(24, 2)
#define AES_REG_DATA_N(dd, x) ((dd)->pdata->data_ofs + ((x) * 0x04)) #define AES_REG_DATA_N(dd, x) ((dd)->pdata->data_ofs + ((x) * 0x04))
...@@ -70,12 +70,12 @@ ...@@ -70,12 +70,12 @@
#define AES_REG_REV(dd) ((dd)->pdata->rev_ofs) #define AES_REG_REV(dd) ((dd)->pdata->rev_ofs)
#define AES_REG_MASK(dd) ((dd)->pdata->mask_ofs) #define AES_REG_MASK(dd) ((dd)->pdata->mask_ofs)
#define AES_REG_MASK_SIDLE (1 << 6) #define AES_REG_MASK_SIDLE BIT(6)
#define AES_REG_MASK_START (1 << 5) #define AES_REG_MASK_START BIT(5)
#define AES_REG_MASK_DMA_OUT_EN (1 << 3) #define AES_REG_MASK_DMA_OUT_EN BIT(3)
#define AES_REG_MASK_DMA_IN_EN (1 << 2) #define AES_REG_MASK_DMA_IN_EN BIT(2)
#define AES_REG_MASK_SOFTRESET (1 << 1) #define AES_REG_MASK_SOFTRESET BIT(1)
#define AES_REG_AUTOIDLE (1 << 0) #define AES_REG_AUTOIDLE BIT(0)
#define AES_REG_LENGTH_N(x) (0x54 + ((x) * 0x04)) #define AES_REG_LENGTH_N(x) (0x54 + ((x) * 0x04))
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment