Commit 342d23a7 authored by Clément Péron's avatar Clément Péron Committed by Maxime Ripard

ARM: dts: sunxi: Prefer A31 bindings for IR

Since A31, memory mapping of the IR driver has changed.

Prefer the A31 bindings instead of A13.
Signed-off-by: default avatarClément Péron <peron.clem@gmail.com>
Acked-by: default avatarSean Young <sean@mess.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
parent d40113fb
...@@ -1364,7 +1364,7 @@ cpucfg@1f01c00 { ...@@ -1364,7 +1364,7 @@ cpucfg@1f01c00 {
}; };
ir: ir@1f02000 { ir: ir@1f02000 {
compatible = "allwinner,sun5i-a13-ir"; compatible = "allwinner,sun6i-a31-ir";
clocks = <&apb0_gates 1>, <&ir_clk>; clocks = <&apb0_gates 1>, <&ir_clk>;
clock-names = "apb", "ir"; clock-names = "apb", "ir";
resets = <&apb0_rst 1>; resets = <&apb0_rst 1>;
......
...@@ -1096,7 +1096,7 @@ r_cpucfg@1f01c00 { ...@@ -1096,7 +1096,7 @@ r_cpucfg@1f01c00 {
r_cir: ir@1f02000 { r_cir: ir@1f02000 {
compatible = "allwinner,sun8i-a83t-ir", compatible = "allwinner,sun8i-a83t-ir",
"allwinner,sun5i-a13-ir"; "allwinner,sun6i-a31-ir";
clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>; clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>;
clock-names = "apb", "ir"; clock-names = "apb", "ir";
resets = <&r_ccu RST_APB0_IR>; resets = <&r_ccu RST_APB0_IR>;
......
...@@ -1167,7 +1167,7 @@ nmi_intc: interrupt-controller@80015a0 { ...@@ -1167,7 +1167,7 @@ nmi_intc: interrupt-controller@80015a0 {
}; };
r_ir: ir@8002000 { r_ir: ir@8002000 {
compatible = "allwinner,sun5i-a13-ir"; compatible = "allwinner,sun6i-a31-ir";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&r_ir_pins>; pinctrl-0 = <&r_ir_pins>;
......
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