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Commit 348551dd authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'pinctrl-v6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 

Pull pin control updates from Linus Walleij:
 "Mostly drivers! Nothing special: some new Qualcomm chips as usual, and
  the new NXP S32 and nVidia BlueField-3.

  Core changes:

   - Make a lot of pin controllers with GPIO and irqchips immutable,
     i.e. not living structs, but const structs. This is driving a
     changed initiated by the irqchip maintainers.

  New drivers:

   - New driver for the NXP S32 SoC pin controller

   - As part of a thorough cleanup and restructuring of the
     Ralink/Mediatek drivers, the Ralink MIPS pin control drivers were
     folded into the Mediatek directory and the family is renamed
     "mtmips". The Ralink chips live on as Mediatek MIPS family where
     new variants can be added. As part of this work also the device
     tree bindings were reworked.

   - New subdriver for the Qualcomm SM7150 SoC.

   - New subdriver for the Qualcomm IPQ9574 SoC.

   - New driver for the nVidia BlueField-3 SoC.

   - Support for the Qualcomm PMM8654AU mixed signal circuit GPIO.

   - Support for the Qualcomm PMI632 mixed signal circuit GPIO.

  Improvements:

   - Add some missing pins and generic cleanups on the Renesas r8a779g0
     and r8a779g0 pin controllers. Generic Renesas extension for power
     source selection on several SoCs.

   - Misc cleanups for the Atmel AT91 and AT91-PIO4 pin controllers

   - Make the GPIO mode work on the Qualcomm SM8550-lpass-lpi driver.

   - Several device tree binding cleanups as the binding YAML syntax is
     solidifying"

* tag 'pinctrl-v6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (153 commits)
  pinctrl-bcm2835.c: fix race condition when setting gpio dir
  dt-bindings: pinctrl: qcom,sm8150: Drop duplicate function value "atest_usb2"
  dt-bindings: pinctrl: qcom: Add few missing functions
  pinctrl: qcom: spmi-gpio: Add PMI632 support
  dt-bindings: pinctrl: qcom,pmic-gpio: add PMI632
  pinctrl: wpcm450: select MFD_SYSCON
  pinctrl: qcom ssbi-gpio: Convert to immutable irq_chip
  pinctrl: qcom ssbi-mpp: Convert to immutable irq_chip
  pinctrl: qcom spmi-mpp: Convert to immutable irq_chip
  pinctrl: plgpio: Convert to immutable irq_chip
  pinctrl: pistachio: Convert to immutable irq_chip
  pinctrl: pic32: Convert to immutable irq_chip
  pinctrl: sx150x: Convert to immutable irq_chip
  pinctrl: stmfx: Convert to immutable irq_chip
  pinctrl: st: Convert to immutable irq_chip
  pinctrl: mcp23s08: Convert to immutable irq_chip
  pinctrl: equilibrium: Convert to immutable irq_chip
  pinctrl: npcm7xx: Convert to immutable irq_chip
  pinctrl: armada-37xx: Convert to immutable irq_chip
  pinctrl: nsp: Convert to immutable irq_chip
  ...
parents 7df047b3 b7badd75
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Showing with 8933 additions and 10277 deletions
Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml
View file @ 348551dd
......@@ -39,6 +39,10 @@ properties:
reg:
maxItems: 1
gpio-line-names:
minItems: 1
maxItems: 16
gpio-controller: true
'#gpio-cells':
......
Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml
View file @ 348551dd
......@@ -185,7 +185,7 @@ patternProperties:
additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml
View file @ 348551dd
......@@ -142,7 +142,7 @@ allOf:
# boards are defining it at the moment so it would generate a lot of
# warnings.
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
- if:
not:
properties:
......
Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a1.yaml 0 → 100644
View file @ 348551dd
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/amlogic,meson-pinctrl-a1.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic Meson A1 pinmux controller
maintainers:
- Neil Armstrong <neil.armstrong@linaro.org>
allOf:
- $ref: amlogic,meson-pinctrl-common.yaml#
properties:
compatible:
enum:
- amlogic,meson-a1-periphs-pinctrl
- amlogic,meson-s4-periphs-pinctrl
required:
- compatible
patternProperties:
"^bank@[0-9a-z]+$":
$ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-gpio
unevaluatedProperties: false
properties:
reg:
maxItems: 2
reg-names:
items:
- const: mux
- const: gpio
unevaluatedProperties:
type: object
$ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-pins
examples:
- |
periphs_pinctrl: pinctrl {
compatible = "amlogic,meson-a1-periphs-pinctrl";
#address-cells = <1>;
#size-cells = <1>;
ranges;
bank@400 {
reg = <0x0400 0x003c>,
<0x0480 0x0118>;
reg-names = "mux", "gpio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 0 62>;
};
cec_ao_a_h_pins: cec_ao_a_h {
mux {
groups = "cec_ao_a_h";
function = "cec_ao_a_h";
bias-disable;
};
};
};
Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml 0 → 100644
View file @ 348551dd
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/amlogic,meson-pinctrl-common.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic Meson pinmux controller
maintainers:
- Neil Armstrong <neil.armstrong@linaro.org>
allOf:
- $ref: pinctrl.yaml#
properties:
ranges: true
"#address-cells":
enum: [1, 2]
"#size-cells":
enum: [1, 2]
required:
- ranges
- "#address-cells"
- "#size-cells"
additionalProperties: true
$defs:
meson-gpio:
type: object
properties:
gpio-controller: true
"#gpio-cells":
const: 2
gpio-ranges:
maxItems: 1
required:
- reg
- reg-names
- gpio-controller
- "#gpio-cells"
- gpio-ranges
meson-pins:
type: object
additionalProperties:
type: object
allOf:
- $ref: pincfg-node.yaml#
- $ref: pinmux-node.yaml#
Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-aobus.yaml 0 → 100644
View file @ 348551dd
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/amlogic,meson-pinctrl-g12a-aobus.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic Meson G12 AOBUS pinmux controller
maintainers:
- Neil Armstrong <neil.armstrong@linaro.org>
allOf:
- $ref: amlogic,meson-pinctrl-common.yaml#
properties:
compatible:
enum:
- amlogic,meson-g12a-aobus-pinctrl
required:
- compatible
patternProperties:
"^bank@[0-9a-z]+$":
$ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-gpio
unevaluatedProperties: false
properties:
reg:
maxItems: 3
reg-names:
items:
- const: mux
- const: ds
- const: gpio
unevaluatedProperties:
type: object
$ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-pins
examples:
- |
ao_pinctrl: pinctrl {
compatible = "amlogic,meson-g12a-aobus-pinctrl";
#address-cells = <1>;
#size-cells = <1>;
ranges;
bank@14 {
reg = <0x14 0x8>,
<0x1c 0x8>,
<0x24 0x14>;
reg-names = "mux", "ds", "gpio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&ao_pinctrl 0 0 15>;
};
cec_ao_a_h_pins: cec_ao_a_h {
mux {
groups = "cec_ao_a_h";
function = "cec_ao_a_h";
bias-disable;
};
};
};
Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-periphs.yaml 0 → 100644
View file @ 348551dd
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/amlogic,meson-pinctrl-g12a-periphs.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic Meson G12 PERIPHS pinmux controller
maintainers:
- Neil Armstrong <neil.armstrong@linaro.org>
allOf:
- $ref: amlogic,meson-pinctrl-common.yaml#
properties:
compatible:
enum:
- amlogic,meson-g12a-periphs-pinctrl
required:
- compatible
patternProperties:
"^bank@[0-9a-z]+$":
$ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-gpio
unevaluatedProperties: false
properties:
reg:
maxItems: 5
reg-names:
items:
- const: gpio
- const: pull
- const: pull-enable
- const: mux
- const: ds
unevaluatedProperties:
type: object
$ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-pins
examples:
- |
periphs_pinctrl: pinctrl {
compatible = "amlogic,meson-g12a-periphs-pinctrl";
#address-cells = <1>;
#size-cells = <1>;
ranges;
bank@40 {
reg = <0x40 0x4c>,
<0xe8 0x18>,
<0x120 0x18>,
<0x2c0 0x40>,
<0x340 0x1c>;
reg-names = "gpio", "pull", "pull-enable", "mux", "ds";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 0 86>;
};
cec_ao_a_h_pins: cec_ao_a_h {
mux {
groups = "cec_ao_a_h";
function = "cec_ao_a_h";
bias-disable;
};
};
};
Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-aobus.yaml 0 → 100644
View file @ 348551dd
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/amlogic,meson8-pinctrl-aobus.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic Meson8 AOBUS pinmux controller
maintainers:
- Neil Armstrong <neil.armstrong@linaro.org>
allOf:
- $ref: amlogic,meson-pinctrl-common.yaml#
properties:
compatible:
oneOf:
- enum:
- amlogic,meson8-aobus-pinctrl
- amlogic,meson8b-aobus-pinctrl
- amlogic,meson-gxbb-aobus-pinctrl
- amlogic,meson-gxl-aobus-pinctrl
- amlogic,meson-axg-aobus-pinctrl
- items:
- const: amlogic,meson8m2-aobus-pinctrl
- const: amlogic,meson8-aobus-pinctrl
required:
- compatible
patternProperties:
"^bank@[0-9a-z]+$":
$ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-gpio
unevaluatedProperties: false
properties:
reg:
maxItems: 3
reg-names:
items:
- const: mux
- const: pull
- const: gpio
unevaluatedProperties:
type: object
$ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-pins
examples:
- |
pinctrl_aobus: pinctrl {
compatible = "amlogic,meson8-aobus-pinctrl";
#address-cells = <1>;
#size-cells = <1>;
ranges;
bank@14 {
reg = <0x14 0x4>,
<0x2c 0x4>,
<0x24 0x8>;
reg-names = "mux", "pull", "gpio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_aobus 0 0 16>;
};
cec_ao_a_h_pins: cec_ao_a_h {
mux {
groups = "cec_ao_a_h";
function = "cec_ao_a_h";
bias-disable;
};
};
};
Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-cbus.yaml 0 → 100644
View file @ 348551dd
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/amlogic,meson8-pinctrl-cbus.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic Meson8 CBUS pinmux controller
maintainers:
- Neil Armstrong <neil.armstrong@linaro.org>
allOf:
- $ref: amlogic,meson-pinctrl-common.yaml#
properties:
compatible:
oneOf:
- enum:
- amlogic,meson8-cbus-pinctrl
- amlogic,meson8b-cbus-pinctrl
- amlogic,meson-gxbb-periphs-pinctrl
- amlogic,meson-gxl-periphs-pinctrl
- amlogic,meson-axg-periphs-pinctrl
- items:
- const: amlogic,meson8m2-cbus-pinctrl
- const: amlogic,meson8-cbus-pinctrl
required:
- compatible
patternProperties:
"^bank@[0-9a-z]+$":
$ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-gpio
unevaluatedProperties: false
properties:
reg:
maxItems: 4
reg-names:
items:
- const: mux
- const: pull
- const: pull-enable
- const: gpio
unevaluatedProperties:
type: object
$ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-pins
examples:
- |
pinctrl_cbus: pinctrl {
compatible = "amlogic,meson8-cbus-pinctrl";
#address-cells = <1>;
#size-cells = <1>;
ranges;
bank@80b0 {
reg = <0x80b0 0x28>,
<0x80e8 0x18>,
<0x8120 0x18>,
<0x8030 0x30>;
reg-names = "mux", "pull", "pull-enable", "gpio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_cbus 0 0 120>;
};
cec_ao_a_h_pins: cec_ao_a_h {
mux {
groups = "cec_ao_a_h";
function = "cec_ao_a_h";
bias-disable;
};
};
};
Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
View file @ 348551dd
......@@ -74,7 +74,7 @@ patternProperties:
additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml
View file @ 348551dd
......@@ -32,7 +32,7 @@ patternProperties:
then:
patternProperties:
"^function|groups$":
$ref: "/schemas/types.yaml#/definitions/string"
$ref: /schemas/types.yaml#/definitions/string
enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,
ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, DDCCLK, DDCDAT,
EXTRST, FLACK, FLBUSY, FLWP, GPID, GPID0, GPID2, GPID4, GPID6, GPIE0,
......@@ -51,7 +51,7 @@ patternProperties:
VGAHS, VGAVS, VPI18, VPI24, VPI30, VPO12, VPO24, WDTRST1, WDTRST2]
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml
View file @ 348551dd
......@@ -44,7 +44,7 @@ patternProperties:
then:
patternProperties:
"^function|groups$":
$ref: "/schemas/types.yaml#/definitions/string"
$ref: /schemas/types.yaml#/definitions/string
enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,
ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, DDCCLK, DDCDAT,
ESPI, FWSPICS1, FWSPICS2, GPID0, GPID2, GPID4, GPID6, GPIE0, GPIE2,
......@@ -65,7 +65,7 @@ patternProperties:
VGAVS, VPI24, VPO, WDTRST1, WDTRST2]
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml
View file @ 348551dd
......@@ -30,7 +30,7 @@ patternProperties:
then:
properties:
function:
$ref: "/schemas/types.yaml#/definitions/string"
$ref: /schemas/types.yaml#/definitions/string
enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15, ADC2,
ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, EMMC, ESPI, ESPIALT,
FSI1, FSI2, FWQSPI, FWSPIABR, FWSPID, FWSPIWP, GPIT0, GPIT1, GPIT2, GPIT3,
......@@ -55,7 +55,7 @@ patternProperties:
USB2BD, USB2BH, VB, VGAHS, VGAVS, WDTRST1, WDTRST2, WDTRST3, WDTRST4 ]
groups:
$ref: "/schemas/types.yaml#/definitions/string"
$ref: /schemas/types.yaml#/definitions/string
enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15, ADC2,
ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, EMMCG1, EMMCG4,
EMMCG8, ESPI, ESPIALT, FSI1, FSI2, FWQSPI, FWSPIABR, FWSPID, FWSPIWP,
......@@ -84,7 +84,7 @@ patternProperties:
WDTRST3, WDTRST4]
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml
View file @ 348551dd
......@@ -38,7 +38,7 @@ patternProperties:
gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio40 ]
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml
View file @ 348551dd
......@@ -42,7 +42,7 @@ patternProperties:
vdsl_phy_override_3_grp, dsl_gpio8, dsl_gpio9 ]
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml
View file @ 348551dd
......@@ -37,7 +37,7 @@ patternProperties:
usb_port1 ]
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml
View file @ 348551dd
......@@ -35,7 +35,7 @@ patternProperties:
led_grp, spi_cs_grp, utopia_grp, pwm_syn_clk, sys_irq_grp ]
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml
View file @ 348551dd
......@@ -42,7 +42,7 @@ patternProperties:
gpio22, gpio23, gpio24, gpio25, gpio26, gpio27, nand_grp ]
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml
View file @ 348551dd
......@@ -43,7 +43,7 @@ patternProperties:
gpio31, uart1_grp ]
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml
View file @ 348551dd
......@@ -53,7 +53,7 @@ patternProperties:
additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
- if:
properties:
compatible:
......
Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml
View file @ 348551dd
......@@ -144,7 +144,7 @@ patternProperties:
additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml
View file @ 348551dd
......@@ -173,7 +173,7 @@ properties:
additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml
View file @ 348551dd
......@@ -40,8 +40,8 @@ properties:
'-pins$':
type: object
allOf:
- $ref: "pincfg-node.yaml#"
- $ref: "pinmux-node.yaml#"
- $ref: pincfg-node.yaml#
- $ref: pinmux-node.yaml#
properties:
groups:
description:
......
Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml
View file @ 348551dd
......@@ -109,7 +109,7 @@ required:
additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
examples:
- |
......
Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.yaml
View file @ 348551dd
......@@ -68,7 +68,7 @@ patternProperties:
additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/fsl,imx8m-pinctrl.yaml
View file @ 348551dd
......@@ -65,7 +65,7 @@ patternProperties:
additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.yaml
View file @ 348551dd
......@@ -57,7 +57,7 @@ patternProperties:
additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/fsl,imx93-pinctrl.yaml
View file @ 348551dd
......@@ -14,7 +14,7 @@ description:
for common binding part and usage.
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
properties:
compatible:
......
Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
View file @ 348551dd
......@@ -119,7 +119,7 @@ patternProperties:
additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml
View file @ 348551dd
......@@ -48,7 +48,7 @@ patternProperties:
additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml deleted 100644 → 0
View file @ 7df047b3
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/intel,pinctrl-thunderbay.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Intel Thunder Bay pin controller
maintainers:
- Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
description: |
Intel Thunder Bay SoC integrates a pin controller which enables control
of pin directions, input/output values and configuration
for a total of 67 pins.
properties:
compatible:
const: intel,thunderbay-pinctrl
reg:
maxItems: 1
gpio-controller: true
'#gpio-cells':
const: 2
gpio-ranges:
maxItems: 1
interrupts:
description:
Specifies the interrupt lines to be used by the controller.
maxItems: 2
interrupt-controller: true
'#interrupt-cells':
const: 2
patternProperties:
'^gpio@[0-9a-f]*$':
type: object
additionalProperties: false
description:
Child nodes can be specified to contain pin configuration information,
which can then be utilized by pinctrl client devices.
The following properties are supported.
properties:
pins:
description: |
The name(s) of the pins to be configured in the child node.
Supported pin names are "GPIO0" up to "GPIO66".
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength:
description: Drive strength for the pad.
enum: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
bias-bus-hold:
type: boolean
input-schmitt-enable:
type: boolean
slew-rate:
description: GPIO slew rate control.
0 - Slow
1 - Fast
enum: [0, 1]
additionalProperties: false
required:
- compatible
- reg
- gpio-controller
- '#gpio-cells'
- gpio-ranges
- interrupts
- interrupt-controller
- '#interrupt-cells'
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
// Example 1
pinctrl0: gpio@0 {
compatible = "intel,thunderbay-pinctrl";
reg = <0x600b0000 0x88>;
gpio-controller;
#gpio-cells = <0x2>;
gpio-ranges = <&pinctrl0 0 0 67>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
};
// Example 2
pinctrl1: gpio@1 {
compatible = "intel,thunderbay-pinctrl";
reg = <0x600c0000 0x88>;
gpio-controller;
#gpio-cells = <0x2>;
gpio-ranges = <&pinctrl1 0 0 53>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
};
Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-xway.txt
View file @ 348551dd
Lantiq XWAY pinmux controller
Required properties:
- compatible: "lantiq,pinctrl-xway", (DEPRECATED: Use "lantiq,pinctrl-danube")
"lantiq,pinctrl-xr9", (DEPRECATED: Use "lantiq,xrx100-pinctrl" or
"lantiq,xrx200-pinctrl")
"lantiq,pinctrl-ase", (DEPRECATED: Use "lantiq,ase-pinctrl")
"lantiq,<chip>-pinctrl", where <chip> is:
- compatible: "lantiq,<chip>-pinctrl", where <chip> is:
"ase" (XWAY AMAZON Family)
"danube" (XWAY DANUBE Family)
"xrx100" (XWAY xRX100 Family)
......@@ -45,29 +41,6 @@ Required subnode-properties:
Valid values for group and function names:
XWAY: (DEPRECATED: Use DANUBE)
mux groups:
exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1,
ebu wait, nand ale, nand cs1, nand cle, spi, spi_cs1, spi_cs2, spi_cs3,
spi_cs4, spi_cs5, spi_cs6, asc0, asc0 cts rts, stp, nmi, gpt1, gpt2,
gpt3, clkout0, clkout1, clkout2, clkout3, gnt1, gnt2, gnt3, req1, req2,
req3
functions:
spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu
XR9: ( DEPRECATED: Use xRX100/xRX200)
mux groups:
exin0, exin1, exin2, exin3, exin4, jtag, ebu a23, ebu a24, ebu a25,
ebu clk, ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy,
nand rd, spi, spi_cs1, spi_cs2, spi_cs3, spi_cs4, spi_cs5, spi_cs6,
asc0, asc0 cts rts, stp, nmi, gpt1, gpt2, gpt3, clkout0, clkout1,
clkout2, clkout3, gnt1, gnt2, gnt3, gnt4, req1, req2, req3, req4, mdio,
gphy0 led0, gphy0 led1, gphy0 led2, gphy1 led0, gphy1 led1, gphy1 led2
functions:
spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu, mdio, gphy
AMAZON:
mux groups:
exin0, exin1, exin2, jtag, spi_di, spi_do, spi_clk, spi_cs1, spi_cs2,
......@@ -139,12 +112,6 @@ Optional subnode-properties:
0: none, 1: down, 2: up.
- lantiq,open-drain: Boolean, enables open-drain on the defined pin.
Valid values for XWAY pin names: (DEPRECATED: Use DANUBE)
Pinconf pins can be referenced via the names io0-io31.
Valid values for XR9 pin names: (DEPRECATED: Use xrX100/xRX200)
Pinconf pins can be referenced via the names io0-io55.
Valid values for AMAZON pin names:
Pinconf pins can be referenced via the names io0-io31.
......
Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml
View file @ 348551dd
......@@ -28,7 +28,7 @@ patternProperties:
properties:
marvell,function:
$ref: "/schemas/types.yaml#/definitions/string"
$ref: /schemas/types.yaml#/definitions/string
description:
Indicates the function to select.
enum: [ dev_init_done, ge, gpio, i2c0, i2c1, int_out, led, nand, pcie, ptp, sdio,
......@@ -47,7 +47,7 @@ patternProperties:
mpp40, mpp41, mpp42, mpp43, mpp44, mpp45 ]
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml
View file @ 348551dd
......@@ -4,13 +4,13 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt65xx-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT65xx Pin Controller
title: MediaTek MT65xx Pin Controller
maintainers:
- Sean Wang <sean.wang@kernel.org>
description: |+
The Mediatek's Pin controller is used to control SoC pins.
description:
The MediaTek's MT65xx Pin controller is used to control SoC pins.
properties:
compatible:
......@@ -30,7 +30,7 @@ properties:
pins-are-numbered:
$ref: /schemas/types.yaml#/definitions/flag
description: |
description:
Specify the subnodes are using numbered pinmux to specify pins. (UNUSED)
deprecated: true
......@@ -38,10 +38,10 @@ properties:
"#gpio-cells":
const: 2
description: |
Number of cells in GPIO specifier. Since the generic GPIO
binding is used, the amount of cells must be specified as 2. See the below
mentioned gpio binding representation for description of particular cells.
description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below mentioned gpio
binding representation for description of particular cells.
mediatek,pctl-regmap:
$ref: /schemas/types.yaml#/definitions/phandle-array
......@@ -49,7 +49,7 @@ properties:
maxItems: 1
minItems: 1
maxItems: 2
description: |
description:
Should be phandles of the syscfg node.
interrupt-controller: true
......@@ -67,7 +67,7 @@ required:
- "#gpio-cells"
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
patternProperties:
'pins$':
......@@ -77,25 +77,25 @@ patternProperties:
'(^pins|pins?$)':
type: object
additionalProperties: false
description: |
description:
A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and input
schmitt.
$ref: "/schemas/pinctrl/pincfg-node.yaml"
$ref: /schemas/pinctrl/pincfg-node.yaml
properties:
pinmux:
description:
integer array, represents gpio pin number and mux setting.
Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are
defined as macros in <soc>-pinfunc.h directly.
defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
bias-disable: true
bias-pull-up:
description: |
description:
Besides generic pinconfig options, it can be used as the pull up
settings for 2 pull resistors, R0 and R1. User can configure those
special pins. Some macros have been defined for this usage, such
......@@ -117,7 +117,7 @@ patternProperties:
input-schmitt-disable: true
drive-strength:
description: |
description:
Can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA,
etc. See dt-bindings/pinctrl/mt65xx.h for valid arguments.
......
Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml
View file @ 348551dd
......@@ -4,15 +4,15 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt6779-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT6779 Pin Controller
title: MediaTek MT6779 Pin Controller
maintainers:
- Andy Teng <andy.teng@mediatek.com>
- Sean Wang <sean.wang@kernel.org>
description:
The MediaTek pin controller on MT6779 is used to control pin
functions, pull up/down resistance and drive strength options.
The MediaTek pin controller on MT6779 is used to control pin functions, pull
up/down resistance and drive strength options.
properties:
compatible:
......@@ -29,22 +29,22 @@ properties:
"#gpio-cells":
const: 2
description: |
Number of cells in GPIO specifier. Since the generic GPIO
binding is used, the amount of cells must be specified as 2. See the below
mentioned gpio binding representation for description of particular cells.
description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below mentioned gpio
binding representation for description of particular cells.
gpio-ranges:
minItems: 1
maxItems: 5
description: |
description:
GPIO valid number range.
interrupt-controller: true
interrupts:
maxItems: 1
description: |
description:
Specifies the summary IRQ.
"#interrupt-cells":
......@@ -58,7 +58,7 @@ required:
- "#gpio-cells"
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
- if:
properties:
compatible:
......@@ -118,19 +118,20 @@ patternProperties:
patternProperties:
'-pins*$':
type: object
description: |
description:
A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and input schmitt.
$ref: "/schemas/pinctrl/pincfg-node.yaml"
configuration, pullups, drive strength, input enable/disable and input
schmitt.
$ref: /schemas/pinctrl/pincfg-node.yaml
properties:
pinmux:
description:
integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are defined
as macros in boot/dts/<soc>-pinfunc.h directly.
Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are
defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
bias-disable: true
......@@ -159,7 +160,8 @@ patternProperties:
mediatek,pull-up-adv:
description: |
Pull up setings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below:
configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
......@@ -170,7 +172,8 @@ patternProperties:
mediatek,pull-down-adv:
description: |
Pull down settings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below:
configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
......
Documentation/devicetree/bindings/pinctrl/mediatek,pinctrl-mt6795.yaml → Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
View file @ 348551dd
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/mediatek,pinctrl-mt6795.yaml#
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt6795-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT6795 Pin Controller
title: MediaTek MT6795 Pin Controller
maintainers:
- AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
- Sean Wang <sean.wang@kernel.org>
description: |
The Mediatek's Pin controller is used to control SoC pins.
description:
The MediaTek's MT6795 Pin controller is used to control SoC pins.
properties:
compatible:
......@@ -20,10 +20,10 @@ properties:
gpio-controller: true
'#gpio-cells':
description: |
description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below
mentioned gpio binding representation for description of particular cells.
the amount of cells must be specified as 2. See the below mentioned gpio
binding representation for description of particular cells.
const: 2
gpio-ranges:
......@@ -32,7 +32,7 @@ properties:
reg:
description:
Physical address base for gpio base and eint registers.
Physical address base for GPIO base and eint registers.
minItems: 2
reg-names:
......@@ -65,8 +65,8 @@ patternProperties:
A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and
input schmitt.
configuration, pullups, drive strength, input enable/disable and input
schmitt.
An example of using macro:
pincontroller {
/* GPIO0 set as multifunction GPIO0 */
......@@ -82,15 +82,14 @@ patternProperties:
}
};
};
$ref: "pinmux-node.yaml"
$ref: pinmux-node.yaml
properties:
pinmux:
description: |
description:
Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are
defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h
directly.
defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16]
......@@ -100,20 +99,20 @@ patternProperties:
- type: boolean
- enum: [100, 101, 102, 103]
description: mt6795 pull down PUPD/R0/R1 type define value.
description: |
For normal pull down type, it is not necessary to specify R1R0
values; When pull down type is PUPD/R0/R1, adding R1R0 defines
will set different resistance values.
description:
For normal pull down type, it is not necessary to specify R1R0
values; When pull down type is PUPD/R0/R1, adding R1R0 defines
will set different resistance values.
bias-pull-up:
oneOf:
- type: boolean
- enum: [100, 101, 102, 103]
description: mt6795 pull up PUPD/R0/R1 type define value.
description: |
For normal pull up type, it is not necessary to specify R1R0
values; When pull up type is PUPD/R0/R1, adding R1R0 defines
will set different resistance values.
description:
For normal pull up type, it is not necessary to specify R1R0
values; When pull up type is PUPD/R0/R1, adding R1R0 defines will
set different resistance values.
bias-disable: true
......@@ -132,7 +131,8 @@ patternProperties:
mediatek,pull-up-adv:
description: |
Pull up setings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below:
configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
......@@ -143,7 +143,8 @@ patternProperties:
mediatek,pull-down-adv:
description: |
Pull down settings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below:
configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
......@@ -155,7 +156,7 @@ patternProperties:
- pinmux
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml 0 → 100644
View file @ 348551dd
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7620-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek MT7620 Pin Controller
maintainers:
- Arınç ÜNAL <arinc.unal@arinc9.com>
- Sergio Paracuellos <sergio.paracuellos@gmail.com>
description: |
MediaTek MT7620 pin controller for MT7620 SoC.
The pin controller can only set the muxing of pin groups. Muxing individual
pins is not supported. There is no pinconf support.
properties:
compatible:
const: ralink,mt7620-pinctrl
patternProperties:
'-pins$':
type: object
additionalProperties: false
patternProperties:
'^(.*-)?pinmux$':
type: object
description: node for pinctrl.
$ref: pinmux-node.yaml#
additionalProperties: false
properties:
function:
description:
A string containing the name of the function to mux to the group.
enum: [ephy, gpio, gpio i2s, gpio uartf, i2c, i2s uartf, mdio, nand,
pa, pcie refclk, pcie rst, pcm gpio, pcm i2s, pcm uartf,
refclk, rgmii1, rgmii2, sd, spi, spi refclk, uartf, uartlite,
wdt refclk, wdt rst, wled]
groups:
description:
An array of strings. Each string contains the name of a group.
maxItems: 1
required:
- groups
- function
allOf:
- if:
properties:
function:
const: ephy
then:
properties:
groups:
enum: [ephy]
- if:
properties:
function:
const: gpio
then:
properties:
groups:
enum: [ephy, i2c, mdio, nd_sd, pa, pcie, rgmii1, rgmii2, spi,
spi refclk, uartf, uartlite, wdt, wled]
- if:
properties:
function:
const: gpio i2s
then:
properties:
groups:
enum: [uartf]
- if:
properties:
function:
const: gpio uartf
then:
properties:
groups:
enum: [uartf]
- if:
properties:
function:
const: i2c
then:
properties:
groups:
enum: [i2c]
- if:
properties:
function:
const: i2s uartf
then:
properties:
groups:
enum: [uartf]
- if:
properties:
function:
const: mdio
then:
properties:
groups:
enum: [mdio]
- if:
properties:
function:
const: nand
then:
properties:
groups:
enum: [nd_sd]
- if:
properties:
function:
const: pa
then:
properties:
groups:
enum: [pa]
- if:
properties:
function:
const: pcie refclk
then:
properties:
groups:
enum: [pcie]
- if:
properties:
function:
const: pcie rst
then:
properties:
groups:
enum: [pcie]
- if:
properties:
function:
const: pcm gpio
then:
properties:
groups:
enum: [uartf]
- if:
properties:
function:
const: pcm i2s
then:
properties:
groups:
enum: [uartf]
- if:
properties:
function:
const: pcm uartf
then:
properties:
groups:
enum: [uartf]
- if:
properties:
function:
const: refclk
then:
properties:
groups:
enum: [mdio]
- if:
properties:
function:
const: rgmii1
then:
properties:
groups:
enum: [rgmii1]
- if:
properties:
function:
const: rgmii2
then:
properties:
groups:
enum: [rgmii2]
- if:
properties:
function:
const: sd
then:
properties:
groups:
enum: [nd_sd]
- if:
properties:
function:
const: spi
then:
properties:
groups:
enum: [spi]
- if:
properties:
function:
const: spi refclk
then:
properties:
groups:
enum: [spi refclk]
- if:
properties:
function:
const: uartf
then:
properties:
groups:
enum: [uartf]
- if:
properties:
function:
const: uartlite
then:
properties:
groups:
enum: [uartlite]
- if:
properties:
function:
const: wdt refclk
then:
properties:
groups:
enum: [wdt]
- if:
properties:
function:
const: wdt rst
then:
properties:
groups:
enum: [wdt]
- if:
properties:
function:
const: wled
then:
properties:
groups:
enum: [wled]
allOf:
- $ref: pinctrl.yaml#
required:
- compatible
additionalProperties: false
examples:
- |
pinctrl {
compatible = "ralink,mt7620-pinctrl";
i2c_pins: i2c0-pins {
pinmux {
groups = "i2c";
function = "i2c";
};
};
};
Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml → Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml
View file @ 348551dd
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/ralink,mt7621-pinctrl.yaml#
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7621-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Ralink MT7621 Pin Controller
title: MediaTek MT7621 Pin Controller
maintainers:
- Arınç ÜNAL <arinc.unal@arinc9.com>
- Sergio Paracuellos <sergio.paracuellos@gmail.com>
description:
Ralink MT7621 pin controller for MT7621 SoC.
description: |
MediaTek MT7621 pin controller for MT7621 SoC.
The pin controller can only set the muxing of pin groups. Muxing individual
pins is not supported. There is no pinconf support.
......@@ -22,11 +22,14 @@ properties:
patternProperties:
'-pins$':
type: object
additionalProperties: false
patternProperties:
'^(.*-)?pinmux$':
type: object
description: node for pinctrl.
$ref: pinmux-node.yaml#
additionalProperties: false
properties:
function:
......@@ -236,12 +239,8 @@ patternProperties:
groups:
enum: [wdt]
additionalProperties: false
additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
View file @ 348551dd
......@@ -4,12 +4,12 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7622-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT7622 Pin Controller
title: MediaTek MT7622 Pin Controller
maintainers:
- Sean Wang <sean.wang@kernel.org>
description: |+
description:
The MediaTek's MT7622 Pin controller is used to control SoC pins.
properties:
......@@ -29,10 +29,10 @@ properties:
"#gpio-cells":
const: 2
description: |
Number of cells in GPIO specifier. Since the generic GPIO
binding is used, the amount of cells must be specified as 2. See the below
mentioned gpio binding representation for description of particular cells.
description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below mentioned gpio
binding representation for description of particular cells.
interrupt-controller: true
......@@ -43,7 +43,7 @@ properties:
const: 2
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......@@ -68,18 +68,18 @@ patternProperties:
'^mux(-|$)':
type: object
additionalProperties: false
description: |
description:
pinmux configuration nodes.
$ref: "/schemas/pinctrl/pinmux-node.yaml"
$ref: /schemas/pinctrl/pinmux-node.yaml
properties:
function:
description: |
description:
A string containing the name of the function to mux to the group.
enum: [emmc, eth, i2c, i2s, ir, led, flash, pcie, pmic, pwm, sd,
spi, tdm, uart, watchdog, wifi]
groups:
description: |
description:
An array of strings. Each string contains the name of a group.
drive-strength:
......@@ -247,18 +247,18 @@ patternProperties:
'^conf(-|$)':
type: object
additionalProperties: false
description: |
description:
pinconf configuration nodes.
$ref: "/schemas/pinctrl/pincfg-node.yaml"
$ref: /schemas/pinctrl/pincfg-node.yaml
properties:
groups:
description: |
description:
An array of strings. Each string contains the name of a group.
Valid values are the same as the pinmux node.
pins:
description: |
description:
An array of strings. Each string contains the name of a pin.
enum: [GPIO_A, I2S1_IN, I2S1_OUT, I2S_BCLK, I2S_WS, I2S_MCLK, TXD0,
RXD0, SPI_WP, SPI_HOLD, SPI_CLK, SPI_MOSI, SPI_MISO, SPI_CS,
......@@ -315,14 +315,14 @@ patternProperties:
enum: [0, 1]
mediatek,tdsel:
description: |
description:
An integer describing the steps for output level shifter duty
cycle when asserted (high pulse width adjustment). Valid arguments
are from 0 to 15.
$ref: /schemas/types.yaml#/definitions/uint32
mediatek,rdsel:
description: |
description:
An integer describing the steps for input level shifter duty cycle
when asserted (high pulse width adjustment). Valid arguments are
from 0 to 63.
......
Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml
View file @ 348551dd
......@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7981-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT7981 Pin Controller
title: MediaTek MT7981 Pin Controller
maintainers:
- Daniel Golle <daniel@makrotopia.org>
......@@ -37,7 +37,7 @@ properties:
"#gpio-cells":
const: 2
description: >
description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below mentioned gpio
binding representation for description of particular cells.
......@@ -111,7 +111,9 @@ patternProperties:
"watchdog1" "watchdog" 13
"udi" "udi" 9, 10, 11, 12, 13
"drv_vbus" "usb" 14
"emmc_45" "flash" 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25
"emmc_45" "flash" 15, 16, 17, 18, 19, 20, 21, 22, 23,
24, 25
"snfi" "flash" 16, 17, 18, 19, 20, 21
"spi0" "spi" 16, 17, 18, 19
"spi0_wp_hold" "spi" 20, 21
......@@ -148,7 +150,7 @@ patternProperties:
"wf5g_led0" "led" 31
"wf5g_led1" "led" 35
"mt7531_int" "eth" 38
"ant_sel" "ant" 14, 15, 16, 17, 18, 19, 20, 21, 22
"ant_sel" "ant" 14, 15, 16, 17, 18, 19, 20, 21, 22,
23, 24, 25, 34, 35
$ref: /schemas/pinctrl/pinmux-node.yaml
......@@ -256,7 +258,8 @@ patternProperties:
then:
properties:
groups:
enum: [gbe_led0, gbe_led1, wf2g_led0, wf2g_led1, wf5g_led0, wf5g_led1]
enum: [gbe_led0, gbe_led1, wf2g_led0, wf2g_led1, wf5g_led0,
wf5g_led1]
- if:
properties:
function:
......@@ -275,7 +278,8 @@ patternProperties:
properties:
groups:
items:
enum: [spi1_0, spi0, spi0_wp_hold, spi1_1, spi2, spi2_wp_hold]
enum: [spi1_0, spi0, spi0_wp_hold, spi1_1, spi2,
spi2_wp_hold]
maxItems: 4
- if:
properties:
......@@ -332,13 +336,14 @@ patternProperties:
JTAG_JTDO, JTAG_JTDI, JTAG_JTMS, JTAG_JTCLK, JTAG_JTRST_N,
WO_JTAG_JTDO, WO_JTAG_JTDI, WO_JTAG_JTMS, WO_JTAG_JTCLK,
WO_JTAG_JTRST_N, USB_VBUS, PWM0, SPI0_CLK, SPI0_MOSI,
SPI0_MISO, SPI0_CS, SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI,
SPI1_MISO, SPI1_CS, SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS,
SPI2_HOLD, SPI2_WP, UART0_RXD, UART0_TXD, PCIE_CLK_REQ,
PCIE_WAKE_N, SMI_MDC, SMI_MDIO, GBE_INT, GBE_RESET,
WF_DIG_RESETB, WF_CBA_RESETB, WF_XO_REQ, WF_TOP_CLK,
WF_TOP_DATA, WF_HB1, WF_HB2, WF_HB3, WF_HB4, WF_HB0,
WF_HB0_B, WF_HB5, WF_HB6, WF_HB7, WF_HB8, WF_HB9, WF_HB10]
SPI0_MISO, SPI0_CS, SPI0_HOLD, SPI0_WP, SPI1_CLK,
SPI1_MOSI, SPI1_MISO, SPI1_CS, SPI2_CLK, SPI2_MOSI,
SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP, UART0_RXD,
UART0_TXD, PCIE_CLK_REQ, PCIE_WAKE_N, SMI_MDC, SMI_MDIO,
GBE_INT, GBE_RESET, WF_DIG_RESETB, WF_CBA_RESETB,
WF_XO_REQ, WF_TOP_CLK, WF_TOP_DATA, WF_HB1, WF_HB2, WF_HB3,
WF_HB4, WF_HB0, WF_HB0_B, WF_HB5, WF_HB6, WF_HB7, WF_HB8,
WF_HB9, WF_HB10]
maxItems: 57
bias-disable: true
......@@ -348,7 +353,7 @@ patternProperties:
- type: boolean
description: normal pull up.
- enum: [100, 101, 102, 103]
description: >
description:
PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
dt-bindings/pinctrl/mt65xx.h.
......@@ -357,7 +362,7 @@ patternProperties:
- type: boolean
description: normal pull down.
- enum: [100, 101, 102, 103]
description: >
description:
PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
dt-bindings/pinctrl/mt65xx.h.
......
Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
View file @ 348551dd
......@@ -4,12 +4,12 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7986-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT7986 Pin Controller
title: MediaTek MT7986 Pin Controller
maintainers:
- Sean Wang <sean.wang@kernel.org>
description: |+
description:
The MediaTek's MT7986 Pin controller is used to control SoC pins.
properties:
......@@ -37,15 +37,15 @@ properties:
"#gpio-cells":
const: 2
description: |
Number of cells in GPIO specifier. Since the generic GPIO
binding is used, the amount of cells must be specified as 2. See the below
mentioned gpio binding representation for description of particular cells.
description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below mentioned gpio
binding representation for description of particular cells.
gpio-ranges:
minItems: 1
maxItems: 5
description: |
description:
GPIO valid number range.
interrupt-controller: true
......@@ -57,7 +57,7 @@ properties:
const: 2
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......@@ -72,7 +72,7 @@ patternProperties:
additionalProperties: false
patternProperties:
'.*mux.*':
'^.*mux.*$':
type: object
additionalProperties: false
description: |
......@@ -81,7 +81,7 @@ patternProperties:
The following table shows the effective values of "group", "function"
properties and chip pinout pins
groups function pins (in pin#)
groups function pins (in pin#)
---------------------------------------------------------------------
"watchdog" "watchdog" 0
"wifi_led" "led" 1, 2
......@@ -97,8 +97,9 @@ patternProperties:
"pwm1_0" "pwm" 22,
"snfi" "flash" 23, 24, 25, 26, 27, 28
"spi1_2" "spi" 29, 30, 31, 32
"emmc_45" "emmc" 22, 23, 24, 25, 26, 27, 28, 29, 30,
31, 32
"emmc_45" "emmc" 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
32
"spi1_1" "spi" 23, 24, 25, 26
"uart1_2_rx_tx" "uart" 29, 30
"uart1_2_cts_rts" "uart" 31, 32
......@@ -115,8 +116,9 @@ patternProperties:
"pcie_pereset" "pcie" 41
"uart1" "uart" 42, 43, 44, 45
"uart2" "uart" 46, 47, 48, 49
"emmc_51" "emmc" 50, 51, 52, 53, 54, 55, 56, 57, 57,
59, 60, 61
"emmc_51" "emmc" 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
60, 61
"pcm" "audio" 62, 63, 64, 65
"i2s" "audio" 62, 63, 64, 65
"switch_int" "eth" 66
......@@ -126,21 +128,20 @@ patternProperties:
"wf_dbdc" "wifi" 74, 75, 76, 77, 78, 79, 80, 81, 82, 83,
84, 85
$ref: "/schemas/pinctrl/pinmux-node.yaml"
$ref: /schemas/pinctrl/pinmux-node.yaml
properties:
function:
description: |
description:
A string containing the name of the function to mux to the group.
There is no "audio", "pcie" functions on mt7986b, you can only use
those functions on mt7986a.
enum: [audio, emmc, eth, i2c, led, flash, pcie, pwm, spi, uart,
watchdog, wifi]
groups:
description: |
description:
An array of strings. Each string contains the name of a group.
There is no "pcie_pereset", "uart1", "uart2" "emmc_51", "pcm",
and "i2s" groups on mt7986b, you can only use those groups on
mt7986a.
There is no "pcie_pereset", "uart1", "uart2" "emmc_51", "pcm", and
"i2s" groups on mt7986b, you can only use those groups on mt7986a.
required:
- function
- groups
......@@ -255,32 +256,33 @@ patternProperties:
items:
enum: [wf_2g, wf_5g, wf_dbdc]
maxItems: 3
'.*conf.*':
'^.*conf.*$':
type: object
additionalProperties: false
description: |
description:
pinconf configuration nodes.
$ref: "/schemas/pinctrl/pincfg-node.yaml"
$ref: /schemas/pinctrl/pincfg-node.yaml
properties:
pins:
description: |
An array of strings. Each string contains the name of a pin.
There is no PIN 41 to PIN 65 above on mt7686b, you can only use
those pins on mt7986a.
description:
An array of strings. Each string contains the name of a pin. There
is no PIN 41 to PIN 65 above on mt7686b, you can only use those
pins on mt7986a.
items:
enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,
GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,
GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14,
GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS,
SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS,
SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP,
UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD,
UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS,
UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2,
EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6,
EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX,
PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13,
GPIO_14, GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI,
SPI0_MISO, SPI0_CS, SPI0_HOLD, SPI0_WP, SPI1_CLK,
SPI1_MOSI, SPI1_MISO, SPI1_CS, SPI2_CLK, SPI2_MOSI,
SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP, UART0_RXD,
UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD, UART1_CTS,
UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS, UART2_RTS,
EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2, EMMC_DATA_3,
EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6, EMMC_DATA_7,
EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX, PCM_DRX,
PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,
WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,
WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,
......@@ -297,7 +299,7 @@ patternProperties:
- type: boolean
description: normal pull up.
- enum: [100, 101, 102, 103]
description: |
description:
PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
dt-bindings/pinctrl/mt65xx.h.
......@@ -306,7 +308,7 @@ patternProperties:
- type: boolean
description: normal pull down.
- enum: [100, 101, 102, 103]
description: |
description:
PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
dt-bindings/pinctrl/mt65xx.h.
......
Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
View file @ 348551dd
......@@ -4,12 +4,12 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8183-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT8183 Pin Controller
title: MediaTek MT8183 Pin Controller
maintainers:
- Sean Wang <sean.wang@kernel.org>
description: |+
description:
The MediaTek's MT8183 Pin controller is used to control SoC pins.
properties:
......@@ -37,15 +37,15 @@ properties:
"#gpio-cells":
const: 2
description: |
Number of cells in GPIO specifier. Since the generic GPIO
binding is used, the amount of cells must be specified as 2. See the below
mentioned gpio binding representation for description of particular cells.
description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below mentioned gpio
binding representation for description of particular cells.
gpio-ranges:
minItems: 1
maxItems: 5
description: |
description:
GPIO valid number range.
interrupt-controller: true
......@@ -57,7 +57,7 @@ properties:
const: 2
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......@@ -74,18 +74,18 @@ patternProperties:
'^pins':
type: object
additionalProperties: false
description: |
description:
A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and input
schmitt.
$ref: "/schemas/pinctrl/pincfg-node.yaml"
$ref: /schemas/pinctrl/pincfg-node.yaml
properties:
pinmux:
description:
integer array, represents gpio pin number and mux setting.
Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are
defined as macros in <soc>-pinfunc.h directly.
......@@ -110,8 +110,13 @@ patternProperties:
drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16]
drive-strength-microamp:
enum: [125, 250, 500, 1000]
mediatek,drive-strength-adv:
deprecated: true
description: |
DEPRECATED: Please use drive-strength-microamp instead.
Describe the specific driving setup property.
For I2C pins, the existing generic driving setup can only support
2/4/6/8/10/12/14/16mA driving. But in specific driving setup, they
......@@ -139,7 +144,8 @@ patternProperties:
mediatek,pull-up-adv:
description: |
Pull up setings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below:
configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
......@@ -150,7 +156,8 @@ patternProperties:
mediatek,pull-down-adv:
description: |
Pull down settings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below:
configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
......@@ -159,14 +166,14 @@ patternProperties:
enum: [0, 1, 2, 3]
mediatek,tdsel:
description: |
description:
An integer describing the steps for output level shifter duty
cycle when asserted (high pulse width adjustment). Valid arguments
are from 0 to 15.
$ref: /schemas/types.yaml#/definitions/uint32
mediatek,rdsel:
description: |
description:
An integer describing the steps for input level shifter duty cycle
when asserted (high pulse width adjustment). Valid arguments are
from 0 to 63.
......@@ -215,7 +222,7 @@ examples:
pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
<PINMUX_GPIO49__FUNC_SDA5>;
mediatek,pull-up-adv = <3>;
mediatek,drive-strength-adv = <7>;
drive-strength-microamp = <1000>;
};
};
......@@ -224,7 +231,6 @@ examples:
pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
<PINMUX_GPIO51__FUNC_SDA3>;
mediatek,pull-down-adv = <2>;
mediatek,drive-strength-adv = <4>;
};
};
};
......
Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml → Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml
View file @ 348551dd
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8186.yaml#
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8186-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT8186 Pin Controller
title: MediaTek MT8186 Pin Controller
maintainers:
- Sean Wang <sean.wang@mediatek.com>
description: |
The Mediatek's Pin controller is used to control SoC pins.
description:
The MediaTek's MT8186 Pin controller is used to control SoC pins.
properties:
compatible:
......@@ -19,10 +19,10 @@ properties:
gpio-controller: true
'#gpio-cells':
description: |
description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below
mentioned gpio binding representation for description of particular cells.
the amount of cells must be specified as 2. See the below mentioned gpio
binding representation for description of particular cells.
const: 2
gpio-ranges:
......@@ -31,14 +31,14 @@ properties:
gpio-line-names: true
reg:
description: |
Physical address base for gpio base registers. There are 8 different GPIO
description:
Physical address base for GPIO base registers. There are 8 different GPIO
physical address base in mt8186.
maxItems: 8
reg-names:
description: |
Gpio base register names.
description:
GPIO base register names.
items:
- const: iocfg0
- const: iocfg_lt
......@@ -60,9 +60,9 @@ properties:
mediatek,rsel-resistance-in-si-unit:
type: boolean
description: |
Identifying i2c pins pull up/down type which is RSEL. It can support
RSEL define or si unit value(ohm) to set different resistance.
description:
Identifying i2c pins pull up/down type which is RSEL. It can support RSEL
define or si unit value(ohm) to set different resistance.
# PIN CONFIGURATION NODES
patternProperties:
......@@ -77,8 +77,8 @@ patternProperties:
A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and
input schmitt.
configuration, pullups, drive strength, input enable/disable and input
schmitt.
An example of using macro:
pincontroller {
/* GPIO0 set as multifunction GPIO0 */
......@@ -94,15 +94,14 @@ patternProperties:
}
};
};
$ref: "pinmux-node.yaml"
$ref: pinmux-node.yaml
properties:
pinmux:
description: |
description:
Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are
defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h
directly.
defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16]
......@@ -129,10 +128,10 @@ patternProperties:
For pull down type is RSEL, it can add RSEL define & resistance
value(ohm) to set different resistance by identifying property
"mediatek,rsel-resistance-in-si-unit".
It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
& "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011"
define in mt8186. It can also support resistance value(ohm)
"75000" & "5000" in mt8186.
It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" &
"MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" define in
mt8186. It can also support resistance value(ohm) "75000" & "5000"
in mt8186.
An example of using RSEL define:
pincontroller {
i2c0_pin {
......@@ -174,10 +173,10 @@ patternProperties:
For pull up type is RSEL, it can add RSEL define & resistance
value(ohm) to set different resistance by identifying property
"mediatek,rsel-resistance-in-si-unit".
It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
& "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011"
define in mt8186. It can also support resistance value(ohm)
"1000" & "5000" & "10000" & "75000" in mt8186.
It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" &
"MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" define in
mt8186. It can also support resistance value(ohm) "1000" & "5000"
& "10000" & "75000" in mt8186.
An example of using si unit resistance value(ohm):
&pio {
mediatek,rsel-resistance-in-si-unit;
......
Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml
View file @ 348551dd
......@@ -9,7 +9,7 @@ title: MediaTek MT8188 Pin Controller
maintainers:
- Hui Liu <hui.liu@mediatek.com>
description: |
description:
The MediaTek's MT8188 Pin controller is used to control SoC pins.
properties:
......@@ -19,10 +19,10 @@ properties:
gpio-controller: true
'#gpio-cells':
description: |
Number of cells in GPIO specifier, should be two. The first cell
is the pin number, the second cell is used to specify optional
parameters which are defined in <dt-bindings/gpio/gpio.h>.
description:
Number of cells in GPIO specifier, should be two. The first cell is the
pin number, the second cell is used to specify optional parameters which
are defined in <dt-bindings/gpio/gpio.h>.
const: 2
gpio-ranges:
......@@ -59,10 +59,11 @@ properties:
mediatek,rsel-resistance-in-si-unit:
type: boolean
description: |
We provide two methods to select the resistance for I2C when pull up or pull down.
The first is by RSEL definition value, another one is by resistance value(ohm).
This flag is used to identify if the method is resistance(si unit) value.
description:
We provide two methods to select the resistance for I2C when pull up or
pull down. The first is by RSEL definition value, another one is by
resistance value(ohm). This flag is used to identify if the method is
resistance(si unit) value.
# PIN CONFIGURATION NODES
patternProperties:
......@@ -73,22 +74,22 @@ patternProperties:
patternProperties:
'^pins':
type: object
$ref: "/schemas/pinctrl/pincfg-node.yaml"
$ref: /schemas/pinctrl/pincfg-node.yaml
additionalProperties: false
description: |
description:
A pinctrl node should contain at least one subnode representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and
input schmitt.
configuration, pullups, drive strength, input enable/disable and input
schmitt.
properties:
pinmux:
description: |
description:
Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are
defined as macros in dt-bindings/pinctrl/mediatek,<soc>-pinfunc.h
directly.
defined as macros in dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h
directly, for this SoC.
drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16]
......@@ -106,18 +107,21 @@ patternProperties:
- enum: [75000, 5000]
description: mt8188 pull down RSEL type si unit value(ohm).
description: |
For pull down type is normal, it doesn't need add RSEL & R1R0 define
and resistance value.
For pull down type is normal, it doesn't need add RSEL & R1R0
define and resistance value.
For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
"MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
define in mt8188.
For pull down type is RSEL, it can add RSEL define & resistance value(ohm)
to set different resistance by identifying property "mediatek,rsel-resistance-in-si-unit".
It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
& "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" & "MTK_PULL_SET_RSEL_100"
& "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111"
define in mt8188. It can also support resistance value(ohm) "75000" & "5000" in mt8188.
"MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
"MTK_PUPD_SET_R1R0_11" define in mt8188.
For pull down type is RSEL, it can add RSEL define & resistance
value(ohm) to set different resistance by identifying property
"mediatek,rsel-resistance-in-si-unit". It can support
"MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" &
"MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
"MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" &
"MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" define in
mt8188. It can also support resistance value(ohm) "75000" & "5000"
in mt8188.
bias-pull-up:
oneOf:
......@@ -131,17 +135,19 @@ patternProperties:
description: |
For pull up type is normal, it don't need add RSEL & R1R0 define
and resistance value.
For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
"MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
define in mt8188.
For pull up type is RSEL, it can add RSEL define & resistance value(ohm)
to set different resistance by identifying property "mediatek,rsel-resistance-in-si-unit".
It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
& "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" & "MTK_PULL_SET_RSEL_100"
& "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111"
define in mt8188. It can also support resistance value(ohm)
"1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000" in mt8188.
For pull up type is PUPD/R0/R1 type, it can add R1R0 define to set
different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
"MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
"MTK_PUPD_SET_R1R0_11" define in mt8188.
For pull up type is RSEL, it can add RSEL define & resistance
value(ohm) to set different resistance by identifying property
"mediatek,rsel-resistance-in-si-unit". It can support
"MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" &
"MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
"MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" &
"MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" define in
mt8188. It can also support resistance value(ohm) "1000" & "1500"
& "2000" & "3000" & "4000" & "5000" & "10000" & "75000" in mt8188.
bias-disable: true
......
Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml → Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml
View file @ 348551dd
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8192.yaml#
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8192-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT8192 Pin Controller
title: MediaTek MT8192 Pin Controller
maintainers:
- Sean Wang <sean.wang@mediatek.com>
description: |
The Mediatek's Pin controller is used to control SoC pins.
description:
The MediaTek's MT8192 Pin controller is used to control SoC pins.
properties:
compatible:
......@@ -19,27 +19,27 @@ properties:
gpio-controller: true
'#gpio-cells':
description: |
description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below
mentioned gpio binding representation for description of particular cells.
the amount of cells must be specified as 2. See the below mentioned gpio
binding representation for description of particular cells.
const: 2
gpio-ranges:
description: gpio valid number range.
description: GPIO valid number range.
maxItems: 1
gpio-line-names: true
reg:
description: |
Physical address base for gpio base registers. There are 11 GPIO
physical address base in mt8192.
description:
Physical address base for GPIO base registers. There are 11 GPIO physical
address base in mt8192.
maxItems: 11
reg-names:
description: |
Gpio base register names.
description:
GPIO base register names.
maxItems: 11
interrupt-controller: true
......@@ -59,25 +59,26 @@ patternProperties:
patternProperties:
'^pins':
type: object
description: |
description:
A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and
input schmitt.
$ref: "pinmux-node.yaml"
configuration, pullups, drive strength, input enable/disable and input
schmitt.
$ref: pinmux-node.yaml
properties:
pinmux:
description: |
description:
Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are defined
as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
Supported pin number and mux varies for different SoCs, and are
defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
drive-strength:
description: |
It can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA, etc. See
dt-bindings/pinctrl/mt65xx.h. It can only support 2/4/6/8/10/12/14/16mA in mt8192.
description:
It can support some arguments, such as MTK_DRIVE_4mA,
MTK_DRIVE_6mA, etc. See dt-bindings/pinctrl/mt65xx.h. It can only
support 2/4/6/8/10/12/14/16mA in mt8192.
enum: [2, 4, 6, 8, 10, 12, 14, 16]
drive-strength-microamp:
......@@ -91,8 +92,8 @@ patternProperties:
description: PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0_
defines in dt-bindings/pinctrl/mt65xx.h.
- enum: [200, 201, 202, 203]
description: RSEL pull down type. See MTK_PULL_SET_RSEL_
defines in dt-bindings/pinctrl/mt65xx.h.
description: RSEL pull down type. See MTK_PULL_SET_RSEL_ defines
in dt-bindings/pinctrl/mt65xx.h.
bias-pull-up:
oneOf:
......@@ -102,8 +103,8 @@ patternProperties:
description: PUPD/R1/R0 pull up type. See MTK_PUPD_SET_R1R0_
defines in dt-bindings/pinctrl/mt65xx.h.
- enum: [200, 201, 202, 203]
description: RSEL pull up type. See MTK_PULL_SET_RSEL_
defines in dt-bindings/pinctrl/mt65xx.h.
description: RSEL pull up type. See MTK_PULL_SET_RSEL_ defines
in dt-bindings/pinctrl/mt65xx.h.
bias-disable: true
......@@ -125,7 +126,7 @@ patternProperties:
additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml → Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml
View file @ 348551dd
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8195.yaml#
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8195-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT8195 Pin Controller
title: MediaTek MT8195 Pin Controller
maintainers:
- Sean Wang <sean.wang@mediatek.com>
description: |
The Mediatek's Pin controller is used to control SoC pins.
description:
The MediaTek's MT8195 Pin controller is used to control SoC pins.
properties:
compatible:
......@@ -19,27 +19,27 @@ properties:
gpio-controller: true
'#gpio-cells':
description: |
description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below
mentioned gpio binding representation for description of particular cells.
the amount of cells must be specified as 2. See the below mentioned gpio
binding representation for description of particular cells.
const: 2
gpio-ranges:
description: gpio valid number range.
description: GPIO valid number range.
maxItems: 1
gpio-line-names: true
reg:
description: |
Physical address base for gpio base registers. There are 8 GPIO
physical address base in mt8195.
description:
Physical address base for GPIO base registers. There are 8 GPIO physical
address base in mt8195.
maxItems: 8
reg-names:
description: |
Gpio base register names.
description:
GPIO base register names.
maxItems: 8
interrupt-controller: true
......@@ -53,9 +53,9 @@ properties:
mediatek,rsel-resistance-in-si-unit:
type: boolean
description: |
Identifying i2c pins pull up/down type which is RSEL. It can support
RSEL define or si unit value(ohm) to set different resistance.
description:
Identifying i2c pins pull up/down type which is RSEL. It can support RSEL
define or si unit value(ohm) to set different resistance.
# PIN CONFIGURATION NODES
patternProperties:
......@@ -70,8 +70,8 @@ patternProperties:
A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and
input schmitt.
configuration, pullups, drive strength, input enable/disable and input
schmitt.
An example of using macro:
pincontroller {
/* GPIO0 set as multifunction GPIO0 */
......@@ -87,15 +87,14 @@ patternProperties:
}
};
};
$ref: "pinmux-node.yaml"
$ref: pinmux-node.yaml
properties:
pinmux:
description: |
description:
Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are
defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h
directly.
defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16]
......@@ -174,9 +173,9 @@ patternProperties:
& "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011"
& "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101"
& "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111"
define in mt8195. It can also support resistance value(ohm)
"1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" &
"75000" in mt8195.
define in mt8195. It can also support resistance value(ohm) "1000"
& "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000"
in mt8195.
An example of using RSEL define:
pincontroller {
i2c0-pins {
......@@ -217,7 +216,7 @@ patternProperties:
- pinmux
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
View file @ 348551dd
......@@ -4,13 +4,13 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8365-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT8365 Pin Controller
title: MediaTek MT8365 Pin Controller
maintainers:
- Zhiyong Tao <zhiyong.tao@mediatek.com>
- Bernhard Rosenkränzer <bero@baylibre.com>
description: |
description:
The MediaTek's MT8365 Pin controller is used to control SoC pins.
properties:
......@@ -26,17 +26,17 @@ properties:
maxItems: 1
minItems: 1
maxItems: 2
description: |
description:
Should be phandles of the syscfg node.
gpio-controller: true
"#gpio-cells":
const: 2
description: |
Number of cells in GPIO specifier. Since the generic GPIO
binding is used, the amount of cells must be specified as 2. See the below
mentioned gpio binding representation for description of particular cells.
description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below mentioned gpio
binding representation for description of particular cells.
interrupt-controller: true
......@@ -54,7 +54,7 @@ patternProperties:
"pins$":
type: object
additionalProperties: false
description: |
description:
A pinctrl node should contain at least one subnode representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
......@@ -65,19 +65,42 @@ patternProperties:
properties:
pinmux:
description:
integer array, represents gpio pin number and mux setting.
Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are
defined as macros in <soc>-pinfunc.h directly.
bias-disable: true
bias-pull-up:
oneOf:
- type: boolean
- enum: [100, 101, 102, 103]
description: Pull up R1/R0 type define value.
description: |
Besides generic pinconfig options, it can be used as the pull up
settings for 2 pull resistors, R0 and R1. User can configure those
special pins.
For pull up type is normal, it don't need add R1/R0 define.
For pull up type is R1/R0 type, it can add value to set different
resistance. Valid arguments are described as below:
100: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
101: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
102: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
103: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
bias-pull-down:
oneOf:
- type: boolean
- enum: [100, 101, 102, 103]
description: Pull down R1/R0 type define value.
description: |
For pull down type is normal, it don't need add R1/R0 define.
For pull down type is R1/R0 type, it can add value to set
different resistance. Valid arguments are described as below:
100: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
101: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
102: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
103: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
bias-pull-down: true
drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16]
input-enable: true
......@@ -91,8 +114,13 @@ patternProperties:
input-schmitt-disable: true
drive-strength-microamp:
enum: [125, 250, 500, 1000]
mediatek,drive-strength-adv:
deprecated: true
description: |
DEPRECATED: Please use drive-strength-microamp instead.
Describe the specific driving setup property.
For I2C pins, the existing generic driving setup can only support
2/4/6/8/10/12/14/16mA driving. But in specific driving setup, they
......@@ -118,9 +146,12 @@ patternProperties:
enum: [0, 1, 2, 3, 4, 5, 6, 7]
mediatek,pull-up-adv:
deprecated: true
description: |
DEPRECATED: Please use bias-pull-up instead.
Pull up setings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below:
configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
......@@ -129,9 +160,12 @@ patternProperties:
enum: [0, 1, 2, 3]
mediatek,pull-down-adv:
deprecated: true
description: |
DEPRECATED: Please use bias-pull-down instead.
Pull down settings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below:
configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
......@@ -140,14 +174,14 @@ patternProperties:
enum: [0, 1, 2, 3]
mediatek,tdsel:
description: |
description:
An integer describing the steps for output level shifter duty
cycle when asserted (high pulse width adjustment). Valid arguments
are from 0 to 15.
$ref: /schemas/types.yaml#/definitions/uint32
mediatek,rdsel:
description: |
description:
An integer describing the steps for input level shifter duty cycle
when asserted (high pulse width adjustment). Valid arguments are
from 0 to 63.
......@@ -189,7 +223,6 @@ examples:
pins {
pinmux = <MT8365_PIN_59_SDA1__FUNC_SDA1_0>, <MT8365_PIN_60_SCL1__FUNC_SCL1_0>;
mediatek,pull-up-adv = <3>;
mediatek,drive-strength-adv = <00>;
bias-pull-up;
};
};
......
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt deleted 100644 → 0
View file @ 7df047b3
== Amlogic Meson pinmux controller ==
Required properties for the root node:
- compatible: one of "amlogic,meson8-cbus-pinctrl"
"amlogic,meson8b-cbus-pinctrl"
"amlogic,meson8m2-cbus-pinctrl"
"amlogic,meson8-aobus-pinctrl"
"amlogic,meson8b-aobus-pinctrl"
"amlogic,meson8m2-aobus-pinctrl"
"amlogic,meson-gxbb-periphs-pinctrl"
"amlogic,meson-gxbb-aobus-pinctrl"
"amlogic,meson-gxl-periphs-pinctrl"
"amlogic,meson-gxl-aobus-pinctrl"
"amlogic,meson-axg-periphs-pinctrl"
"amlogic,meson-axg-aobus-pinctrl"
"amlogic,meson-g12a-periphs-pinctrl"
"amlogic,meson-g12a-aobus-pinctrl"
"amlogic,meson-a1-periphs-pinctrl"
"amlogic,meson-s4-periphs-pinctrl"
- reg: address and size of registers controlling irq functionality
=== GPIO sub-nodes ===
The GPIO bank for the controller is represented as a sub-node and it acts as a
GPIO controller.
Required properties for sub-nodes are:
- reg: should contain a list of address and size, one tuple for each entry
in reg-names.
- reg-names: an array of strings describing the "reg" entries.
Must contain "mux" and "gpio".
May contain "pull", "pull-enable" and "ds" when appropriate.
- gpio-controller: identifies the node as a gpio controller
- #gpio-cells: must be 2
=== Other sub-nodes ===
Child nodes without the "gpio-controller" represent some desired
configuration for a pin or a group. Those nodes can be pinmux nodes or
configuration nodes.
Required properties for pinmux nodes are:
- groups: a list of pinmux groups. The list of all available groups
depends on the SoC and can be found in driver sources.
- function: the name of a function to activate for the specified set
of groups. The list of all available functions depends on the SoC
and can be found in driver sources.
Required properties for configuration nodes:
- pins: a list of pin names
Configuration nodes support the following generic properties, as
described in file pinctrl-bindings.txt:
- "bias-disable"
- "bias-pull-up"
- "bias-pull-down"
- "output-enable"
- "output-disable"
- "output-low"
- "output-high"
Optional properties :
- drive-strength-microamp: Drive strength for the specified pins in uA.
This property is only valid for G12A and newer.
=== Example ===
pinctrl: pinctrl@c1109880 {
compatible = "amlogic,meson8-cbus-pinctrl";
reg = <0xc1109880 0x10>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
gpio: banks@c11080b0 {
reg = <0xc11080b0 0x28>,
<0xc11080e8 0x18>,
<0xc1108120 0x18>,
<0xc1108030 0x30>;
reg-names = "mux", "pull", "pull-enable", "gpio";
gpio-controller;
#gpio-cells = <2>;
};
nand {
mux {
groups = "nand_io", "nand_io_ce0", "nand_io_ce1",
"nand_io_rb0", "nand_ale", "nand_cle",
"nand_wen_clk", "nand_ren_clk", "nand_dqs",
"nand_ce2", "nand_ce3";
function = "nand";
};
};
};
Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml
View file @ 348551dd
......@@ -54,8 +54,8 @@ patternProperties:
'-pins$':
type: object
allOf:
- $ref: "pinmux-node.yaml"
- $ref: "pincfg-node.yaml"
- $ref: pinmux-node.yaml
- $ref: pincfg-node.yaml
properties:
function: true
......@@ -78,7 +78,7 @@ required:
- gpio-ranges
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
- if:
properties:
compatible:
......
Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml 0 → 100644
View file @ 348551dd
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright 2022 NXP
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/nxp,s32g2-siul2-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP S32G2 pin controller
maintainers:
- Ghennadi Procopciuc <Ghennadi.Procopciuc@oss.nxp.com>
- Chester Lin <clin@suse.com>
description: |
S32G2 pinmux is implemented in SIUL2 (System Integration Unit Lite2),
whose memory map is split into two regions:
SIUL2_0 @ 0x4009c000
SIUL2_1 @ 0x44010000
Every SIUL2 region has multiple register types, and here only MSCR and
IMCR registers need to be revealed for kernel to configure pinmux.
Please note that some register indexes are reserved in S32G2, such as
MSCR102-MSCR111, MSCR123-MSCR143, IMCR84-IMCR118 and IMCR398-IMCR429.
properties:
compatible:
enum:
- nxp,s32g2-siul2-pinctrl
reg:
description: |
A list of MSCR/IMCR register regions to be reserved.
- MSCR (Multiplexed Signal Configuration Register)
An MSCR register can configure the associated pin as either a GPIO pin
or a function output pin depends on the selected signal source.
- IMCR (Input Multiplexed Signal Configuration Register)
An IMCR register can configure the associated pin as function input
pin depends on the selected signal source.
items:
- description: MSCR registers group 0 in SIUL2_0
- description: MSCR registers group 1 in SIUL2_1
- description: MSCR registers group 2 in SIUL2_1
- description: IMCR registers group 0 in SIUL2_0
- description: IMCR registers group 1 in SIUL2_1
- description: IMCR registers group 2 in SIUL2_1
patternProperties:
'-pins$':
type: object
additionalProperties: false
patternProperties:
'-grp[0-9]$':
type: object
allOf:
- $ref: pinmux-node.yaml#
- $ref: pincfg-node.yaml#
description: |
Pinctrl node's client devices specify pin muxes using subnodes,
which in turn use the standard properties below.
properties:
bias-disable: true
bias-high-impedance: true
bias-pull-up: true
bias-pull-down: true
drive-open-drain: true
input-enable: true
output-enable: true
pinmux:
description: |
An integer array for representing pinmux configurations of
a device. Each integer consists of a PIN_ID and a 4-bit
selected signal source(SSS) as IOMUX setting, which is
calculated as: pinmux = (PIN_ID << 4 | SSS)
slew-rate:
description: Supported slew rate based on Fmax values (MHz)
enum: [83, 133, 150, 166, 208]
additionalProperties: false
required:
- compatible
- reg
additionalProperties: false
examples:
- |
pinctrl@4009c240 {
compatible = "nxp,s32g2-siul2-pinctrl";
/* MSCR0-MSCR101 registers on siul2_0 */
reg = <0x4009c240 0x198>,
/* MSCR112-MSCR122 registers on siul2_1 */
<0x44010400 0x2c>,
/* MSCR144-MSCR190 registers on siul2_1 */
<0x44010480 0xbc>,
/* IMCR0-IMCR83 registers on siul2_0 */
<0x4009ca40 0x150>,
/* IMCR119-IMCR397 registers on siul2_1 */
<0x44010c1c 0x45c>,
/* IMCR430-IMCR495 registers on siul2_1 */
<0x440110f8 0x108>;
llce-can0-pins {
llce-can0-grp0 {
pinmux = <0x2b0>;
input-enable;
slew-rate = <208>;
};
llce-can0-grp1 {
pinmux = <0x2c2>;
output-enable;
slew-rate = <208>;
};
};
};
...
Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml
View file @ 348551dd
......@@ -56,6 +56,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -92,19 +93,9 @@ $defs:
rx1, sdc_data, sdc_clk, sdc_cmd, tsens_max, wci_txd, wci_rxd,
wsi_clk, wsi_clk3, wsi_data, wsi_data3, wsis_reset, xfem ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
required:
- compatible
- reg
......
Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml
View file @ 348551dd
......@@ -43,6 +43,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -89,18 +90,9 @@ $defs:
sd_write, sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, uim1, uim2,
uim3, uim_batt, wcss_bt, wcss_fm, wcss_wlan, webcam1_rst ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.yaml
View file @ 348551dd
......@@ -53,6 +53,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -92,19 +93,9 @@ $defs:
qdss_tracedata_b, qpic, rx0, rx1, rx2, sd_card, sd_write,
tsens_max, wci2a, wci2b, wci2c, wci2d ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml 0 → 100644
View file @ 348551dd
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/qcom,ipq9574-tlmm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. IPQ9574 TLMM block
maintainers:
- Bjorn Andersson <andersson@kernel.org>
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
description:
Top Level Mode Multiplexer pin controller in Qualcomm IPQ9574 SoC.
properties:
compatible:
const: qcom,ipq9574-tlmm
reg:
maxItems: 1
interrupts:
maxItems: 1
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
"#gpio-cells": true
gpio-ranges: true
wakeup-parent: true
gpio-reserved-ranges:
minItems: 1
maxItems: 33
gpio-line-names:
maxItems: 65
patternProperties:
"-state$":
oneOf:
- $ref: "#/$defs/qcom-ipq9574-tlmm-state"
- patternProperties:
"-pins$":
$ref: "#/$defs/qcom-ipq9574-tlmm-state"
additionalProperties: false
$defs:
qcom-ipq9574-tlmm-state:
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
properties:
pins:
description:
List of gpio pins affected by the properties specified in this
subnode.
items:
pattern: "^gpio([0-9]|[1-5][0-9]|6[0-4])$"
minItems: 1
maxItems: 8
function:
description:
Specify the alternative function to be configured for the specified
pins.
enum: [ atest_char, atest_char0, atest_char1, atest_char2, atest_char3,
audio_pdm0, audio_pdm1, audio_pri, audio_sec, blsp0_spi, blsp0_uart,
blsp1_i2c, blsp1_spi, blsp1_uart, blsp2_i2c, blsp2_spi,
blsp2_uart, blsp3_i2c, blsp3_spi, blsp3_uart, blsp4_i2c,
blsp4_spi, blsp4_uart, blsp5_i2c, blsp5_uart, cri_trng0,
cri_trng1, cri_trng2, cri_trng3, cxc0, cxc1, dbg_out, dwc_ddrphy,
gcc_plltest, gcc_tlmm, gpio, mac, mdc, mdio, pcie0_clk, pcie0_wake,
pcie1_clk, pcie1_wake, pcie2_clk, pcie2_wake, pcie3_clk, pcie3_wake,
prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3, pta, pwm,
qdss_cti_trig_in_a0, qdss_cti_trig_in_a1, qdss_cti_trig_in_b0,
qdss_cti_trig_in_b1, qdss_cti_trig_out_a0, qdss_cti_trig_out_a1,
qdss_cti_trig_out_b0, qdss_cti_trig_out_b1, qdss_traceclk_a,
qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a,
qdss_tracedata_b, qspi_clk, qspi_cs, qspi_data,
rx0, rx1, sdc_clk, sdc_cmd, sdc_data, sdc_rclk, tsens_max,
wci20, wci21, wsa_swrm ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
tlmm: pinctrl@1000000 {
compatible = "qcom,ipq9574-tlmm";
reg = <0x01000000 0x300000>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&tlmm 0 0 65>;
uart2-state {
pins = "gpio34", "gpio35";
function = "blsp2_uart";
drive-strength = <8>;
bias-pull-down;
};
};
Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-tlmm.yaml
View file @ 348551dd
......@@ -54,6 +54,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -105,19 +106,9 @@ $defs:
uim1_clk, uim1_data, uim1_present, uim1_reset, uim2_clk,
uim2_data, uim2_present, uim2_reset, uim_batt, wlan_en1, ]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
......
Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.yaml
View file @ 348551dd
......@@ -51,6 +51,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -70,19 +71,9 @@ $defs:
enum: [ gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart,
sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio, cdc_mclk, ]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
output-high: true
output-low: true
input-enable: true
required:
- pins
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
......
Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
View file @ 348551dd
......@@ -48,6 +48,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -71,19 +72,9 @@ $defs:
blsp_uart3, blsp_uart4, blsp_uart5, cam_mclk0, cam_mclk1,
gp0_clk, gp1_clk, sdc3, wlan ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.yaml
View file @ 348551dd
......@@ -53,6 +53,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -81,20 +82,9 @@ $defs:
sdc5, tsif1, tsif2, usb_fs1, usb_fs1_oe_n, usb_fs2,
usb_fs2_oe_n, vfe, vsens_alarm, ebi2, ebi2cs ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
View file @ 348551dd
......@@ -55,6 +55,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -104,19 +105,9 @@ $defs:
uim3_clk, uim3_data, uim3_present, uim3_reset, uim_batt,
wcss_bt, wcss_fm, wcss_wlan ]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
......
Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.yaml
View file @ 348551dd
......@@ -53,6 +53,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -103,19 +104,9 @@ $defs:
uim1, uim2, uim3, uim_batt, wcss_bt, wcss_fm, wcss_wlan,
webcam1_rst ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
View file @ 348551dd
......@@ -45,6 +45,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -106,18 +107,9 @@ $defs:
uim_batt, us_emitter, us_euro, wcss_bt, wcss_fm, wcss_wlan,
wcss_wlan0, wcss_wlan1, wcss_wlan2, wsa_en, wsa_io, wsa_irq ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.yaml
View file @ 348551dd
......@@ -53,6 +53,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -97,19 +98,9 @@ $defs:
vfe_camif_timer7_a, vfe_camif_timer7_b, vfe_camif_timer7_c,
wlan ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.yaml
View file @ 348551dd
......@@ -53,6 +53,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -93,14 +94,6 @@ $defs:
tsif1, tsif2, hsic, grfc, audio_ref_clk, qua_mi2s, pri_mi2s,
spkr_mi2s, ter_mi2s, sec_mi2s, bt, fm, wlan, slimbus, hsic_ctl ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
......@@ -124,8 +117,6 @@ $defs:
output-high: false
output-low: false
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.yaml
View file @ 348551dd
......@@ -53,6 +53,7 @@ $defs:
Desired pin configuration for a device or its specific state (like sleep
or active).
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -93,19 +94,9 @@ $defs:
wsa_irq, blsp_i2c8, pa_indicator, modem_tsync, ssbi_wtr1,
gsm1_tx, gsm0_tx, sdcard_det, sec_mi2s, ss_switch ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml
View file @ 348551dd
......@@ -55,6 +55,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -103,19 +104,9 @@ $defs:
pri_mi2s, sdc4, sec_mi2s, slimbus, spkr_i2s, ter_mi2s, tsif1,
tsif2, uim_batt_alarm, uim1, uim2, uim3, uim4 ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml
View file @ 348551dd
......@@ -53,6 +53,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -122,19 +123,9 @@ $defs:
modem_tsync, nav_dr, nav_pps, pci_e1, gsm_tx, qspi_cs, ssbi2,
ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3 ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.yaml
View file @ 348551dd
......@@ -53,6 +53,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -107,19 +108,9 @@ $defs:
vsense_clkout, vsense_data0, vsense_data1, vsense_mode,
wlan1_adc0, wlan1_adc1, wlan2_adc0, wlan2_adc1 ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
View file @ 348551dd
......@@ -52,12 +52,14 @@ properties:
- qcom,pm8994-gpio
- qcom,pm8998-gpio
- qcom,pma8084-gpio
- qcom,pmi632-gpio
- qcom,pmi8950-gpio
- qcom,pmi8994-gpio
- qcom,pmi8998-gpio
- qcom,pmk8350-gpio
- qcom,pmk8550-gpio
- qcom,pmm8155au-gpio
- qcom,pmm8654au-gpio
- qcom,pmp8074-gpio
- qcom,pmr735a-gpio
- qcom,pmr735b-gpio
......@@ -173,6 +175,7 @@ allOf:
- qcom,pm8350b-gpio
- qcom,pm8550ve-gpio
- qcom,pm8950-gpio
- qcom,pmi632-gpio
then:
properties:
gpio-line-names:
......@@ -395,8 +398,8 @@ $defs:
qcom-pmic-gpio-state:
type: object
allOf:
- $ref: "pinmux-node.yaml"
- $ref: "pincfg-node.yaml"
- $ref: pinmux-node.yaml
- $ref: pincfg-node.yaml
properties:
pins:
description:
......@@ -434,11 +437,13 @@ $defs:
- gpio1-gpio22 for pm8994
- gpio1-gpio26 for pm8998
- gpio1-gpio22 for pma8084
- gpio1-gpio8 for pmi632
- gpio1-gpio2 for pmi8950
- gpio1-gpio10 for pmi8994
- gpio1-gpio4 for pmk8350
- gpio1-gpio6 for pmk8550
- gpio1-gpio10 for pmm8155au
- gpio1-gpio12 for pmm8654au
- gpio1-gpio12 for pmp8074 (holes on gpio1 and gpio12)
- gpio1-gpio4 for pmr735a
- gpio1-gpio4 for pmr735b
......
Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.yaml
View file @ 348551dd
......@@ -82,8 +82,8 @@ $defs:
qcom-pmic-mpp-state:
type: object
allOf:
- $ref: "pinmux-node.yaml"
- $ref: "pincfg-node.yaml"
- $ref: pinmux-node.yaml
- $ref: pincfg-node.yaml
properties:
pins:
description:
......
Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-tlmm.yaml
View file @ 348551dd
......@@ -85,6 +85,7 @@ $defs:
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
......
Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.yaml
View file @ 348551dd
......@@ -59,6 +59,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -119,19 +120,9 @@ $defs:
spdifrx_opt, spi_lcd, spkr_dac0, wlan1_adc0, wlan1_adc1,
wlan2_adc0, wlan2_adc1, wsa_en ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,qdu1000-tlmm.yaml
View file @ 348551dd
......@@ -55,6 +55,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -93,19 +94,9 @@ $defs:
usb2phy_ac, usb_con_det, usb_dfp_en, usb_phy, vfr_0, vfr_1,
vsense_trigger ]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
required:
- compatible
- reg
......
Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml
View file @ 348551dd
......@@ -58,6 +58,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -103,19 +104,9 @@ $defs:
tgu_ch2, tgu_ch3, tgu_ch4, tgu_ch5, tsense_pwm1, tsense_pwm2,
tsense_pwm3, tsense_pwm4, usb2phy_ac, vsense_trigger ]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
......
Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml
View file @ 348551dd
......@@ -59,6 +59,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -100,19 +101,9 @@ $defs:
_V_GPIO, _V_PPS_IN, _V_PPS_OUT, vsense_trigger, wlan1_adc0,
wlan1_adc1, wlan2_adc0, wlan2_adc1 ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
View file @ 348551dd
......@@ -50,7 +50,7 @@ $defs:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: "/schemas/pinctrl/pincfg-node.yaml"
$ref: /schemas/pinctrl/pincfg-node.yaml
properties:
pins:
......
Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
View file @ 348551dd
......@@ -62,6 +62,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -110,20 +111,9 @@ $defs:
uim1_clk, uim1_data, uim1_present, uim1_reset, usb2phy_ac,
usb_phy, vfr_0, vfr_1, vsense_trigger ]
bias-pull-down: true
bias-pull-up: true
bias-bus-hold: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-tlmm.yaml
View file @ 348551dd
......@@ -62,6 +62,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -102,19 +103,9 @@ $defs:
usb0_phy, usb1_phy, usb2phy_ac, vfr_1, vsense_trigger,
wlan1_adc, wlan2_adc, wmss_reset ]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
......
Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml
View file @ 348551dd
......@@ -20,7 +20,7 @@ properties:
reg:
items:
- description: LPASS LPI TLMM Control and Status registers
- description: LPASS LPI pins SLEW registers
- description: LPASS LPI MCC registers
clocks:
items:
......
Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml
View file @ 348551dd
......@@ -104,6 +104,7 @@ $defs:
usb1_phy, usb1_sbrx, usb1_sbtx, usb1_usb4, usb2phy_ac,
vsense_trigger ]
bias-bus-hold: true
bias-disable: true
bias-pull-down: true
bias-pull-up: true
......
Documentation/devicetree/bindings/pinctrl/qcom,sdm630-pinctrl.yaml
View file @ 348551dd
......@@ -65,6 +65,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -122,19 +123,9 @@ $defs:
vsense_data0, vsense_data1, vsense_mode, wlan1_adc0,
wlan1_adc1, wlan2_adc0, wlan2_adc1 ]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
required:
- compatible
- reg
......
Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml
View file @ 348551dd
......@@ -58,6 +58,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -94,20 +95,9 @@ $defs:
uim1_reset, uim2_clk, uim2_data, uim2_present, uim2_reset, uim_batt, usb_phy, vfr_1,
vsense_trigger, wlan1_adc0, wlan1_adc1, wlan2_adc0, wlan2_adc1, wsa_clk, wsa_data, ]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
......
Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml
View file @ 348551dd
......@@ -61,6 +61,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -102,19 +103,9 @@ $defs:
uim_batt, usb_phy, vfr_1, vsense_trigger, wlan1_adc0,
wlan1_adc1, wlan2_adc0, wlan2_adc1]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
required:
- compatible
- reg
......
Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
View file @ 348551dd
......@@ -48,6 +48,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -91,18 +92,9 @@ $defs:
uim1_present, uim1_reset, uim2_clk, uim2_data, uim2_present,
uim2_reset, usb2phy_ac, vsense_trigger ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml
View file @ 348551dd
......@@ -47,6 +47,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -111,18 +112,9 @@ $defs:
qspi_cs, ssbi2, ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3,
gpio ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml
View file @ 348551dd
......@@ -53,6 +53,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -85,18 +86,9 @@ $defs:
uim2_present, uim2_reset, usb_phy, vfr_1, vsense_trigger,
wlan1_adc0, elan1_adc1 ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml
View file @ 348551dd
......@@ -61,6 +61,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -101,19 +102,9 @@ $defs:
wlan1_adc0, wlan1_adc1, wlan2_adc0, wlan2_adc1, wsa_clk, wsa_data ]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
......
Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml
View file @ 348551dd
......@@ -63,6 +63,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -108,20 +109,9 @@ $defs:
uim2_present, uim2_reset, usb_phy, vfr_1, vsense_trigger, wlan1_adc0, wlan1_adc1,
wlan2_adc0, wlan2_adc1, ]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
......
Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
View file @ 348551dd
......@@ -55,6 +55,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -109,20 +110,9 @@ $defs:
usb_phy, vfr_1, vsense_trigger, wlan1_adc0, wlan1_adc1,
wlan2_adc0, wlan2_adc1 ]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
......
Documentation/devicetree/bindings/pinctrl/qcom,sm7150-tlmm.yaml 0 → 100644
View file @ 348551dd
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/qcom,sm7150-tlmm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm SM7150 TLMM pin controller
maintainers:
- Bjorn Andersson <andersson@kernel.org>
- Danila Tikhonov <danila@jiaxyga.com>
description:
Top Level Mode Multiplexer pin controller in Qualcomm SM7150 SoC.
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
properties:
compatible:
const: qcom,sm7150-tlmm
reg:
maxItems: 3
reg-names:
items:
- const: west
- const: north
- const: south
interrupts:
maxItems: 1
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
"#gpio-cells": true
gpio-ranges: true
wakeup-parent: true
gpio-reserved-ranges:
minItems: 1
maxItems: 60
gpio-line-names:
maxItems: 119
patternProperties:
"-state$":
oneOf:
- $ref: "#/$defs/qcom-sm7150-tlmm-state"
- patternProperties:
"-pins$":
$ref: "#/$defs/qcom-sm7150-tlmm-state"
additionalProperties: false
$defs:
qcom-sm7150-tlmm-state:
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
properties:
pins:
description:
List of gpio pins affected by the properties specified in this
subnode.
items:
oneOf:
- pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-8])$"
- enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
sdc2_cmd, sdc2_data, ufs_reset ]
minItems: 1
maxItems: 36
function:
description:
Specify the alternative function to be configured for the specified
pins.
enum: [ gpio, adsp_ext, agera_pll, aoss_cti, atest_char, atest_tsens,
atest_tsens2, atest_usb1, atest_usb2, cam_mclk, cci_async,
cci_i2c, cci_timer0, cci_timer1, cci_timer2, cci_timer3,
cci_timer4, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1, ddr_pxi2,
ddr_pxi3, edp_hot, edp_lcd, gcc_gp1, gcc_gp2, gcc_gp3, gp_pdm0,
gp_pdm1, gp_pdm2, gps_tx, jitter_bist, ldo_en, ldo_update,
m_voc, mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2,
mdp_vsync3, mss_lte, nav_pps_in, nav_pps_out, pa_indicator,
pci_e, phase_flag, pll_bist, pll_bypassnl, pll_reset, pri_mi2s,
pri_mi2s_ws, prng_rosc, qdss, qdss_cti, qlink_enable,
qlink_request, qua_mi2s, qup00, qup01, qup02, qup03, qup04,
qup10, qup11, qup12, qup13, qup14, qup15, sd_write, sdc40,
sdc41, sdc42, sdc43, sdc4_clk, sdc4_cmd, sec_mi2s, ter_mi2s,
tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3, tsif1_clk, tsif1_data,
tsif1_en, tsif1_error, tsif1_sync, tsif2_clk, tsif2_data,
tsif2_en, tsif2_error, tsif2_sync, uim1_clk, uim1_data,
uim1_present, uim1_reset, uim2_clk, uim2_data, uim2_present,
uim2_reset, uim_batt, usb_phy, vfr_1, vsense_trigger,
wlan1_adc0, wlan1_adc1, wlan2_adc0, wlan2_adc1, wsa_clk,
wsa_data ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
required:
- compatible
- reg
- reg-names
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
tlmm: pinctrl@3500000 {
compatible = "qcom,sm7150-tlmm";
reg = <0x03500000 0x300000>,
<0x03900000 0x300000>,
<0x03d00000 0x300000>;
reg-names = "west", "north", "south";
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&tlmm 0 0 120>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
wakeup-parent = <&pdc>;
gpio-wo-state {
pins = "gpio1";
function = "gpio";
};
uart-w-state {
rx-pins {
pins = "gpio44";
function = "qup12";
bias-pull-up;
};
tx-pins {
pins = "gpio45";
function = "qup12";
bias-disable;
};
};
};
...
Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml
View file @ 348551dd
......@@ -60,6 +60,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -81,7 +82,7 @@ $defs:
enum: [ adsp_ext, agera_pll, aoss_cti, ddr_pxi2, atest_char,
atest_char0, atest_char1, atest_char2, atest_char3, audio_ref,
atest_usb1, atest_usb2, atest_usb10, atest_usb11, atest_usb12,
atest_usb13, atest_usb20, atest_usb21, atest_usb22, atest_usb2,
atest_usb13, atest_usb20, atest_usb21, atest_usb22,
atest_usb23, btfm_slimbus, cam_mclk, cci_async, cci_i2c,
cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4,
cri_trng, cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0,
......@@ -101,19 +102,9 @@ $defs:
usb_phy, vfr_1, vsense_trigger, wlan1_adc0, wlan1_adc1,
wlan2_adc0, wlan2_adc1, wmss_reset ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml
View file @ 348551dd
......@@ -55,7 +55,7 @@ $defs:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: "/schemas/pinctrl/pincfg-node.yaml"
$ref: /schemas/pinctrl/pincfg-node.yaml
properties:
pins:
......
Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
View file @ 348551dd
......@@ -58,6 +58,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -94,19 +95,9 @@ $defs:
tsif0_en, tsif0_error, tsif0_sync, tsif1_clk, tsif1_data, tsif1_en,
tsif1_error, tsif1_sync, usb2phy_ac, usb_phy, vsense_trigger ]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
......
Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml
View file @ 348551dd
......@@ -62,6 +62,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -104,21 +105,9 @@ $defs:
uim0_present, uim0_reset, uim1_clk, uim1_data, uim1_present,
uim1_reset, usb2phy_ac, usb_phy, vfr_0, vfr_1, vsense_trigger ]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-disable: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
......
Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
View file @ 348551dd
......@@ -20,7 +20,7 @@ properties:
reg:
items:
- description: LPASS LPI TLMM Control and Status registers
- description: LPASS LPI pins SLEW registers
- description: LPASS LPI MCC registers
clocks:
items:
......
Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml
View file @ 348551dd
......@@ -62,6 +62,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -103,19 +104,9 @@ $defs:
uim0_reset, uim1_clk, uim1_data, uim1_present, uim1_reset,
usb2phy_ac, usb_phy, vfr_0, vfr_1, vsense_trigger ]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
......
Documentation/devicetree/bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml
View file @ 348551dd
......@@ -21,7 +21,7 @@ properties:
reg:
items:
- description: LPASS LPI TLMM Control and Status registers
- description: LPASS LPI pins SLEW registers
- description: LPASS LPI MCC registers
clocks:
items:
......
Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml
View file @ 348551dd
......@@ -54,6 +54,7 @@ $defs:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
......@@ -109,19 +110,9 @@ $defs:
uim1_clk, uim1_data, uim1_present, uim1_reset,
usb1_hs, usb_phy, vfr_0, vfr_1, vsense_trigger_mirnat ]
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength: true
input-enable: true
output-high: true
output-low: true
required:
- pins
additionalProperties: false
required:
- compatible
- reg
......
Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml
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......@@ -52,7 +52,7 @@ properties:
information.
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- interrupts
......
Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml
View file @ 348551dd
......@@ -10,7 +10,7 @@ maintainers:
- Arınç ÜNAL <arinc.unal@arinc9.com>
- Sergio Paracuellos <sergio.paracuellos@gmail.com>
description:
description: |
Ralink RT2880 pin controller for RT2880 SoC.
The pin controller can only set the muxing of pin groups. Muxing individual
pins is not supported. There is no pinconf support.
......@@ -22,11 +22,14 @@ properties:
patternProperties:
'-pins$':
type: object
additionalProperties: false
patternProperties:
'^(.*-)?pinmux$':
type: object
description: node for pinctrl.
$ref: pinmux-node.yaml#
additionalProperties: false
properties:
function:
......@@ -116,12 +119,8 @@ patternProperties:
groups:
enum: [pci]
additionalProperties: false
additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
- $ref: pinctrl.yaml#
required:
- compatible
......
MAINTAINERS
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