Commit 35a8578e authored by Rob Herring's avatar Rob Herring Committed by Daniel Lezcano

dts: versatile: Add sysregs node

The Versatile boards have the same sysregs as other ARM Ltd boards. Add
the nodes in order to enable support for 24MHz counter as sched_clock.

This is a minimal node definition as the existing sub node definition
used on VExpress has some issues raised by Linus W.
Signed-off-by: default avatarRob Herring <robh@kernel.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
parent f2fa0299
......@@ -252,6 +252,11 @@ fpga {
#size-cells = <1>;
ranges = <0 0x10000000 0x10000>;
sysreg@0 {
compatible = "arm,versatile-sysreg", "syscon";
reg = <0x00000 0x1000>;
};
aaci@4000 {
compatible = "arm,primecell";
reg = <0x4000 0x1000>;
......
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