Commit 36f5f8a7 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher

drm/amd/powerplay: valid Vega10 DPMTABLE_OD_UPDATE_VDDC settings V2

With user specified voltage(DPMTABLE_OD_UPDATE_VDDC), the AVFS
will be disabled. However, the buggy code makes this actually not
working as expected.

- V2: clear all OD flags excpet DPMTABLE_OD_UPDATE_VDDC
Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7d59c41b
......@@ -2466,11 +2466,6 @@ static void vega10_check_dpm_table_updated(struct pp_hwmgr *hwmgr)
return;
}
}
if (data->need_update_dpm_table & DPMTABLE_OD_UPDATE_VDDC) {
data->need_update_dpm_table &= ~DPMTABLE_OD_UPDATE_VDDC;
data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_OD_UPDATE_MCLK;
}
}
/**
......@@ -3683,6 +3678,10 @@ static int vega10_set_power_state_tasks(struct pp_hwmgr *hwmgr,
vega10_update_avfs(hwmgr);
/*
* Clear all OD flags except DPMTABLE_OD_UPDATE_VDDC.
* That will help to keep AVFS disabled.
*/
data->need_update_dpm_table &= DPMTABLE_OD_UPDATE_VDDC;
return 0;
......
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