Commit 385e0eed authored by Tinghan Shen's avatar Tinghan Shen Committed by Matthias Brugger
parent 2b515194
......@@ -697,6 +697,21 @@ pwrap: pwrap@10024000 {
assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>;
};
spmi: spmi@10027000 {
compatible = "mediatek,mt8195-spmi";
reg = <0 0x10027000 0 0x000e00>,
<0 0x10029000 0 0x000100>;
reg-names = "pmif", "spmimst";
clocks = <&infracfg_ao CLK_INFRA_AO_PMIC_AP>,
<&infracfg_ao CLK_INFRA_AO_PMIC_TMR>,
<&topckgen CLK_TOP_SPMI_M_MST>;
clock-names = "pmif_sys_ck",
"pmif_tmr_ck",
"spmimst_clk_mux";
assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC>;
assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>;
};
scp_adsp: clock-controller@10720000 {
compatible = "mediatek,mt8195-scp_adsp";
reg = <0 0x10720000 0 0x1000>;
......
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