Commit 38f193df authored by Ajay Singh's avatar Ajay Singh Committed by Greg Kroah-Hartman

staging: wilc1000: make use of FIELD_GET/_PREP macro

Simplified the code by making use of FIELD_GET/_PREP bitfield macro.
Signed-off-by: default avatarAjay Singh <ajay.kathat@microchip.com>
Link: https://lore.kernel.org/r/20200214172250.13026-2-ajay.kathat@microchip.comSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent c77761d6
......@@ -988,7 +988,7 @@ void wilc_wfi_p2p_rx(struct wilc_vif *vif, u8 *buff, u32 size)
s32 freq;
header = get_unaligned_le32(buff - HOST_HDR_OFFSET);
pkt_offset = GET_PKT_OFFSET(header);
pkt_offset = FIELD_GET(WILC_PKT_HDR_OFFSET_FIELD, header);
if (pkt_offset & IS_MANAGMEMENT_CALLBACK) {
bool ack = false;
......
......@@ -40,7 +40,7 @@ void wilc_wfi_monitor_rx(struct net_device *mon_dev, u8 *buff, u32 size)
* The packet offset field contain info about what type of management
* the frame we are dealing with and ack status
*/
pkt_offset = GET_PKT_OFFSET(header);
pkt_offset = FIELD_GET(WILC_PKT_HDR_OFFSET_FIELD, header);
if (pkt_offset & IS_MANAGMEMENT_CALLBACK) {
/* hostapd callback mgmt frame */
......
......@@ -29,8 +29,6 @@
#define TCP_ACK_FILTER_LINK_SPEED_THRESH 54
#define DEFAULT_LINK_SPEED 72
#define GET_PKT_OFFSET(a) (((a) >> 22) & 0x1ff)
struct wilc_wfi_stats {
unsigned long rx_packets;
unsigned long tx_packets;
......
......@@ -898,7 +898,7 @@ static int wilc_spi_read_size(struct wilc *wilc, u32 *size)
int ret;
ret = spi_internal_read(wilc, 0xe840 - WILC_SPI_REG_BASE, size);
*size = *size & IRQ_DMA_WD_CNT_MASK;
*size = FIELD_GET(IRQ_DMA_WD_CNT_MASK, *size);
return ret;
}
......
......@@ -568,8 +568,8 @@ int wilc_wlan_handle_txq(struct wilc *wilc, u32 *txq_count)
ret = func->hif_read_reg(wilc, WILC_HOST_VMM_CTL, &reg);
if (ret)
break;
if ((reg >> 2) & 0x1) {
entries = ((reg >> 3) & 0x3f);
if (FIELD_GET(WILC_VMM_ENTRY_AVAILABLE, reg)) {
entries = FIELD_GET(WILC_VMM_ENTRY_COUNT, reg);
break;
}
release_bus(wilc, WILC_BUS_RELEASE_ALLOW_SLEEP);
......@@ -610,6 +610,7 @@ int wilc_wlan_handle_txq(struct wilc *wilc, u32 *txq_count)
do {
u32 header, buffer_offset;
char *bssid;
u8 mgmt_ptk = 0;
tqe = wilc_wlan_txq_remove_from_head(dev);
if (!tqe)
......@@ -620,15 +621,16 @@ int wilc_wlan_handle_txq(struct wilc *wilc, u32 *txq_count)
break;
le32_to_cpus(&vmm_table[i]);
vmm_sz = (vmm_table[i] & 0x3ff);
vmm_sz = FIELD_GET(WILC_VMM_BUFFER_SIZE, vmm_table[i]);
vmm_sz *= 4;
header = (tqe->type << 31) |
(tqe->buffer_size << 15) |
vmm_sz;
if (tqe->type == WILC_MGMT_PKT)
header |= BIT(30);
else
header &= ~BIT(30);
mgmt_ptk = 1;
header = (FIELD_PREP(WILC_VMM_HDR_TYPE, tqe->type) |
FIELD_PREP(WILC_VMM_HDR_MGMT_FIELD, mgmt_ptk) |
FIELD_PREP(WILC_VMM_HDR_PKT_SIZE, tqe->buffer_size) |
FIELD_PREP(WILC_VMM_HDR_BUFF_SIZE, vmm_sz));
cpu_to_le32s(&header);
memcpy(&txb[offset], &header, 4);
......@@ -686,10 +688,10 @@ static void wilc_wlan_handle_rx_buff(struct wilc *wilc, u8 *buffer, int size)
buff_ptr = buffer + offset;
header = get_unaligned_le32(buff_ptr);
is_cfg_packet = (header >> 31) & 0x1;
pkt_offset = (header >> 22) & 0x1ff;
tp_len = (header >> 11) & 0x7ff;
pkt_len = header & 0x7ff;
is_cfg_packet = FIELD_GET(WILC_PKT_HDR_CONFIG_FIELD, header);
pkt_offset = FIELD_GET(WILC_PKT_HDR_OFFSET_FIELD, header);
tp_len = FIELD_GET(WILC_PKT_HDR_TOTAL_LEN_FIELD, header);
pkt_len = FIELD_GET(WILC_PKT_HDR_LEN_FIELD, header);
if (pkt_len == 0 || tp_len == 0)
break;
......@@ -758,11 +760,11 @@ static void wilc_wlan_handle_isr_ext(struct wilc *wilc, u32 int_status)
int ret = 0;
struct rxq_entry_t *rqe;
size = (int_status & 0x7fff) << 2;
size = FIELD_GET(WILC_INTERRUPT_DATA_SIZE, int_status) << 2;
while (!size && retries < 10) {
wilc->hif_func->hif_read_size(wilc, &size);
size = (size & 0x7fff) << 2;
size = FIELD_GET(WILC_INTERRUPT_DATA_SIZE, size) << 2;
retries++;
}
......
......@@ -8,6 +8,7 @@
#define WILC_WLAN_H
#include <linux/types.h>
#include <linux/bitfield.h>
/********************************************
*
......@@ -135,6 +136,23 @@
#define MODALIAS "WILC_SPI"
#define GPIO_NUM 0x44
#define WILC_PKT_HDR_CONFIG_FIELD BIT(31)
#define WILC_PKT_HDR_OFFSET_FIELD GENMASK(30, 22)
#define WILC_PKT_HDR_TOTAL_LEN_FIELD GENMASK(21, 11)
#define WILC_PKT_HDR_LEN_FIELD GENMASK(10, 0)
#define WILC_INTERRUPT_DATA_SIZE GENMASK(14, 0)
#define WILC_VMM_BUFFER_SIZE GENMASK(9, 0)
#define WILC_VMM_HDR_TYPE BIT(31)
#define WILC_VMM_HDR_MGMT_FIELD BIT(30)
#define WILC_VMM_HDR_PKT_SIZE GENMASK(29, 15)
#define WILC_VMM_HDR_BUFF_SIZE GENMASK(14, 0)
#define WILC_VMM_ENTRY_COUNT GENMASK(8, 3)
#define WILC_VMM_ENTRY_AVAILABLE BIT(2)
/*******************************************/
/* E0 and later Interrupt flags. */
/*******************************************/
......@@ -150,7 +168,7 @@
/* 21: INT5 flag */
/*******************************************/
#define IRG_FLAGS_OFFSET 16
#define IRQ_DMA_WD_CNT_MASK ((1ul << IRG_FLAGS_OFFSET) - 1)
#define IRQ_DMA_WD_CNT_MASK GENMASK(IRG_FLAGS_OFFSET - 1, 0)
#define INT_0 BIT(IRG_FLAGS_OFFSET)
#define INT_1 BIT(IRG_FLAGS_OFFSET + 1)
#define INT_2 BIT(IRG_FLAGS_OFFSET + 2)
......
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