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Commit 3aa139aa authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'media/v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media 

Pull media updates from Mauro Carvalho Chehab:

 - addition of a maintainer's profile for the media subsystem

 - addition of i.MX8 IP support

 - qcom/camss gained support for hardware version Titan 170

 - new RC keymaps

 - Lots of other improvements, cleanups and bug fixes

* tag 'media/v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (488 commits)
  media: coda: fix macroblocks count control usage
  media: rkisp1: params: fix wrong bits settings
  media: cedrus: Fix H265 status definitions
  media: meson-ge2d: fix rotation parameters
  media: v4l2-ctrls: fix reference to freed memory
  media: venus : hfi: add venus image info into smem
  media: venus: Fix internal buffer size calculations for v6.
  media: venus: helpers: keep max bandwidth when mbps exceeds the supported range
  media: venus: fix hw overload error log condition
  media: venus: core: correct firmware name for sm8250
  media: venus: core,pm: fix potential infinite loop
  media: venus: core: Fix kerneldoc warnings
  media: gscpa/stv06xx: fix memory leak
  media: cx25821: remove unused including <linux/version.h>
  media: staging: media/meson: remove redundant dev_err call
  media: adv7842: support 1 block EDIDs, fix clearing EDID
  media: adv7842: configure all pads
  media: allegro: change kernel-doc comment blocks to normal comments
  media: camss: ispif: Remove redundant dev_err call in msm_ispif_subdev_init()
  media: i2c: rdamc21: Fix warning on u8 cast
  ...
parents acd3d285 0b276e47
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Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
View file @ 3aa139aa
......@@ -64,7 +64,7 @@ Required properties (DMA function blocks):
- larb: Should contain a phandle pointing to the local arbiter device as defined
in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
- iommus: Should point to the respective IOMMU block with master port as
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
for details.
Optional properties (RDMA function blocks):
......
Documentation/devicetree/bindings/i3c/cdns,i3c-master.txt
View file @ 3aa139aa
......@@ -10,19 +10,19 @@ Required properties:
- reg: I3C master registers
Mandatory properties defined by the generic binding (see
Documentation/devicetree/bindings/i3c/i3c.txt for more details):
Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
- #address-cells: shall be set to 1
- #size-cells: shall be set to 0
Optional properties defined by the generic binding (see
Documentation/devicetree/bindings/i3c/i3c.txt for more details):
Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
- i2c-scl-hz
- i3c-scl-hz
I3C device connected on the bus follow the generic description (see
Documentation/devicetree/bindings/i3c/i3c.txt for more details).
Documentation/devicetree/bindings/i3c/i3c.yaml for more details).
Example:
......
Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.txt
View file @ 3aa139aa
......@@ -9,19 +9,19 @@ Required properties:
- reg: Offset and length of I3C master registers
Mandatory properties defined by the generic binding (see
Documentation/devicetree/bindings/i3c/i3c.txt for more details):
Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
- #address-cells: shall be set to 3
- #size-cells: shall be set to 0
Optional properties defined by the generic binding (see
Documentation/devicetree/bindings/i3c/i3c.txt for more details):
Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
- i2c-scl-hz
- i3c-scl-hz
I3C device connected on the bus follow the generic description (see
Documentation/devicetree/bindings/i3c/i3c.txt for more details).
Documentation/devicetree/bindings/i3c/i3c.yaml for more details).
Example:
......
Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
View file @ 3aa139aa
......@@ -20,16 +20,12 @@ properties:
- const: allwinner,sun5i-a13-ir
- const: allwinner,sun6i-a31-ir
- items:
- const: allwinner,sun8i-a83t-ir
- const: allwinner,sun6i-a31-ir
- items:
- const: allwinner,sun8i-r40-ir
- const: allwinner,sun6i-a31-ir
- items:
- const: allwinner,sun50i-a64-ir
- const: allwinner,sun6i-a31-ir
- items:
- const: allwinner,sun50i-h6-ir
- enum:
- allwinner,sun8i-a83t-ir
- allwinner,sun8i-r40-ir
- allwinner,sun50i-a64-ir
- allwinner,sun50i-h6-ir
- allwinner,sun50i-h616-ir
- const: allwinner,sun6i-a31-ir
reg:
......
Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
View file @ 3aa139aa
......@@ -19,7 +19,7 @@ Required properties:
Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
for details.
- iommus: should point to the respective IOMMU block with master port as
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
for details.
Example:
......
Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
View file @ 3aa139aa
......@@ -17,7 +17,7 @@ Required properties:
Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
for details.
- iommus: should point to the respective IOMMU block with master port as
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
for details.
Example:
......
Documentation/devicetree/bindings/media/mediatek-mdp.txt
View file @ 3aa139aa
......@@ -25,7 +25,7 @@ Required properties (DMA function blocks, child node):
"mediatek,mt8173-mdp-wdma"
"mediatek,mt8173-mdp-wrot"
- iommus: should point to the respective IOMMU block with master port as
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
for details.
- mediatek,larb: must contain the local arbiters in the current Socs, see
Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
......
Documentation/devicetree/bindings/media/mediatek-vcodec.txt
View file @ 3aa139aa
......@@ -4,7 +4,9 @@ Mediatek Video Codec is the video codec hw present in Mediatek SoCs which
supports high resolution encoding and decoding functionalities.
Required properties:
- compatible : "mediatek,mt8173-vcodec-enc" for MT8173 encoder
- compatible : must be one of the following string:
"mediatek,mt8173-vcodec-enc-vp8" for mt8173 vp8 encoder.
"mediatek,mt8173-vcodec-enc" for mt8173 avc encoder.
"mediatek,mt8183-vcodec-enc" for MT8183 encoder.
"mediatek,mt8173-vcodec-dec" for MT8173 decoder.
- reg : Physical base address of the video codec registers and length of
......@@ -13,12 +15,12 @@ Required properties:
- mediatek,larb : must contain the local arbiters in the current Socs.
- clocks : list of clock specifiers, corresponding to entries in
the clock-names property.
- clock-names: encoder must contain "venc_sel_src", "venc_sel",,
"venc_lt_sel_src", "venc_lt_sel", decoder must contain "vcodecpll",
"univpll_d2", "clk_cci400_sel", "vdec_sel", "vdecpll", "vencpll",
"venc_lt_sel", "vdec_bus_clk_src".
- clock-names: avc encoder must contain "venc_sel", vp8 encoder must
contain "venc_lt_sel", decoder must contain "vcodecpll", "univpll_d2",
"clk_cci400_sel", "vdec_sel", "vdecpll", "vencpll", "venc_lt_sel",
"vdec_bus_clk_src".
- iommus : should point to the respective IOMMU block with master port as
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
for details.
One of the two following nodes:
- mediatek,vpu : the node of the video processor unit, if using VPU.
......@@ -80,14 +82,10 @@ vcodec_dec: vcodec@16000000 {
assigned-clock-rates = <0>, <0>, <0>, <1482000000>, <800000000>;
};
vcodec_enc: vcodec@18002000 {
vcodec_enc_avc: vcodec@18002000 {
compatible = "mediatek,mt8173-vcodec-enc";
reg = <0 0x18002000 0 0x1000>, /*VENC_SYS*/
<0 0x19002000 0 0x1000>; /*VENC_LT_SYS*/
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>;
mediatek,larb = <&larb3>,
<&larb5>;
reg = <0 0x18002000 0 0x1000>;
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
iommus = <&iommu M4U_PORT_VENC_RCPU>,
<&iommu M4U_PORT_VENC_REC>,
<&iommu M4U_PORT_VENC_BSDMA>,
......@@ -98,8 +96,20 @@ vcodec_dec: vcodec@16000000 {
<&iommu M4U_PORT_VENC_REF_LUMA>,
<&iommu M4U_PORT_VENC_REF_CHROMA>,
<&iommu M4U_PORT_VENC_NBM_RDMA>,
<&iommu M4U_PORT_VENC_NBM_WDMA>,
<&iommu M4U_PORT_VENC_RCPU_SET2>,
<&iommu M4U_PORT_VENC_NBM_WDMA>;
mediatek,larb = <&larb3>;
mediatek,vpu = <&vpu>;
clocks = <&topckgen CLK_TOP_VENC_SEL>;
clock-names = "venc_sel";
assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>;
};
vcodec_enc_vp8: vcodec@19002000 {
compatible = "mediatek,mt8173-vcodec-enc-vp8";
reg = <0 0x19002000 0 0x1000>; /* VENC_LT_SYS */
interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>;
iommus = <&iommu M4U_PORT_VENC_RCPU_SET2>,
<&iommu M4U_PORT_VENC_REC_FRM_SET2>,
<&iommu M4U_PORT_VENC_BSDMA_SET2>,
<&iommu M4U_PORT_VENC_SV_COMA_SET2>,
......@@ -108,17 +118,10 @@ vcodec_dec: vcodec@16000000 {
<&iommu M4U_PORT_VENC_CUR_CHROMA_SET2>,
<&iommu M4U_PORT_VENC_REF_LUMA_SET2>,
<&iommu M4U_PORT_VENC_REC_CHROMA_SET2>;
mediatek,larb = <&larb5>;
mediatek,vpu = <&vpu>;
clocks = <&topckgen CLK_TOP_VENCPLL_D2>,
<&topckgen CLK_TOP_VENC_SEL>,
<&topckgen CLK_TOP_UNIVPLL1_D2>,
<&topckgen CLK_TOP_VENC_LT_SEL>;
clock-names = "venc_sel_src",
"venc_sel",
"venc_lt_sel_src",
"venc_lt_sel";
assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>,
<&topckgen CLK_TOP_VENC_LT_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_VENCPLL_D2>,
<&topckgen CLK_TOP_UNIVPLL1_D2>;
clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
clock-names = "venc_lt_sel";
assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>;
};
Documentation/devicetree/bindings/media/nxp,imx7-mipi-csi2.yaml
View file @ 3aa139aa
......@@ -4,14 +4,19 @@
$id: http://devicetree.org/schemas/media/nxp,imx7-mipi-csi2.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP i.MX7 Mipi CSI2
title: NXP i.MX7 MIPI CSI-2 receiver
maintainers:
- Rui Miguel Silva <rmfrfs@gmail.com>
description: |
This is the device node for the MIPI CSI-2 receiver core in i.MX7 soc. It is
compatible with previous version of samsung d-phy.
description: |-
The NXP i.MX7 SoC family includes a MIPI CSI-2 receiver IP core, documented
as "CSIS V3.3". The IP core seems to originate from Samsung, and may be
compatible with some of the Exynos4 ad S5P SoCs.
While the CSI-2 receiver is separate from the MIPI D-PHY IP core, the PHY is
completely wrapped by the CSIS and doesn't expose a control interface of its
own. This binding thus covers both IP cores.
properties:
compatible:
......@@ -24,8 +29,10 @@ properties:
maxItems: 1
clocks:
minItems: 3
maxItems: 3
items:
- description: The peripheral clock (a.k.a. APB clock)
- description: The external clock (optionally used as the pixel clock)
- description: The MIPI D-PHY clock
clock-names:
items:
......@@ -37,26 +44,16 @@ properties:
maxItems: 1
phy-supply:
description:
Phandle to a regulator that provides power to the PHY. This
regulator will be managed during the PHY power on/off sequence.
description: The MIPI D-PHY digital power supply
resets:
maxItems: 1
reset-names:
const: mrst
items:
- description: MIPI D-PHY slave reset
clock-frequency:
description:
The IP main (system bus) clock frequency in Hertz
description: The desired external clock ("wrap") frequency, in Hz
default: 166000000
fsl,csis-hs-settle:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Differential receiver (HS-RX) settle time
ports:
$ref: /schemas/graph.yaml#/properties/ports
......@@ -98,7 +95,6 @@ required:
- power-domains
- phy-supply
- resets
- reset-names
- ports
additionalProperties: false
......@@ -111,43 +107,41 @@ examples:
#include <dt-bindings/reset/imx7-reset.h>
mipi_csi: mipi-csi@30750000 {
compatible = "fsl,imx7-mipi-csi2";
reg = <0x30750000 0x10000>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_IPG_ROOT_CLK>,
<&clks IMX7D_MIPI_CSI_ROOT_CLK>,
<&clks IMX7D_MIPI_DPHY_ROOT_CLK>;
clock-names = "pclk", "wrap", "phy";
clock-frequency = <166000000>;
power-domains = <&pgc_mipi_phy>;
phy-supply = <&reg_1p0d>;
resets = <&src IMX7_RESET_MIPI_PHY_MRST>;
reset-names = "mrst";
fsl,csis-hs-settle = <3>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mipi_from_sensor: endpoint {
remote-endpoint = <&ov2680_to_mipi>;
data-lanes = <1>;
};
};
port@1 {
reg = <1>;
mipi_vc0_to_csi_mux: endpoint {
remote-endpoint = <&csi_mux_from_mipi_vc0>;
};
};
compatible = "fsl,imx7-mipi-csi2";
reg = <0x30750000 0x10000>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_IPG_ROOT_CLK>,
<&clks IMX7D_MIPI_CSI_ROOT_CLK>,
<&clks IMX7D_MIPI_DPHY_ROOT_CLK>;
clock-names = "pclk", "wrap", "phy";
clock-frequency = <166000000>;
power-domains = <&pgc_mipi_phy>;
phy-supply = <&reg_1p0d>;
resets = <&src IMX7_RESET_MIPI_PHY_MRST>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mipi_from_sensor: endpoint {
remote-endpoint = <&ov2680_to_mipi>;
data-lanes = <1>;
};
};
port@1 {
reg = <1>;
mipi_vc0_to_csi_mux: endpoint {
remote-endpoint = <&csi_mux_from_mipi_vc0>;
};
};
};
};
...
Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml 0 → 100644
View file @ 3aa139aa
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/nxp,imx8-jpeg.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: i.MX8QXP/QM JPEG decoder/encoder Device Tree Bindings
maintainers:
- Mirela Rabulea <mirela.rabulea@nxp.com>
description: |-
The JPEG decoder/encoder present in iMX8QXP and iMX8QM SoCs is an
ISO/IEC 10918-1 JPEG standard compliant decoder/encoder, for Baseline
and Extended Sequential DCT modes.
properties:
compatible:
items:
- enum:
# JPEG decoder
- nxp,imx8qxp-jpgdec
# JPEG encoder
- nxp,imx8qxp-jpgenc
reg:
maxItems: 1
interrupts:
description: |
There are 4 slots available in the IP, which the driver may use
If a certain slot is used, it should have an associated interrupt
The interrupt with index i is assumed to be for slot i
minItems: 1 # At least one slot is needed by the driver
maxItems: 4 # The IP has 4 slots available for use
power-domains:
description:
List of phandle and PM domain specifier as documented in
Documentation/devicetree/bindings/power/power_domain.txt
minItems: 2 # Wrapper and 1 slot
maxItems: 5 # Wrapper and 4 slots
required:
- compatible
- reg
- interrupts
- power-domains
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/firmware/imx/rsrc.h>
jpegdec: jpegdec@58400000 {
compatible = "nxp,imx8qxp-jpgdec";
reg = <0x58400000 0x00050000 >;
interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
<&pd IMX_SC_R_MJPEG_DEC_S0>,
<&pd IMX_SC_R_MJPEG_DEC_S1>,
<&pd IMX_SC_R_MJPEG_DEC_S2>,
<&pd IMX_SC_R_MJPEG_DEC_S3>;
};
jpegenc: jpegenc@58450000 {
compatible = "nxp,imx8qxp-jpgenc";
reg = <0x58450000 0x00050000 >;
interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
<&pd IMX_SC_R_MJPEG_ENC_S0>,
<&pd IMX_SC_R_MJPEG_ENC_S1>,
<&pd IMX_SC_R_MJPEG_ENC_S2>,
<&pd IMX_SC_R_MJPEG_ENC_S3>;
};
...
Documentation/devicetree/bindings/media/qcom,camss.txt deleted 100644 → 0
View file @ acd3d285
Qualcomm Camera Subsystem
* Properties
- compatible:
Usage: required
Value type: <stringlist>
Definition: Should contain one of:
- "qcom,msm8916-camss"
- "qcom,msm8996-camss"
- "qcom,sdm660-camss"
- reg:
Usage: required
Value type: <prop-encoded-array>
Definition: Register ranges as listed in the reg-names property.
- reg-names:
Usage: required
Value type: <stringlist>
Definition: Should contain the following entries:
- "csiphy0"
- "csiphy0_clk_mux"
- "csiphy1"
- "csiphy1_clk_mux"
- "csiphy2" (8996 only)
- "csiphy2_clk_mux" (8996 only)
- "csid0"
- "csid1"
- "csid2" (8996 only)
- "csid3" (8996 only)
- "ispif"
- "csi_clk_mux"
- "vfe0"
- "vfe1" (8996 only)
- interrupts:
Usage: required
Value type: <prop-encoded-array>
Definition: Interrupts as listed in the interrupt-names property.
- interrupt-names:
Usage: required
Value type: <stringlist>
Definition: Should contain the following entries:
- "csiphy0"
- "csiphy1"
- "csiphy2" (8996 only)
- "csid0"
- "csid1"
- "csid2" (8996 only)
- "csid3" (8996 only)
- "ispif"
- "vfe0"
- "vfe1" (8996 only)
- power-domains:
Usage: required
Value type: <prop-encoded-array>
Definition: A phandle and power domain specifier pairs to the
power domain which is responsible for collapsing
and restoring power to the peripheral.
- clocks:
Usage: required
Value type: <prop-encoded-array>
Definition: A list of phandle and clock specifier pairs as listed
in clock-names property.
- clock-names:
Usage: required
Value type: <stringlist>
Definition: Should contain the following entries:
- "top_ahb"
- "throttle_axi" (660 only)
- "ispif_ahb"
- "csiphy0_timer"
- "csiphy1_timer"
- "csiphy2_timer" (8996 only)
- "csiphy_ahb2crif" (660 only)
- "csi0_ahb"
- "csi0"
- "csi0_phy"
- "csi0_pix"
- "csi0_rdi"
- "cphy_csid0" (660 only)
- "csi1_ahb"
- "csi1"
- "csi1_phy"
- "csi1_pix"
- "csi1_rdi"
- "cphy_csid1" (660 only)
- "csi2_ahb" (8996 only)
- "csi2" (8996 only)
- "csi2_phy" (8996 only)
- "csi2_pix" (8996 only)
- "csi2_rdi" (8996 only)
- "cphy_csid2" (660 only)
- "csi3_ahb" (8996 only)
- "csi3" (8996 only)
- "csi3_phy" (8996 only)
- "csi3_pix" (8996 only)
- "csi3_rdi" (8996 only)
- "cphy_csid3" (660 only)
- "ahb"
- "vfe0"
- "csi_vfe0"
- "vfe0_ahb", (8996 only)
- "vfe0_stream", (8996 only)
- "vfe1", (8996 only)
- "csi_vfe1", (8996 only)
- "vfe1_ahb", (8996 only)
- "vfe1_stream", (8996 only)
- "vfe_ahb"
- "vfe_axi"
- vdda-supply:
Usage: required
Value type: <phandle>
Definition: A phandle to voltage supply for CSI2.
- iommus:
Usage: required
Value type: <prop-encoded-array>
Definition: A list of phandle and IOMMU specifier pairs.
* Nodes
- ports:
Usage: required
Definition: As described in video-interfaces.txt in same directory.
Properties:
- reg:
Usage: required
Value type: <u32>
Definition: Selects CSI2 PHY interface - PHY0, PHY1
or PHY2 (8996 only)
Endpoint node properties:
- clock-lanes:
Usage: required
Value type: <u32>
Definition: The physical clock lane index. On 8916
the value must always be <1> as the physical
clock lane is lane 1. On 8996 the value must
always be <7> as the hardware supports D-PHY
and C-PHY, indexes are in a common set and
D-PHY physical clock lane is labeled as 7.
- data-lanes:
Usage: required
Value type: <prop-encoded-array>
Definition: An array of physical data lanes indexes.
Position of an entry determines the logical
lane number, while the value of an entry
indicates physical lane index. Lane swapping
is supported. Physical lane indexes for
8916: 0, 2, 3, 4; for 8996: 0, 1, 2, 3.
* An Example
camss: camss@1b00000 {
compatible = "qcom,msm8916-camss";
reg = <0x1b0ac00 0x200>,
<0x1b00030 0x4>,
<0x1b0b000 0x200>,
<0x1b00038 0x4>,
<0x1b08000 0x100>,
<0x1b08400 0x100>,
<0x1b0a000 0x500>,
<0x1b00020 0x10>,
<0x1b10000 0x1000>;
reg-names = "csiphy0",
"csiphy0_clk_mux",
"csiphy1",
"csiphy1_clk_mux",
"csid0",
"csid1",
"ispif",
"csi_clk_mux",
"vfe0";
interrupts = <GIC_SPI 78 0>,
<GIC_SPI 79 0>,
<GIC_SPI 51 0>,
<GIC_SPI 52 0>,
<GIC_SPI 55 0>,
<GIC_SPI 57 0>;
interrupt-names = "csiphy0",
"csiphy1",
"csid0",
"csid1",
"ispif",
"vfe0";
power-domains = <&gcc VFE_GDSC>;
clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
<&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
<&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
<&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
<&gcc GCC_CAMSS_CSI0_AHB_CLK>,
<&gcc GCC_CAMSS_CSI0_CLK>,
<&gcc GCC_CAMSS_CSI0PHY_CLK>,
<&gcc GCC_CAMSS_CSI0PIX_CLK>,
<&gcc GCC_CAMSS_CSI0RDI_CLK>,
<&gcc GCC_CAMSS_CSI1_AHB_CLK>,
<&gcc GCC_CAMSS_CSI1_CLK>,
<&gcc GCC_CAMSS_CSI1PHY_CLK>,
<&gcc GCC_CAMSS_CSI1PIX_CLK>,
<&gcc GCC_CAMSS_CSI1RDI_CLK>,
<&gcc GCC_CAMSS_AHB_CLK>,
<&gcc GCC_CAMSS_VFE0_CLK>,
<&gcc GCC_CAMSS_CSI_VFE0_CLK>,
<&gcc GCC_CAMSS_VFE_AHB_CLK>,
<&gcc GCC_CAMSS_VFE_AXI_CLK>;
clock-names = "top_ahb",
"ispif_ahb",
"csiphy0_timer",
"csiphy1_timer",
"csi0_ahb",
"csi0",
"csi0_phy",
"csi0_pix",
"csi0_rdi",
"csi1_ahb",
"csi1",
"csi1_phy",
"csi1_pix",
"csi1_rdi",
"ahb",
"vfe0",
"csi_vfe0",
"vfe_ahb",
"vfe_axi";
vdda-supply = <&pm8916_l2>;
iommus = <&apps_iommu 3>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
csiphy0_ep: endpoint {
clock-lanes = <1>;
data-lanes = <0 2>;
remote-endpoint = <&ov5645_ep>;
};
};
};
};
Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml 0 → 100644
View file @ 3aa139aa
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/media/qcom,msm8916-camss.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Qualcomm CAMSS ISP
maintainers:
- Robert Foss <robert.foss@linaro.org>
- Todor Tomov <todor.too@gmail.com>
description: |
The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
properties:
compatible:
const: qcom,msm8916-camss
clocks:
minItems: 19
maxItems: 19
clock-names:
items:
- const: top_ahb
- const: ispif_ahb
- const: csiphy0_timer
- const: csiphy1_timer
- const: csi0_ahb
- const: csi0
- const: csi0_phy
- const: csi0_pix
- const: csi0_rdi
- const: csi1_ahb
- const: csi1
- const: csi1_phy
- const: csi1_pix
- const: csi1_rdi
- const: ahb
- const: vfe0
- const: csi_vfe0
- const: vfe_ahb
- const: vfe_axi
interrupts:
minItems: 6
maxItems: 6
interrupt-names:
items:
- const: csiphy0
- const: csiphy1
- const: csid0
- const: csid1
- const: ispif
- const: vfe0
iommus:
maxItems: 1
power-domains:
items:
- description: VFE GDSC - Video Front End, Global Distributed Switch Controller.
ports:
$ref: /schemas/graph.yaml#/properties/ports
description:
CSI input ports.
properties:
port@0:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description:
Input port for receiving CSI data.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
properties:
clock-lanes:
items:
- const: 1
data-lanes:
description:
An array of physical data lanes indexes.
Position of an entry determines the logical
lane number, while the value of an entry
indicates physical lane index. Lane swapping
is supported. Physical lane indexes;
0, 2, 3, 4.
minItems: 1
maxItems: 4
required:
- clock-lanes
- data-lanes
port@1:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description:
Input port for receiving CSI data.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
properties:
clock-lanes:
items:
- const: 1
data-lanes:
minItems: 1
maxItems: 4
required:
- clock-lanes
- data-lanes
reg:
minItems: 9
maxItems: 9
reg-names:
items:
- const: csiphy0
- const: csiphy0_clk_mux
- const: csiphy1
- const: csiphy1_clk_mux
- const: csid0
- const: csid1
- const: ispif
- const: csi_clk_mux
- const: vfe0
vdda-supply:
description:
Definition of the regulator used as analog power supply.
required:
- clock-names
- clocks
- compatible
- interrupt-names
- interrupts
- iommus
- power-domains
- reg
- reg-names
- vdda-supply
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8916.h>
camss: camss@1b00000 {
compatible = "qcom,msm8916-camss";
clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
<&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
<&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
<&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
<&gcc GCC_CAMSS_CSI0_AHB_CLK>,
<&gcc GCC_CAMSS_CSI0_CLK>,
<&gcc GCC_CAMSS_CSI0PHY_CLK>,
<&gcc GCC_CAMSS_CSI0PIX_CLK>,
<&gcc GCC_CAMSS_CSI0RDI_CLK>,
<&gcc GCC_CAMSS_CSI1_AHB_CLK>,
<&gcc GCC_CAMSS_CSI1_CLK>,
<&gcc GCC_CAMSS_CSI1PHY_CLK>,
<&gcc GCC_CAMSS_CSI1PIX_CLK>,
<&gcc GCC_CAMSS_CSI1RDI_CLK>,
<&gcc GCC_CAMSS_AHB_CLK>,
<&gcc GCC_CAMSS_VFE0_CLK>,
<&gcc GCC_CAMSS_CSI_VFE0_CLK>,
<&gcc GCC_CAMSS_VFE_AHB_CLK>,
<&gcc GCC_CAMSS_VFE_AXI_CLK>;
clock-names = "top_ahb",
"ispif_ahb",
"csiphy0_timer",
"csiphy1_timer",
"csi0_ahb",
"csi0",
"csi0_phy",
"csi0_pix",
"csi0_rdi",
"csi1_ahb",
"csi1",
"csi1_phy",
"csi1_pix",
"csi1_rdi",
"ahb",
"vfe0",
"csi_vfe0",
"vfe_ahb",
"vfe_axi";
interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 51 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 52 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 55 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "csiphy0",
"csiphy1",
"csid0",
"csid1",
"ispif",
"vfe0";
iommus = <&apps_iommu 3>;
power-domains = <&gcc VFE_GDSC>;
reg = <0x01b0ac00 0x200>,
<0x01b00030 0x4>,
<0x01b0b000 0x200>,
<0x01b00038 0x4>,
<0x01b08000 0x100>,
<0x01b08400 0x100>,
<0x01b0a000 0x500>,
<0x01b00020 0x10>,
<0x01b10000 0x1000>;
reg-names = "csiphy0",
"csiphy0_clk_mux",
"csiphy1",
"csiphy1_clk_mux",
"csid0",
"csid1",
"ispif",
"csi_clk_mux",
"vfe0";
vdda-supply = <&reg_2v8>;
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};
Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml 0 → 100644
View file @ 3aa139aa
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/media/qcom,msm8996-camss.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Qualcomm CAMSS ISP
maintainers:
- Robert Foss <robert.foss@linaro.org>
- Todor Tomov <todor.too@gmail.com>
description: |
The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
properties:
compatible:
const: qcom,msm8996-camss
clocks:
minItems: 36
maxItems: 36
clock-names:
items:
- const: top_ahb
- const: ispif_ahb
- const: csiphy0_timer
- const: csiphy1_timer
- const: csiphy2_timer
- const: csi0_ahb
- const: csi0
- const: csi0_phy
- const: csi0_pix
- const: csi0_rdi
- const: csi1_ahb
- const: csi1
- const: csi1_phy
- const: csi1_pix
- const: csi1_rdi
- const: csi2_ahb
- const: csi2
- const: csi2_phy
- const: csi2_pix
- const: csi2_rdi
- const: csi3_ahb
- const: csi3
- const: csi3_phy
- const: csi3_pix
- const: csi3_rdi
- const: ahb
- const: vfe0
- const: csi_vfe0
- const: vfe0_ahb
- const: vfe0_stream
- const: vfe1
- const: csi_vfe1
- const: vfe1_ahb
- const: vfe1_stream
- const: vfe_ahb
- const: vfe_axi
interrupts:
minItems: 10
maxItems: 10
interrupt-names:
items:
- const: csiphy0
- const: csiphy1
- const: csiphy2
- const: csid0
- const: csid1
- const: csid2
- const: csid3
- const: ispif
- const: vfe0
- const: vfe1
iommus:
maxItems: 4
power-domains:
items:
- description: VFE0 GDSC - Video Front End, Global Distributed Switch Controller.
- description: VFE1 GDSC - Video Front End, Global Distributed Switch Controller.
ports:
$ref: /schemas/graph.yaml#/properties/ports
description:
CSI input ports.
properties:
port@0:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description:
Input port for receiving CSI data.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
properties:
clock-lanes:
items:
- const: 7
data-lanes:
description:
An array of physical data lanes indexes.
Position of an entry determines the logical
lane number, while the value of an entry
indicates physical lane index. Lane swapping
is supported. Physical lane indexes are;
0, 1, 2, 3
minItems: 1
maxItems: 4
required:
- clock-lanes
- data-lanes
port@1:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description:
Input port for receiving CSI data.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
properties:
clock-lanes:
items:
- const: 7
data-lanes:
minItems: 1
maxItems: 4
required:
- clock-lanes
- data-lanes
port@2:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description:
Input port for receiving CSI data.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
properties:
clock-lanes:
items:
- const: 7
data-lanes:
minItems: 1
maxItems: 4
required:
- clock-lanes
- data-lanes
port@3:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description:
Input port for receiving CSI data.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
properties:
clock-lanes:
items:
- const: 7
data-lanes:
minItems: 1
maxItems: 4
required:
- clock-lanes
- data-lanes
reg:
minItems: 14
maxItems: 14
reg-names:
items:
- const: csiphy0
- const: csiphy0_clk_mux
- const: csiphy1
- const: csiphy1_clk_mux
- const: csiphy2
- const: csiphy2_clk_mux
- const: csid0
- const: csid1
- const: csid2
- const: csid3
- const: ispif
- const: csi_clk_mux
- const: vfe0
- const: vfe1
vdda-supply:
description:
Definition of the regulator used as analog power supply.
required:
- clock-names
- clocks
- compatible
- interrupt-names
- interrupts
- iommus
- power-domains
- reg
- reg-names
- vdda-supply
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8996.h>
#include <dt-bindings/clock/qcom,mmcc-msm8996.h>
camss: camss@a00000 {
compatible = "qcom,msm8996-camss";
clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
<&mmcc CAMSS_ISPIF_AHB_CLK>,
<&mmcc CAMSS_CSI0PHYTIMER_CLK>,
<&mmcc CAMSS_CSI1PHYTIMER_CLK>,
<&mmcc CAMSS_CSI2PHYTIMER_CLK>,
<&mmcc CAMSS_CSI0_AHB_CLK>,
<&mmcc CAMSS_CSI0_CLK>,
<&mmcc CAMSS_CSI0PHY_CLK>,
<&mmcc CAMSS_CSI0PIX_CLK>,
<&mmcc CAMSS_CSI0RDI_CLK>,
<&mmcc CAMSS_CSI1_AHB_CLK>,
<&mmcc CAMSS_CSI1_CLK>,
<&mmcc CAMSS_CSI1PHY_CLK>,
<&mmcc CAMSS_CSI1PIX_CLK>,
<&mmcc CAMSS_CSI1RDI_CLK>,
<&mmcc CAMSS_CSI2_AHB_CLK>,
<&mmcc CAMSS_CSI2_CLK>,
<&mmcc CAMSS_CSI2PHY_CLK>,
<&mmcc CAMSS_CSI2PIX_CLK>,
<&mmcc CAMSS_CSI2RDI_CLK>,
<&mmcc CAMSS_CSI3_AHB_CLK>,
<&mmcc CAMSS_CSI3_CLK>,
<&mmcc CAMSS_CSI3PHY_CLK>,
<&mmcc CAMSS_CSI3PIX_CLK>,
<&mmcc CAMSS_CSI3RDI_CLK>,
<&mmcc CAMSS_AHB_CLK>,
<&mmcc CAMSS_VFE0_CLK>,
<&mmcc CAMSS_CSI_VFE0_CLK>,
<&mmcc CAMSS_VFE0_AHB_CLK>,
<&mmcc CAMSS_VFE0_STREAM_CLK>,
<&mmcc CAMSS_VFE1_CLK>,
<&mmcc CAMSS_CSI_VFE1_CLK>,
<&mmcc CAMSS_VFE1_AHB_CLK>,
<&mmcc CAMSS_VFE1_STREAM_CLK>,
<&mmcc CAMSS_VFE_AHB_CLK>,
<&mmcc CAMSS_VFE_AXI_CLK>;
clock-names = "top_ahb",
"ispif_ahb",
"csiphy0_timer",
"csiphy1_timer",
"csiphy2_timer",
"csi0_ahb",
"csi0",
"csi0_phy",
"csi0_pix",
"csi0_rdi",
"csi1_ahb",
"csi1",
"csi1_phy",
"csi1_pix",
"csi1_rdi",
"csi2_ahb",
"csi2",
"csi2_phy",
"csi2_pix",
"csi2_rdi",
"csi3_ahb",
"csi3",
"csi3_phy",
"csi3_pix",
"csi3_rdi",
"ahb",
"vfe0",
"csi_vfe0",
"vfe0_ahb",
"vfe0_stream",
"vfe1",
"csi_vfe1",
"vfe1_ahb",
"vfe1_stream",
"vfe_ahb",
"vfe_axi";
interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 80 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 296 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 297 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 298 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 299 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 309 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 314 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 315 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "csiphy0",
"csiphy1",
"csiphy2",
"csid0",
"csid1",
"csid2",
"csid3",
"ispif",
"vfe0",
"vfe1";
iommus = <&vfe_smmu 0>,
<&vfe_smmu 1>,
<&vfe_smmu 2>,
<&vfe_smmu 3>;
power-domains = <&mmcc VFE0_GDSC>,
<&mmcc VFE1_GDSC>;
reg = <0x00a34000 0x1000>,
<0x00a00030 0x4>,
<0x00a35000 0x1000>,
<0x00a00038 0x4>,
<0x00a36000 0x1000>,
<0x00a00040 0x4>,
<0x00a30000 0x100>,
<0x00a30400 0x100>,
<0x00a30800 0x100>,
<0x00a30c00 0x100>,
<0x00a31000 0x500>,
<0x00a00020 0x10>,
<0x00a10000 0x1000>,
<0x00a14000 0x1000>;
reg-names = "csiphy0",
"csiphy0_clk_mux",
"csiphy1",
"csiphy1_clk_mux",
"csiphy2",
"csiphy2_clk_mux",
"csid0",
"csid1",
"csid2",
"csid3",
"ispif",
"csi_clk_mux",
"vfe0",
"vfe1";
vdda-supply = <&reg_2v8>;
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};
Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml 0 → 100644
View file @ 3aa139aa
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Qualcomm CAMSS ISP
maintainers:
- Robert Foss <robert.foss@linaro.org>
- AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
description: |
The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
properties:
compatible:
const: qcom,sdm660-camss
clocks:
minItems: 42
maxItems: 42
clock-names:
items:
- const: ahb
- const: cphy_csid0
- const: cphy_csid1
- const: cphy_csid2
- const: cphy_csid3
- const: csi0_ahb
- const: csi0
- const: csi0_phy
- const: csi0_pix
- const: csi0_rdi
- const: csi1_ahb
- const: csi1
- const: csi1_phy
- const: csi1_pix
- const: csi1_rdi
- const: csi2_ahb
- const: csi2
- const: csi2_phy
- const: csi2_pix
- const: csi2_rdi
- const: csi3_ahb
- const: csi3
- const: csi3_phy
- const: csi3_pix
- const: csi3_rdi
- const: csiphy0_timer
- const: csiphy1_timer
- const: csiphy2_timer
- const: csiphy_ahb2crif
- const: csi_vfe0
- const: csi_vfe1
- const: ispif_ahb
- const: throttle_axi
- const: top_ahb
- const: vfe0_ahb
- const: vfe0
- const: vfe0_stream
- const: vfe1_ahb
- const: vfe1
- const: vfe1_stream
- const: vfe_ahb
- const: vfe_axi
interrupts:
minItems: 10
maxItems: 10
interrupt-names:
items:
- const: csid0
- const: csid1
- const: csid2
- const: csid3
- const: csiphy0
- const: csiphy1
- const: csiphy2
- const: ispif
- const: vfe0
- const: vfe1
iommus:
maxItems: 4
power-domains:
items:
- description: VFE0 GDSC - Video Front End, Global Distributed Switch Controller.
- description: VFE1 GDSC - Video Front End, Global Distributed Switch Controller.
ports:
$ref: /schemas/graph.yaml#/properties/ports
description:
CSI input ports.
properties:
port@0:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description:
Input port for receiving CSI data.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
properties:
clock-lanes:
items:
- const: 7
data-lanes:
minItems: 1
maxItems: 4
required:
- clock-lanes
- data-lanes
port@1:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description:
Input port for receiving CSI data.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
properties:
clock-lanes:
items:
- const: 7
data-lanes:
minItems: 1
maxItems: 4
required:
- clock-lanes
- data-lanes
port@2:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description:
Input port for receiving CSI data.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
properties:
clock-lanes:
items:
- const: 7
data-lanes:
minItems: 1
maxItems: 4
required:
- clock-lanes
- data-lanes
port@3:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description:
Input port for receiving CSI data.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
properties:
clock-lanes:
items:
- const: 7
data-lanes:
minItems: 1
maxItems: 4
required:
- clock-lanes
- data-lanes
reg:
minItems: 14
maxItems: 14
reg-names:
items:
- const: csi_clk_mux
- const: csid0
- const: csid1
- const: csid2
- const: csid3
- const: csiphy0
- const: csiphy0_clk_mux
- const: csiphy1
- const: csiphy1_clk_mux
- const: csiphy2
- const: csiphy2_clk_mux
- const: ispif
- const: vfe0
- const: vfe1
vdda-supply:
description:
Definition of the regulator used as analog power supply.
required:
- clock-names
- clocks
- compatible
- interrupt-names
- interrupts
- iommus
- power-domains
- reg
- reg-names
- vdda-supply
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-sdm660.h>
#include <dt-bindings/clock/qcom,mmcc-sdm660.h>
camss: camss@ca00000 {
compatible = "qcom,sdm660-camss";
clocks = <&mmcc CAMSS_AHB_CLK>,
<&mmcc CAMSS_CPHY_CSID0_CLK>,
<&mmcc CAMSS_CPHY_CSID1_CLK>,
<&mmcc CAMSS_CPHY_CSID2_CLK>,
<&mmcc CAMSS_CPHY_CSID3_CLK>,
<&mmcc CAMSS_CSI0_AHB_CLK>,
<&mmcc CAMSS_CSI0_CLK>,
<&mmcc CAMSS_CPHY_CSID0_CLK>,
<&mmcc CAMSS_CSI0PIX_CLK>,
<&mmcc CAMSS_CSI0RDI_CLK>,
<&mmcc CAMSS_CSI1_AHB_CLK>,
<&mmcc CAMSS_CSI1_CLK>,
<&mmcc CAMSS_CPHY_CSID1_CLK>,
<&mmcc CAMSS_CSI1PIX_CLK>,
<&mmcc CAMSS_CSI1RDI_CLK>,
<&mmcc CAMSS_CSI2_AHB_CLK>,
<&mmcc CAMSS_CSI2_CLK>,
<&mmcc CAMSS_CPHY_CSID2_CLK>,
<&mmcc CAMSS_CSI2PIX_CLK>,
<&mmcc CAMSS_CSI2RDI_CLK>,
<&mmcc CAMSS_CSI3_AHB_CLK>,
<&mmcc CAMSS_CSI3_CLK>,
<&mmcc CAMSS_CPHY_CSID3_CLK>,
<&mmcc CAMSS_CSI3PIX_CLK>,
<&mmcc CAMSS_CSI3RDI_CLK>,
<&mmcc CAMSS_CSI0PHYTIMER_CLK>,
<&mmcc CAMSS_CSI1PHYTIMER_CLK>,
<&mmcc CAMSS_CSI2PHYTIMER_CLK>,
<&mmcc CSIPHY_AHB2CRIF_CLK>,
<&mmcc CAMSS_CSI_VFE0_CLK>,
<&mmcc CAMSS_CSI_VFE1_CLK>,
<&mmcc CAMSS_ISPIF_AHB_CLK>,
<&mmcc THROTTLE_CAMSS_AXI_CLK>,
<&mmcc CAMSS_TOP_AHB_CLK>,
<&mmcc CAMSS_VFE0_AHB_CLK>,
<&mmcc CAMSS_VFE0_CLK>,
<&mmcc CAMSS_VFE0_STREAM_CLK>,
<&mmcc CAMSS_VFE1_AHB_CLK>,
<&mmcc CAMSS_VFE1_CLK>,
<&mmcc CAMSS_VFE1_STREAM_CLK>,
<&mmcc CAMSS_VFE_VBIF_AHB_CLK>,
<&mmcc CAMSS_VFE_VBIF_AXI_CLK>;
clock-names = "ahb",
"cphy_csid0",
"cphy_csid1",
"cphy_csid2",
"cphy_csid3",
"csi0_ahb",
"csi0",
"csi0_phy",
"csi0_pix",
"csi0_rdi",
"csi1_ahb",
"csi1",
"csi1_phy",
"csi1_pix",
"csi1_rdi",
"csi2_ahb",
"csi2",
"csi2_phy",
"csi2_pix",
"csi2_rdi",
"csi3_ahb",
"csi3",
"csi3_phy",
"csi3_pix",
"csi3_rdi",
"csiphy0_timer",
"csiphy1_timer",
"csiphy2_timer",
"csiphy_ahb2crif",
"csi_vfe0",
"csi_vfe1",
"ispif_ahb",
"throttle_axi",
"top_ahb",
"vfe0_ahb",
"vfe0",
"vfe0_stream",
"vfe1_ahb",
"vfe1",
"vfe1_stream",
"vfe_ahb",
"vfe_axi";
interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 297 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 298 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 299 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 80 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 309 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 314 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 315 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "csid0",
"csid1",
"csid2",
"csid3",
"csiphy0",
"csiphy1",
"csiphy2",
"ispif",
"vfe0",
"vfe1";
iommus = <&mmss_smmu 0xc00>,
<&mmss_smmu 0xc01>,
<&mmss_smmu 0xc02>,
<&mmss_smmu 0xc03>;
power-domains = <&mmcc CAMSS_VFE0_GDSC>,
<&mmcc CAMSS_VFE1_GDSC>;
reg = <0x0ca00020 0x10>,
<0x0ca30000 0x100>,
<0x0ca30400 0x100>,
<0x0ca30800 0x100>,
<0x0ca30c00 0x100>,
<0x0c824000 0x1000>,
<0x0ca00120 0x4>,
<0x0c825000 0x1000>,
<0x0ca00124 0x4>,
<0x0c826000 0x1000>,
<0x0ca00128 0x4>,
<0x0ca31000 0x500>,
<0x0ca10000 0x1000>,
<0x0ca14000 0x1000>;
reg-names = "csi_clk_mux",
"csid0",
"csid1",
"csid2",
"csid3",
"csiphy0",
"csiphy0_clk_mux",
"csiphy1",
"csiphy1_clk_mux",
"csiphy2",
"csiphy2_clk_mux",
"ispif",
"vfe0",
"vfe1";
vdda-supply = <&reg_2v8>;
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};
Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml 0 → 100644
View file @ 3aa139aa
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/media/qcom,sdm845-camss.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Qualcomm CAMSS ISP
maintainers:
- Robert Foss <robert.foss@linaro.org>
description: |
The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
properties:
compatible:
const: qcom,sdm845-camss
clocks:
minItems: 36
maxItems: 36
clock-names:
items:
- const: camnoc_axi
- const: cpas_ahb
- const: cphy_rx_src
- const: csi0
- const: csi0_src
- const: csi1
- const: csi1_src
- const: csi2
- const: csi2_src
- const: csiphy0
- const: csiphy0_timer
- const: csiphy0_timer_src
- const: csiphy1
- const: csiphy1_timer
- const: csiphy1_timer_src
- const: csiphy2
- const: csiphy2_timer
- const: csiphy2_timer_src
- const: csiphy3
- const: csiphy3_timer
- const: csiphy3_timer_src
- const: gcc_camera_ahb
- const: gcc_camera_axi
- const: slow_ahb_src
- const: soc_ahb
- const: vfe0_axi
- const: vfe0
- const: vfe0_cphy_rx
- const: vfe0_src
- const: vfe1_axi
- const: vfe1
- const: vfe1_cphy_rx
- const: vfe1_src
- const: vfe_lite
- const: vfe_lite_cphy_rx
- const: vfe_lite_src
interrupts:
minItems: 10
maxItems: 10
interrupt-names:
items:
- const: csid0
- const: csid1
- const: csid2
- const: csiphy0
- const: csiphy1
- const: csiphy2
- const: csiphy3
- const: vfe0
- const: vfe1
- const: vfe_lite
iommus:
maxItems: 4
power-domains:
items:
- description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
- description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
- description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller.
ports:
$ref: /schemas/graph.yaml#/properties/ports
description:
CSI input ports.
properties:
port@0:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description:
Input port for receiving CSI data.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
properties:
clock-lanes:
maxItems: 1
data-lanes:
minItems: 1
maxItems: 4
required:
- clock-lanes
- data-lanes
port@1:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description:
Input port for receiving CSI data.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
properties:
clock-lanes:
items:
- const: 7
data-lanes:
minItems: 1
maxItems: 4
required:
- clock-lanes
- data-lanes
port@2:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description:
Input port for receiving CSI data.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
properties:
clock-lanes:
maxItems: 1
data-lanes:
minItems: 1
maxItems: 4
required:
- clock-lanes
- data-lanes
port@3:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description:
Input port for receiving CSI data.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
properties:
clock-lanes:
maxItems: 1
data-lanes:
minItems: 1
maxItems: 4
required:
- clock-lanes
- data-lanes
reg:
minItems: 10
maxItems: 10
reg-names:
items:
- const: csid0
- const: csid1
- const: csid2
- const: csiphy0
- const: csiphy1
- const: csiphy2
- const: csiphy3
- const: vfe0
- const: vfe1
- const: vfe_lite
vdda-supply:
description:
Definition of the regulator used as analog power supply.
required:
- clock-names
- clocks
- compatible
- interrupt-names
- interrupts
- iommus
- power-domains
- reg
- reg-names
- vdda-supply
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,camcc-sdm845.h>
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
camss: camss@a00000 {
compatible = "qcom,sdm845-camss";
clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
<&clock_camcc CAM_CC_CPAS_AHB_CLK>,
<&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_0_CSID_CLK>,
<&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_1_CSID_CLK>,
<&clock_camcc CAM_CC_IFE_1_CSID_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>,
<&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>,
<&clock_camcc CAM_CC_CSIPHY0_CLK>,
<&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>,
<&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSIPHY1_CLK>,
<&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>,
<&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSIPHY2_CLK>,
<&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>,
<&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSIPHY3_CLK>,
<&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>,
<&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>,
<&gcc GCC_CAMERA_AHB_CLK>,
<&gcc GCC_CAMERA_AXI_CLK>,
<&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
<&clock_camcc CAM_CC_SOC_AHB_CLK>,
<&clock_camcc CAM_CC_IFE_0_AXI_CLK>,
<&clock_camcc CAM_CC_IFE_0_CLK>,
<&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
<&clock_camcc CAM_CC_IFE_0_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_1_AXI_CLK>,
<&clock_camcc CAM_CC_IFE_1_CLK>,
<&clock_camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
<&clock_camcc CAM_CC_IFE_1_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_LITE_CLK>,
<&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
<&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>;
clock-names = "camnoc_axi",
"cpas_ahb",
"cphy_rx_src",
"csi0",
"csi0_src",
"csi1",
"csi1_src",
"csi2",
"csi2_src",
"csiphy0",
"csiphy0_timer",
"csiphy0_timer_src",
"csiphy1",
"csiphy1_timer",
"csiphy1_timer_src",
"csiphy2",
"csiphy2_timer",
"csiphy2_timer_src",
"csiphy3",
"csiphy3_timer",
"csiphy3_timer_src",
"gcc_camera_ahb",
"gcc_camera_axi",
"slow_ahb_src",
"soc_ahb",
"vfe0_axi",
"vfe0",
"vfe0_cphy_rx",
"vfe0_src",
"vfe1_axi",
"vfe1",
"vfe1_cphy_rx",
"vfe1_src",
"vfe_lite",
"vfe_lite_cphy_rx",
"vfe_lite_src";
interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "csid0",
"csid1",
"csid2",
"csiphy0",
"csiphy1",
"csiphy2",
"csiphy3",
"vfe0",
"vfe1",
"vfe_lite";
iommus = <&apps_smmu 0x0808 0x0>,
<&apps_smmu 0x0810 0x8>,
<&apps_smmu 0x0c08 0x0>,
<&apps_smmu 0x0c10 0x8>;
power-domains = <&clock_camcc IFE_0_GDSC>,
<&clock_camcc IFE_1_GDSC>,
<&clock_camcc TITAN_TOP_GDSC>;
reg = <0 0xacb3000 0 0x1000>,
<0 0xacba000 0 0x1000>,
<0 0xacc8000 0 0x1000>,
<0 0xac65000 0 0x1000>,
<0 0xac66000 0 0x1000>,
<0 0xac67000 0 0x1000>,
<0 0xac68000 0 0x1000>,
<0 0xacaf000 0 0x4000>,
<0 0xacb6000 0 0x4000>,
<0 0xacc4000 0 0x4000>;
reg-names = "csid0",
"csid1",
"csid2",
"csiphy0",
"csiphy1",
"csiphy2",
"csiphy3",
"vfe0",
"vfe1",
"vfe_lite";
vdda-supply = <&reg_2v8>;
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};
};
Documentation/devicetree/bindings/media/rc.yaml
View file @ 3aa139aa
......@@ -154,6 +154,7 @@ properties:
- rc-winfast
- rc-winfast-usbii-deluxe
- rc-x96max
- rc-xbox-360
- rc-xbox-dvd
- rc-zx-irdec
......
Documentation/devicetree/bindings/media/renesas,drif.txt deleted 100644 → 0
View file @ acd3d285
Renesas R-Car Gen3 Digital Radio Interface controller (DRIF)
------------------------------------------------------------
R-Car Gen3 DRIF is a SPI like receive only slave device. A general
representation of DRIF interfacing with a master device is shown below.
+---------------------+ +---------------------+
| |-----SCK------->|CLK |
| Master |-----SS-------->|SYNC DRIFn (slave) |
| |-----SD0------->|D0 |
| |-----SD1------->|D1 |
+---------------------+ +---------------------+
As per datasheet, each DRIF channel (drifn) is made up of two internal
channels (drifn0 & drifn1). These two internal channels share the common
CLK & SYNC. Each internal channel has its own dedicated resources like
irq, dma channels, address space & clock. This internal split is not
visible to the external master device.
The device tree model represents each internal channel as a separate node.
The internal channels sharing the CLK & SYNC are tied together by their
phandles using a property called "renesas,bonding". For the rest of
the documentation, unless explicitly stated, the word channel implies an
internal channel.
When both internal channels are enabled they need to be managed together
as one (i.e.) they cannot operate alone as independent devices. Out of the
two, one of them needs to act as a primary device that accepts common
properties of both the internal channels. This channel is identified by a
property called "renesas,primary-bond".
To summarize,
- When both the internal channels that are bonded together are enabled,
the zeroth channel is selected as primary-bond. This channels accepts
properties common to all the members of the bond.
- When only one of the bonded channels need to be enabled, the property
"renesas,bonding" or "renesas,primary-bond" will have no effect. That
enabled channel can act alone as any other independent device.
Required properties of an internal channel:
-------------------------------------------
- compatible: "renesas,r8a7795-drif" if DRIF controller is a part of R8A7795 SoC.
"renesas,r8a7796-drif" if DRIF controller is a part of R8A7796 SoC.
"renesas,rcar-gen3-drif" for a generic R-Car Gen3 compatible device.
When compatible with the generic version, nodes must list the
SoC-specific version corresponding to the platform first
followed by the generic version.
- reg: offset and length of that channel.
- interrupts: associated with that channel.
- clocks: phandle and clock specifier of that channel.
- clock-names: clock input name string: "fck".
- dmas: phandles to the DMA channels.
- dma-names: names of the DMA channel: "rx".
- renesas,bonding: phandle to the other channel.
Optional properties of an internal channel:
-------------------------------------------
- power-domains: phandle to the respective power domain.
Required properties of an internal channel when:
- It is the only enabled channel of the bond (or)
- If it acts as primary among enabled bonds
--------------------------------------------------------
- pinctrl-0: pin control group to be used for this channel.
- pinctrl-names: must be "default".
- renesas,primary-bond: empty property indicating the channel acts as primary
among the bonded channels.
- port: child port node corresponding to the data input, in accordance with
the video interface bindings defined in
Documentation/devicetree/bindings/media/video-interfaces.txt. The port
node must contain at least one endpoint.
Optional endpoint property:
---------------------------
- sync-active: Indicates sync signal polarity, 0/1 for low/high respectively.
This property maps to SYNCAC bit in the hardware manual. The
default is 1 (active high).
Example:
--------
(1) Both internal channels enabled:
-----------------------------------
When interfacing with a third party tuner device with two data pins as shown
below.
+---------------------+ +---------------------+
| |-----SCK------->|CLK |
| Master |-----SS-------->|SYNC DRIFn (slave) |
| |-----SD0------->|D0 |
| |-----SD1------->|D1 |
+---------------------+ +---------------------+
drif00: rif@e6f40000 {
compatible = "renesas,r8a7795-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6f40000 0 0x64>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 515>;
clock-names = "fck";
dmas = <&dmac1 0x20>, <&dmac2 0x20>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
renesas,bonding = <&drif01>;
renesas,primary-bond;
pinctrl-0 = <&drif0_pins>;
pinctrl-names = "default";
port {
drif0_ep: endpoint {
remote-endpoint = <&tuner_ep>;
};
};
};
drif01: rif@e6f50000 {
compatible = "renesas,r8a7795-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6f50000 0 0x64>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 514>;
clock-names = "fck";
dmas = <&dmac1 0x22>, <&dmac2 0x22>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
renesas,bonding = <&drif00>;
};
(2) Internal channel 1 alone is enabled:
----------------------------------------
When interfacing with a third party tuner device with one data pin as shown
below.
+---------------------+ +---------------------+
| |-----SCK------->|CLK |
| Master |-----SS-------->|SYNC DRIFn (slave) |
| | |D0 (unused) |
| |-----SD-------->|D1 |
+---------------------+ +---------------------+
drif00: rif@e6f40000 {
compatible = "renesas,r8a7795-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6f40000 0 0x64>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 515>;
clock-names = "fck";
dmas = <&dmac1 0x20>, <&dmac2 0x20>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
renesas,bonding = <&drif01>;
};
drif01: rif@e6f50000 {
compatible = "renesas,r8a7795-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6f50000 0 0x64>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 514>;
clock-names = "fck";
dmas = <&dmac1 0x22>, <&dmac2 0x22>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
renesas,bonding = <&drif00>;
pinctrl-0 = <&drif0_pins>;
pinctrl-names = "default";
port {
drif0_ep: endpoint {
remote-endpoint = <&tuner_ep>;
sync-active = <0>;
};
};
};
Documentation/devicetree/bindings/media/renesas,drif.yaml 0 → 100644
View file @ 3aa139aa
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/renesas,drif.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas R-Car Gen3 Digital Radio Interface Controller (DRIF)
maintainers:
- Ramesh Shanmugasundaram <rashanmu@gmail.com>
- Fabrizio Castro <fabrizio.castro.jz@renesas.com>
description: |
R-Car Gen3 DRIF is a SPI like receive only slave device. A general
representation of DRIF interfacing with a master device is shown below.
+---------------------+ +---------------------+
| |-----SCK------->|CLK |
| Master |-----SS-------->|SYNC DRIFn (slave) |
| |-----SD0------->|D0 |
| |-----SD1------->|D1 |
+---------------------+ +---------------------+
As per datasheet, each DRIF channel (drifn) is made up of two internal
channels (drifn0 & drifn1). These two internal channels share the common
CLK & SYNC. Each internal channel has its own dedicated resources like
irq, dma channels, address space & clock. This internal split is not
visible to the external master device.
The device tree model represents each internal channel as a separate node.
The internal channels sharing the CLK & SYNC are tied together by their
phandles using a property called "renesas,bonding". For the rest of
the documentation, unless explicitly stated, the word channel implies an
internal channel.
When both internal channels are enabled they need to be managed together
as one (i.e.) they cannot operate alone as independent devices. Out of the
two, one of them needs to act as a primary device that accepts common
properties of both the internal channels. This channel is identified by a
property called "renesas,primary-bond".
To summarize,
* When both the internal channels that are bonded together are enabled,
the zeroth channel is selected as primary-bond. This channels accepts
properties common to all the members of the bond.
* When only one of the bonded channels need to be enabled, the property
"renesas,bonding" or "renesas,primary-bond" will have no effect. That
enabled channel can act alone as any other independent device.
properties:
compatible:
items:
- enum:
- renesas,r8a7795-drif # R-Car H3
- renesas,r8a7796-drif # R-Car M3-W
- renesas,r8a77965-drif # R-Car M3-N
- renesas,r8a77990-drif # R-Car E3
- const: renesas,rcar-gen3-drif # Generic R-Car Gen3 compatible device
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
clock-names:
maxItems: 1
items:
- const: fck
resets:
maxItems: 1
dmas:
minItems: 1
maxItems: 2
dma-names:
minItems: 1
maxItems: 2
items:
- const: rx
- const: rx
renesas,bonding:
$ref: /schemas/types.yaml#/definitions/phandle
description:
The phandle to the other internal channel of DRIF
power-domains:
maxItems: 1
renesas,primary-bond:
type: boolean
description:
Indicates that the channel acts as primary among the bonded channels.
port:
type: object
description:
Child port node corresponding to the data input, in accordance with the
video interface bindings defined in
Documentation/devicetree/bindings/media/video-interfaces.txt.
The port node must contain at least one endpoint.
properties:
endpoint:
type: object
properties:
remote-endpoint:
description:
A phandle to the remote tuner endpoint subnode in remote node
port.
sync-active:
enum: [0, 1]
description:
Indicates sync signal polarity, 0/1 for low/high respectively.
This property maps to SYNCAC bit in the hardware manual. The
default is 1 (active high).
additionalProperties: false
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- resets
- dmas
- dma-names
- renesas,bonding
- power-domains
allOf:
- if:
required:
- renesas,primary-bond
then:
required:
- pinctrl-0
- pinctrl-names
- port
- if:
required:
- port
then:
required:
- pinctrl-0
- pinctrl-names
else:
properties:
pinctrl-0: false
pinctrl-names: false
additionalProperties: false
examples:
# Example with both internal channels enabled.
#
# When interfacing with a third party tuner device with two data pins as shown
# below.
#
# +---------------------+ +---------------------+
# | |-----SCK------->|CLK |
# | Master |-----SS-------->|SYNC DRIFn (slave) |
# | |-----SD0------->|D0 |
# | |-----SD1------->|D1 |
# +---------------------+ +---------------------+
- |
#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a7795-sysc.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
drif00: rif@e6f40000 {
compatible = "renesas,r8a7795-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6f40000 0 0x64>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 515>;
clock-names = "fck";
dmas = <&dmac1 0x20>, <&dmac2 0x20>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
renesas,bonding = <&drif01>;
resets = <&cpg 515>;
renesas,primary-bond;
pinctrl-0 = <&drif0_pins>;
pinctrl-names = "default";
port {
drif0_ep: endpoint {
remote-endpoint = <&tuner_ep>;
};
};
};
drif01: rif@e6f50000 {
compatible = "renesas,r8a7795-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6f50000 0 0x64>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 514>;
clock-names = "fck";
dmas = <&dmac1 0x22>, <&dmac2 0x22>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
renesas,bonding = <&drif00>;
resets = <&cpg 514>;
};
};
# Example with internal channel 1 alone enabled.
#
# When interfacing with a third party tuner device with one data pin as shown
# below.
#
# +---------------------+ +---------------------+
# | |-----SCK------->|CLK |
# | Master |-----SS-------->|SYNC DRIFn (slave) |
# | | |D0 (unused) |
# | |-----SD-------->|D1 |
# +---------------------+ +---------------------+
- |
#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a7795-sysc.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
drif10: rif@e6f60000 {
compatible = "renesas,r8a7795-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6f60000 0 0x64>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 513>;
clock-names = "fck";
dmas = <&dmac1 0x24>, <&dmac2 0x24>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 513>;
renesas,bonding = <&drif11>;
status = "disabled";
};
drif11: rif@e6f70000 {
compatible = "renesas,r8a7795-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6f70000 0 0x64>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 512>;
clock-names = "fck";
dmas = <&dmac1 0x26>, <&dmac2 0x26>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 512>;
renesas,bonding = <&drif10>;
pinctrl-0 = <&drif1_pins>;
pinctrl-names = "default";
port {
drif1_ep: endpoint {
remote-endpoint = <&tuner_ep1>;
sync-active = <0>;
};
};
};
};
...
Documentation/devicetree/bindings/media/zx-irdec.txt deleted 100644 → 0
View file @ acd3d285
IR Decoder (IRDEC) on ZTE ZX family SoCs
Required properties:
- compatible: Should be "zte,zx296718-irdec".
- reg: Physical base address and length of IRDEC registers.
- interrupts: Interrupt number of IRDEC.
Exmaples:
irdec: ir-decoder@111000 {
compatible = "zte,zx296718-irdec";
reg = <0x111000 0x1000>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
};
Documentation/driver-api/media/camera-sensor.rst
View file @ 3aa139aa
......@@ -144,8 +144,7 @@ of the device. This is because the power state of the device is only changed
after the power state transition has taken place. The ``s_ctrl`` callback can be
used to obtain device's power state after the power state transition:
.. c:function::
int pm_runtime_get_if_in_use(struct device *dev);
.. c:function:: int pm_runtime_get_if_in_use(struct device *dev);
The function returns a non-zero value if it succeeded getting the power count or
runtime PM was disabled, in either of which cases the driver may proceed to
......
Documentation/driver-api/media/index.rst
View file @ 3aa139aa
......@@ -28,6 +28,8 @@ Please see:
:maxdepth: 5
:numbered:
maintainer-entry-profile
v4l2-core
dtv-core
rc-core
......
Documentation/driver-api/media/maintainer-entry-profile.rst 0 → 100644
View file @ 3aa139aa
Media Subsystem Profile
=======================
Overview
--------
The media subsystem covers support for a variety of devices: stream
capture, analog and digital TV streams, cameras, remote controllers, HDMI CEC
and media pipeline control.
It covers, mainly, the contents of those directories:
- drivers/media
- drivers/staging/media
- Documentation/admin-guide/media
- Documentation/driver-api/media
- Documentation/userspace-api/media
- Documentation/devicetree/bindings/media/\ [1]_
- include/media
.. [1] Device tree bindings are maintained by the
OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS maintainers
(see the MAINTAINERS file). So, changes there must be reviewed
by them before being merged via the media subsystem's development
tree.
Both media userspace and Kernel APIs are documented and the documentation
must be kept in sync with the API changes. It means that all patches that
add new features to the subsystem must also bring changes to the
corresponding API files.
Due to the size and wide scope of the media subsystem, media's
maintainership model is to have sub-maintainers that have a broad
knowledge of a specific aspect of the subsystem. It is the sub-maintainers'
task to review the patches, providing feedback to users if the patches are
following the subsystem rules and are properly using the media kernel and
userspace APIs.
Patches for the media subsystem must be sent to the media mailing list
at linux-media@vger.kernel.org as plain text only e-mail. Emails with
HTML will be automatically rejected by the mail server. It could be wise
to also copy the sub-maintainer(s).
Media's workflow is heavily based on Patchwork, meaning that, once a patch
is submitted, the e-mail will first be accepted by the mailing list
server, and, after a while, it should appear at:
- https://patchwork.linuxtv.org/project/linux-media/list/
If it doesn't automatically appear there after a few minutes, then
probably something went wrong on your submission. Please check if the
email is in plain text\ [2]_ only and if your emailer is not mangling
whitespaces before complaining or submitting them again.
You can check if the mailing list server accepted your patch, by looking at:
- https://lore.kernel.org/linux-media/
.. [2] If your email contains HTML, the mailing list server will simply
drop it, without any further notice.
Media maintainers
+++++++++++++++++
At the media subsystem, we have a group of senior developers that
are responsible for doing the code reviews at the drivers (also known as
sub-maintainers), and another senior developer responsible for the
subsystem as a whole. For core changes, whenever possible, multiple
media maintainers do the review.
The media maintainers that work on specific areas of the subsystem are:
- Digital TV and remote controllers:
Sean Young <sean@mess.org>
- HDMI CEC:
Hans Verkuil <hverkuil@xs4all.nl>
- Media controller drivers:
Laurent Pinchart <laurent.pinchart@ideasonboard.com>
- ISP, v4l2-async, v4l2-fwnode, v4l2-flash-led-class and Sensor drivers:
Sakari Ailus <sakari.ailus@linux.intel.com>
- V4L2 drivers and core V4L2 frameworks:
Hans Verkuil <hverkuil@xs4all.nl>
The subsystem maintainer is:
Mauro Carvalho Chehab <mchehab@kernel.org>
Media maintainers may delegate a patch to other media maintainers as needed.
On such case, checkpatch's ``delegate`` field indicates who's currently
responsible for reviewing a patch.
Submit Checklist Addendum
-------------------------
Patches that change the Open Firmware/Device Tree bindings must be
reviewed by the Device Tree maintainers. So, DT maintainers should be
Cc:ed when those are submitted via devicetree@vger.kernel.org mailing
list.
There is a set of compliance tools at https://git.linuxtv.org/v4l-utils.git/
that should be used in order to check if the drivers are properly
implementing the media APIs:
==================== =======================================================
Type Tool
==================== =======================================================
V4L2 drivers\ [3]_ ``v4l2-compliance``
V4L2 virtual drivers ``contrib/test/test-media``
CEC drivers ``cec-compliance``
==================== =======================================================
.. [3] The ``v4l2-compliance`` also covers the media controller usage inside
V4L2 drivers.
Other compilance tools are under development to check other parts of the
subsystem.
Those tests need to pass before the patches go upstream.
Also, please notice that we build the Kernel with::
make CF=-D__CHECK_ENDIAN__ CONFIG_DEBUG_SECTION_MISMATCH=y C=1 W=1 CHECK=check_script
Where the check script is::
#!/bin/bash
/devel/smatch/smatch -p=kernel $@ >&2
/devel/sparse/sparse $@ >&2
Be sure to not introduce new warnings on your patches without a
very good reason.
Style Cleanup Patches
+++++++++++++++++++++
Style cleanups are welcome when they come together with other changes
at the files where the style changes will affect.
We may accept pure standalone style cleanups, but they should ideally
be one patch for the whole subsystem (if the cleanup is low volume),
or at least be grouped per directory. So, for example, if you're doing a
big cleanup change set at drivers under drivers/media, please send a single
patch for all drivers under drivers/media/pci, another one for
drivers/media/usb and so on.
Coding Style Addendum
+++++++++++++++++++++
Media development uses ``checkpatch.pl`` on strict mode to verify the code
style, e.g.::
$ ./scripts/checkpatch.pl --strict --max-line-length=80
In principle, patches should follow the coding style rules, but exceptions
are allowed if there are good reasons. On such case, maintainers and reviewers
may question about the rationale for not addressing the ``checkpatch.pl``.
Please notice that the goal here is to improve code readability. On
a few cases, ``checkpatch.pl`` may actually point to something that would
look worse. So, you should use good sense.
Note that addressing one ``checkpatch.pl`` issue (of any kind) alone may lead
to having longer lines than 80 characters per line. While this is not
strictly prohibited, efforts should be made towards staying within 80
characters per line. This could include using re-factoring code that leads
to less indentation, shorter variable or function names and last but not
least, simply wrapping the lines.
In particular, we accept lines with more than 80 columns:
- on strings, as they shouldn't be broken due to line length limits;
- when a function or variable name need to have a big identifier name,
which keeps hard to honor the 80 columns limit;
- on arithmetic expressions, when breaking lines makes them harder to
read;
- when they avoid a line to end with an open parenthesis or an open
bracket.
Key Cycle Dates
---------------
New submissions can be sent at any time, but if they intend to hit the
next merge window they should be sent before -rc5, and ideally stabilized
in the linux-media branch by -rc6.
Review Cadence
--------------
Provided that your patch is at https://patchwork.linuxtv.org, it should
be sooner or later handled, so you don't need to re-submit a patch.
Except for bug fixes, we don't usually add new patches to the development
tree between -rc6 and the next -rc1.
Please notice that the media subsystem is a high traffic one, so it
could take a while for us to be able to review your patches. Feel free
to ping if you don't get a feedback in a couple of weeks or to ask
other developers to publicly add Reviewed-by and, more importantly,
``Tested-by:`` tags.
Please note that we expect a detailed description for ``Tested-by:``,
identifying what boards were used at the test and what it was tested.
Documentation/driver-api/media/v4l2-subdev.rst
View file @ 3aa139aa
......@@ -208,7 +208,7 @@ the needs of the driver.
:c:func:`v4l2_async_notifier_add_i2c_subdev` are for bridge and ISP drivers for
registering their async sub-devices with the notifier.
:c:func:`v4l2_async_register_subdev_sensor_common` is a helper function for
:c:func:`v4l2_async_register_subdev_sensor` is a helper function for
sensor drivers registering their own async sub-device, but it also registers a
notifier and further registers async sub-devices for lens and flash devices
found in firmware. The notifier for the sub-device is unregistered with the
......@@ -252,7 +252,7 @@ contain several subdevs that use an I2C bus, but also a subdev that is
controlled through GPIO pins. This distinction is only relevant when setting
up the device, but once the subdev is registered it is completely transparent.
Once te subdev has been registered you can call an ops function either
Once the subdev has been registered you can call an ops function either
directly:
.. code-block:: c
......
Documentation/maintainer/maintainer-entry-profile.rst
View file @ 3aa139aa
......@@ -102,3 +102,4 @@ to do something different in the near future.
../doc-guide/maintainer-profile
../nvdimm/maintainer-entry-profile
../riscv/patch-acceptance
../driver-api/media/maintainer-entry-profile
Documentation/userspace-api/media/cec/cec-ioc-adap-g-caps.rst
View file @ 3aa139aa
......@@ -35,7 +35,7 @@ device information, applications call the ioctl with a pointer to a
struct :c:type:`cec_caps`. The driver fills the structure and
returns the information to the application. The ioctl never fails.
.. tabularcolumns:: |p{1.2cm}|p{2.5cm}|p{13.8cm}|
.. tabularcolumns:: |p{1.2cm}|p{2.5cm}|p{13.6cm}|
.. c:type:: cec_caps
......@@ -63,7 +63,7 @@ returns the information to the application. The ioctl never fails.
- CEC Framework API version, formatted with the ``KERNEL_VERSION()``
macro.
.. tabularcolumns:: |p{4.4cm}|p{2.5cm}|p{10.6cm}|
.. tabularcolumns:: |p{4.4cm}|p{2.5cm}|p{10.4cm}|
.. _cec-capabilities:
......
Documentation/userspace-api/media/cec/cec-ioc-adap-g-conn-info.rst
View file @ 3aa139aa
......@@ -39,7 +39,7 @@ provide a pointer to a cec_connector_info struct which will be populated
by the kernel with the info provided by the adapter's driver. This ioctl
is only available if the ``CEC_CAP_CONNECTOR_INFO`` capability is set.
.. tabularcolumns:: |p{1.0cm}|p{4.4cm}|p{2.5cm}|p{9.6cm}|
.. tabularcolumns:: |p{1.0cm}|p{4.4cm}|p{2.5cm}|p{9.2cm}|
.. c:type:: cec_connector_info
......@@ -59,7 +59,7 @@ is only available if the ``CEC_CAP_CONNECTOR_INFO`` capability is set.
* - }
-
.. tabularcolumns:: |p{4.4cm}|p{2.5cm}|p{10.6cm}|
.. tabularcolumns:: |p{4.4cm}|p{2.5cm}|p{10.4cm}|
.. _connector-type:
......@@ -82,7 +82,7 @@ is only available if the ``CEC_CAP_CONNECTOR_INFO`` capability is set.
Information about the connector can be found in
:ref:`cec-drm-connector-info`.
.. tabularcolumns:: |p{4.4cm}|p{2.5cm}|p{10.6cm}|
.. tabularcolumns:: |p{4.4cm}|p{2.5cm}|p{10.4cm}|
.. c:type:: cec_drm_connector_info
......
Documentation/userspace-api/media/cec/cec-ioc-adap-g-log-addrs.rst
View file @ 3aa139aa
......@@ -67,7 +67,7 @@ logical address types are already defined will return with error ``EBUSY``.
.. c:type:: cec_log_addrs
.. tabularcolumns:: |p{1.0cm}|p{8.0cm}|p{7.5cm}|
.. tabularcolumns:: |p{1.0cm}|p{8.0cm}|p{8.0cm}|
.. cssclass:: longtable
......@@ -150,7 +150,7 @@ logical address types are already defined will return with error ``EBUSY``.
give the CEC framework more information about the device type, even
though the framework won't use it directly in the CEC message.
.. tabularcolumns:: |p{7.8cm}|p{1.0cm}|p{8.7cm}|
.. tabularcolumns:: |p{7.8cm}|p{1.0cm}|p{8.5cm}|
.. _cec-log-addrs-flags:
......@@ -186,7 +186,7 @@ logical address types are already defined will return with error ``EBUSY``.
All other messages are ignored.
.. tabularcolumns:: |p{7.8cm}|p{1.0cm}|p{8.7cm}|
.. tabularcolumns:: |p{7.8cm}|p{1.0cm}|p{8.5cm}|
.. _cec-versions:
......@@ -211,7 +211,7 @@ logical address types are already defined will return with error ``EBUSY``.
- 6
- CEC version according to the HDMI 2.0 standard.
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}|
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.5cm}|
.. _cec-prim-dev-types:
......@@ -256,7 +256,7 @@ logical address types are already defined will return with error ``EBUSY``.
- 7
- Use for a video processor device.
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}|
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.5cm}|
.. _cec-log-addr-types:
......@@ -304,7 +304,7 @@ logical address types are already defined will return with error ``EBUSY``.
Control).
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}|
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.5cm}|
.. _cec-all-dev-types-flags:
......
Documentation/userspace-api/media/cec/cec-ioc-dqevent.rst
View file @ 3aa139aa
......@@ -44,7 +44,7 @@ two :ref:`CEC_EVENT_STATE_CHANGE <CEC-EVENT-STATE-CHANGE>` events with
the same state). In that case the intermediate state changes were lost but
it is guaranteed that the state did change in between the two events.
.. tabularcolumns:: |p{1.2cm}|p{2.9cm}|p{13.4cm}|
.. tabularcolumns:: |p{1.2cm}|p{2.9cm}|p{13.2cm}|
.. c:type:: cec_event_state_change
......@@ -74,7 +74,7 @@ it is guaranteed that the state did change in between the two events.
.. c:type:: cec_event_lost_msgs
.. tabularcolumns:: |p{1.0cm}|p{2.0cm}|p{14.5cm}|
.. tabularcolumns:: |p{1.0cm}|p{2.0cm}|p{14.3cm}|
.. flat-table:: struct cec_event_lost_msgs
:header-rows: 0
......@@ -93,7 +93,7 @@ it is guaranteed that the state did change in between the two events.
replied to within a second according to the CEC specification,
this is more than enough.
.. tabularcolumns:: |p{1.0cm}|p{4.4cm}|p{2.5cm}|p{9.6cm}|
.. tabularcolumns:: |p{1.0cm}|p{4.4cm}|p{2.5cm}|p{9.2cm}|
.. c:type:: cec_event
......@@ -128,7 +128,7 @@ it is guaranteed that the state did change in between the two events.
* - }
-
.. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{11.0cm}|
.. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{10.8cm}|
.. _cec-events:
......@@ -201,7 +201,7 @@ it is guaranteed that the state did change in between the two events.
if the 5V is high, then an initial event will be generated for that
filehandle.
.. tabularcolumns:: |p{6.0cm}|p{0.6cm}|p{10.9cm}|
.. tabularcolumns:: |p{6.0cm}|p{0.6cm}|p{10.7cm}|
.. _cec-event-flags:
......
Documentation/userspace-api/media/cec/cec-ioc-g-mode.rst
View file @ 3aa139aa
......@@ -72,7 +72,7 @@ always call :ref:`ioctl CEC_TRANSMIT <CEC_TRANSMIT>`.
Available initiator modes are:
.. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{11.0cm}|
.. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{10.8cm}|
.. _cec-mode-initiator_e:
......@@ -106,7 +106,7 @@ Available initiator modes are:
Available follower modes are:
.. tabularcolumns:: |p{6.6cm}|p{0.9cm}|p{10.0cm}|
.. tabularcolumns:: |p{6.6cm}|p{0.9cm}|p{9.8cm}|
.. _cec-mode-follower_e:
......
Documentation/userspace-api/media/cec/cec-ioc-receive.rst
View file @ 3aa139aa
......@@ -84,7 +84,7 @@ physical address, but the cable is still connected and CEC still works.
In order to detect/wake up the device it is allowed to send poll and 'Image/Text
View On' messages from initiator 0xf ('Unregistered') to destination 0 ('TV').
.. tabularcolumns:: |p{1.0cm}|p{3.5cm}|p{13.0cm}|
.. tabularcolumns:: |p{1.0cm}|p{3.5cm}|p{12.8cm}|
.. c:type:: cec_msg
......@@ -196,7 +196,7 @@ View On' messages from initiator 0xf ('Unregistered') to destination 0 ('TV').
supports this, otherwise it is always 0. This counter is only
valid if the :ref:`CEC_TX_STATUS_ERROR <CEC-TX-STATUS-ERROR>` status bit is set.
.. tabularcolumns:: |p{6.2cm}|p{1.0cm}|p{10.3cm}|
.. tabularcolumns:: |p{6.2cm}|p{1.0cm}|p{10.1cm}|
.. _cec-msg-flags:
......@@ -229,7 +229,7 @@ View On' messages from initiator 0xf ('Unregistered') to destination 0 ('TV').
capability. If that is not set, then the ``EPERM`` error code is
returned.
.. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{11.0cm}|
.. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{10.8cm}|
.. _cec-tx-status:
......@@ -298,7 +298,7 @@ View On' messages from initiator 0xf ('Unregistered') to destination 0 ('TV').
- The transmit timed out. This should not normally happen and this
indicates a driver problem.
.. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{11.0cm}|
.. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{10.8cm}|
.. _cec-rx-status:
......
Documentation/userspace-api/media/cec/cec-pin-error-inj.rst
View file @ 3aa139aa
......@@ -44,7 +44,7 @@ error injection status::
# <op>[,<mode>] rx-low-drive <bit> force a low-drive condition at this bit position
# <op>[,<mode>] rx-add-byte add a spurious byte to the received CEC message
# <op>[,<mode>] rx-remove-byte remove the last byte from the received CEC message
# <op>[,<mode>] rx-arb-lost <poll> generate a POLL message to trigger an arbitration lost
# any[,<mode>] rx-arb-lost [<poll>] generate a POLL message to trigger an arbitration lost
#
# TX error injection settings:
# tx-ignore-nack-until-eom ignore early NACKs until EOM
......
Documentation/userspace-api/media/dvb/fe-type-t.rst
View file @ 3aa139aa
......@@ -11,7 +11,7 @@ fe_type_t type, defined as:
.. c:type:: fe_type
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}|
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.5cm}|
.. flat-table:: Frontend types
:header-rows: 1
......
Documentation/userspace-api/media/mediactl/media-ioc-device-info.rst
View file @ 3aa139aa
......@@ -39,7 +39,7 @@ ioctl never fails.
.. c:type:: media_device_info
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.5cm}|
.. flat-table:: struct media_device_info
:header-rows: 0
......
Documentation/userspace-api/media/mediactl/media-ioc-enum-entities.rst
View file @ 3aa139aa
......@@ -50,7 +50,7 @@ id's until they get an error.
.. c:type:: media_entity_desc
.. tabularcolumns:: |p{1.5cm}|p{1.7cm}|p{1.6cm}|p{1.5cm}|p{11.2cm}|
.. tabularcolumns:: |p{1.5cm}|p{1.7cm}|p{1.6cm}|p{1.5cm}|p{10.6cm}|
.. flat-table:: struct media_entity_desc
:header-rows: 0
......
Documentation/userspace-api/media/mediactl/media-ioc-enum-links.rst
View file @ 3aa139aa
......@@ -54,7 +54,7 @@ returned during the enumeration process.
.. c:type:: media_links_enum
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.5cm}|
.. flat-table:: struct media_links_enum
:header-rows: 0
......@@ -82,7 +82,7 @@ returned during the enumeration process.
.. c:type:: media_pad_desc
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.5cm}|
.. flat-table:: struct media_pad_desc
:header-rows: 0
......@@ -109,7 +109,7 @@ returned during the enumeration process.
.. c:type:: media_link_desc
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.5cm}|
.. flat-table:: struct media_link_desc
:header-rows: 0
......
Documentation/userspace-api/media/mediactl/media-ioc-g-topology.rst
View file @ 3aa139aa
......@@ -46,7 +46,7 @@ other values untouched.
If the ``topology_version`` remains the same, the ioctl should fill the
desired arrays with the media graph elements.
.. tabularcolumns:: |p{1.6cm}|p{3.4cm}|p{12.5cm}|
.. tabularcolumns:: |p{1.6cm}|p{3.4cm}|p{12.3cm}|
.. c:type:: media_v2_topology
......@@ -119,7 +119,7 @@ desired arrays with the media graph elements.
converted to a 64-bits integer. It can be zero. if zero, the ioctl
won't store the links. It will just update ``num_links``
.. tabularcolumns:: |p{1.6cm}|p{3.2cm}|p{12.7cm}|
.. tabularcolumns:: |p{1.6cm}|p{3.2cm}|p{12.5cm}|
.. c:type:: media_v2_entity
......@@ -156,7 +156,7 @@ desired arrays with the media graph elements.
- Reserved for future extensions. Drivers and applications must set
this array to zero.
.. tabularcolumns:: |p{1.6cm}|p{3.2cm}|p{12.7cm}|
.. tabularcolumns:: |p{1.6cm}|p{3.2cm}|p{12.5cm}|
.. c:type:: media_v2_interface
......@@ -189,7 +189,7 @@ desired arrays with the media graph elements.
- Used only for device node interfaces. See
:c:type:`media_v2_intf_devnode` for details.
.. tabularcolumns:: |p{1.6cm}|p{3.2cm}|p{12.7cm}|
.. tabularcolumns:: |p{1.6cm}|p{3.2cm}|p{12.5cm}|
.. c:type:: media_v2_intf_devnode
......@@ -206,7 +206,7 @@ desired arrays with the media graph elements.
- ``minor``
- Device node minor number.
.. tabularcolumns:: |p{1.6cm}|p{3.2cm}|p{12.7cm}|
.. tabularcolumns:: |p{1.6cm}|p{3.2cm}|p{12.5cm}|
.. c:type:: media_v2_pad
......@@ -241,7 +241,7 @@ desired arrays with the media graph elements.
- Reserved for future extensions. Drivers and applications must set
this array to zero.
.. tabularcolumns:: |p{1.6cm}|p{3.2cm}|p{12.7cm}|
.. tabularcolumns:: |p{1.6cm}|p{3.2cm}|p{12.5cm}|
.. c:type:: media_v2_link
......
Documentation/userspace-api/media/mediactl/media-types.rst
View file @ 3aa139aa
......@@ -5,7 +5,7 @@
Types and flags used to represent the media graph elements
==========================================================
.. tabularcolumns:: |p{8.2cm}|p{10.3cm}|
.. tabularcolumns:: |p{8.2cm}|p{9.3cm}|
.. _media-entity-functions:
.. _MEDIA-ENT-F-UNKNOWN:
......@@ -251,7 +251,7 @@ Types and flags used to represent the media graph elements
- The entity represents a connector.
.. tabularcolumns:: |p{6.5cm}|p{6.0cm}|p{5.0cm}|
.. tabularcolumns:: |p{6.5cm}|p{6.0cm}|p{4.8cm}|
.. _media-intf-type:
.. _MEDIA-INTF-T-DVB-FE:
......
Documentation/userspace-api/media/rc/rc-tables.rst
View file @ 3aa139aa
......@@ -25,7 +25,7 @@ the remote via /dev/input/event devices.
.. _rc_standard_keymap:
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.5cm}|
.. flat-table:: IR default keymapping
:header-rows: 0
......
Documentation/userspace-api/media/v4l/buffer.rst
View file @ 3aa139aa
......@@ -157,7 +157,7 @@ of appropriately sized buffers for each use case).
struct v4l2_buffer
==================
.. tabularcolumns:: |p{2.8cm}|p{2.5cm}|p{1.6cm}|p{10.2cm}|
.. tabularcolumns:: |p{2.9cm}|p{2.4cm}|p{12.0cm}|
.. cssclass:: longtable
......@@ -314,7 +314,7 @@ struct v4l2_buffer
struct v4l2_plane
=================
.. tabularcolumns:: |p{3.5cm}|p{3.5cm}|p{3.5cm}|p{7.0cm}|
.. tabularcolumns:: |p{3.5cm}|p{3.5cm}|p{10.3cm}|
.. cssclass:: longtable
......@@ -389,7 +389,7 @@ enum v4l2_buf_type
.. cssclass:: longtable
.. tabularcolumns:: |p{7.8cm}|p{0.6cm}|p{9.1cm}|
.. tabularcolumns:: |p{7.8cm}|p{0.6cm}|p{8.9cm}|
.. flat-table::
:header-rows: 0
......@@ -452,16 +452,16 @@ Buffer Flags
.. raw:: latex
\small
\footnotesize
.. tabularcolumns:: |p{7.0cm}|p{2.1cm}|p{8.4cm}|
.. tabularcolumns:: |p{6.5cm}|p{1.8cm}|p{9.0cm}|
.. cssclass:: longtable
.. flat-table::
:header-rows: 0
:stub-columns: 0
:widths: 3 1 4
:widths: 65 18 70
* .. _`V4L2-BUF-FLAG-MAPPED`:
......@@ -585,7 +585,7 @@ Buffer Flags
- ``V4L2_BUF_FLAG_M2M_HOLD_CAPTURE_BUF``
- 0x00000200
- Only valid if ``V4L2_BUF_CAP_SUPPORTS_M2M_HOLD_CAPTURE_BUF`` is
- Only valid if struct :c:type:`v4l2_requestbuffers` flag ``V4L2_BUF_CAP_SUPPORTS_M2M_HOLD_CAPTURE_BUF`` is
set. It is typically used with stateless decoders where multiple
output buffers each decode to a slice of the decoded frame.
Applications can set this flag when queueing the output buffer
......@@ -681,7 +681,7 @@ Buffer Flags
enum v4l2_memory
================
.. tabularcolumns:: |p{5.0cm}|p{0.8cm}|p{11.7cm}|
.. tabularcolumns:: |p{5.0cm}|p{0.8cm}|p{11.5cm}|
.. flat-table::
:header-rows: 0
......@@ -715,7 +715,7 @@ The :c:type:`v4l2_buffer_timecode` structure is designed to hold a
struct v4l2_timecode
--------------------
.. tabularcolumns:: |p{1.4cm}|p{2.8cm}|p{12.3cm}|
.. tabularcolumns:: |p{1.4cm}|p{2.8cm}|p{13.1cm}|
.. flat-table::
:header-rows: 0
......@@ -751,8 +751,6 @@ struct v4l2_timecode
Timecode Types
--------------
.. tabularcolumns:: |p{5.6cm}|p{0.8cm}|p{11.1cm}|
.. flat-table::
:header-rows: 0
:stub-columns: 0
......@@ -780,7 +778,7 @@ Timecode Types
Timecode Flags
--------------
.. tabularcolumns:: |p{6.6cm}|p{1.4cm}|p{9.5cm}|
.. tabularcolumns:: |p{6.6cm}|p{1.4cm}|p{9.3cm}|
.. flat-table::
:header-rows: 0
......
Documentation/userspace-api/media/v4l/colorspaces-details.rst
View file @ 3aa139aa
......@@ -17,10 +17,6 @@ PAL and by SDTV in general. The default transfer function is
range. The chromaticities of the primary colors and the white reference
are:
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. flat-table:: SMPTE 170M Chromaticities
:header-rows: 1
:stub-columns: 0
......@@ -98,10 +94,6 @@ default Y'CbCr encoding is ``V4L2_YCBCR_ENC_709``. The default Y'CbCr
quantization is limited range. The chromaticities of the primary colors
and the white reference are:
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. flat-table:: Rec. 709 Chromaticities
:header-rows: 1
:stub-columns: 0
......@@ -225,10 +217,6 @@ would break how applications interpret the quantization range.
The chromaticities of the primary colors and the white reference are:
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. flat-table:: sRGB Chromaticities
:header-rows: 1
:stub-columns: 0
......@@ -308,9 +296,6 @@ would break how applications interpret the quantization range.
The chromaticities of the primary colors and the white reference are:
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. flat-table:: opRGB Chromaticities
:header-rows: 1
:stub-columns: 0
......@@ -373,10 +358,6 @@ definition television (UHDTV). The default transfer function is
``V4L2_YCBCR_ENC_BT2020``. The default Y'CbCr quantization is limited range.
The chromaticities of the primary colors and the white reference are:
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. flat-table:: BT.2020 Chromaticities
:header-rows: 1
:stub-columns: 0
......@@ -478,9 +459,6 @@ is ``V4L2_XFER_FUNC_DCI_P3``. The default Y'CbCr encoding is
The chromaticities of the primary colors and the white reference are:
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. flat-table:: DCI-P3 Chromaticities
:header-rows: 1
:stub-columns: 0
......@@ -532,9 +510,6 @@ quantization is limited range. The chromaticities of the primary colors
and the white reference are:
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. flat-table:: SMPTE 240M Chromaticities
:header-rows: 1
:stub-columns: 0
......@@ -603,9 +578,6 @@ limited range. The chromaticities of the primary colors and the white
reference are:
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. flat-table:: NTSC 1953 Chromaticities
:header-rows: 1
:stub-columns: 0
......@@ -683,9 +655,6 @@ range. The chromaticities of the primary colors and the white reference
are:
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. flat-table:: EBU Tech. 3213 Chromaticities
:header-rows: 1
:stub-columns: 0
......
Documentation/userspace-api/media/v4l/common.rst
View file @ 3aa139aa
......@@ -51,6 +51,7 @@ applicable to all devices.
ext-ctrls-fm-tx
ext-ctrls-fm-rx
ext-ctrls-detect
ext-ctrls-colorimetry
fourcc
format
planar-apis
......
Documentation/userspace-api/media/v4l/control.rst
View file @ 3aa139aa
......@@ -154,10 +154,13 @@ Control IDs
``V4L2_CID_POWER_LINE_FREQUENCY`` ``(enum)``
Enables a power line frequency filter to avoid flicker. Possible
values for ``enum v4l2_power_line_frequency`` are:
``V4L2_CID_POWER_LINE_FREQUENCY_DISABLED`` (0),
``V4L2_CID_POWER_LINE_FREQUENCY_50HZ`` (1),
``V4L2_CID_POWER_LINE_FREQUENCY_60HZ`` (2) and
``V4L2_CID_POWER_LINE_FREQUENCY_AUTO`` (3).
========================================== ==
``V4L2_CID_POWER_LINE_FREQUENCY_DISABLED`` 0
``V4L2_CID_POWER_LINE_FREQUENCY_50HZ`` 1
``V4L2_CID_POWER_LINE_FREQUENCY_60HZ`` 2
``V4L2_CID_POWER_LINE_FREQUENCY_AUTO`` 3
========================================== ==
``V4L2_CID_HUE_AUTO`` ``(boolean)``
Enables automatic hue control by the device. The effect of setting
......@@ -197,7 +200,7 @@ Control IDs
.. tabularcolumns:: |p{5.5cm}|p{12cm}|
.. tabularcolumns:: |p{5.7cm}|p{11.8cm}|
.. flat-table::
:header-rows: 0
......
Documentation/userspace-api/media/v4l/dev-meta.rst
View file @ 3aa139aa
......@@ -49,7 +49,7 @@ to 0.
.. c:type:: v4l2_meta_format
.. tabularcolumns:: |p{1.4cm}|p{2.2cm}|p{13.9cm}|
.. tabularcolumns:: |p{1.4cm}|p{2.4cm}|p{13.5cm}|
.. flat-table:: struct v4l2_meta_format
:header-rows: 0
......
Documentation/userspace-api/media/v4l/dev-overlay.rst
View file @ 3aa139aa
......@@ -37,6 +37,10 @@ capturing and overlay. Optionally these drivers may also permit
capturing and overlay with a single file descriptor for compatibility
with V4L and earlier versions of V4L2. [#f1]_
A common application of two file descriptors is the X11
:ref:`Xv/V4L <xvideo>` interface driver and a V4L2 application.
While the X server controls video overlay, the application can take
advantage of memory mapping and DMA.
Querying Capabilities
=====================
......@@ -289,11 +293,6 @@ To start or stop the frame buffer overlay applications call the
:ref:`VIDIOC_OVERLAY` ioctl.
.. [#f1]
A common application of two file descriptors is the XFree86
:ref:`Xv/V4L <xvideo>` interface driver and a V4L2 application.
While the X server controls video overlay, the application can take
advantage of memory mapping and DMA.
In the opinion of the designers of this API, no driver writer taking
the efforts to support simultaneous capturing and overlay will
restrict this ability by requiring a single file descriptor, as in
......
Documentation/userspace-api/media/v4l/dev-raw-vbi.rst
View file @ 3aa139aa
......@@ -97,7 +97,7 @@ VBI devices must implement both the :ref:`VIDIOC_G_FMT <VIDIOC_G_FMT>` and
and always returns default parameters as :ref:`VIDIOC_G_FMT <VIDIOC_G_FMT>` does.
:ref:`VIDIOC_TRY_FMT <VIDIOC_G_FMT>` is optional.
.. tabularcolumns:: |p{1.6cm}|p{4.2cm}|p{11.7cm}|
.. tabularcolumns:: |p{1.6cm}|p{4.2cm}|p{11.5cm}|
.. c:type:: v4l2_vbi_format
......@@ -180,7 +180,7 @@ and always returns default parameters as :ref:`VIDIOC_G_FMT <VIDIOC_G_FMT>` does
- This array is reserved for future extensions. Drivers and
applications must set it to zero.
.. tabularcolumns:: |p{4.4cm}|p{1.5cm}|p{11.6cm}|
.. tabularcolumns:: |p{4.4cm}|p{1.5cm}|p{11.4cm}|
.. _vbifmt-flags:
......
Documentation/userspace-api/media/v4l/dev-rds.rst
View file @ 3aa139aa
......@@ -91,8 +91,6 @@ RDS datastructures
.. c:type:: v4l2_rds_data
.. tabularcolumns:: |p{2.5cm}|p{2.5cm}|p{12.5cm}|
.. flat-table:: struct v4l2_rds_data
:header-rows: 0
:stub-columns: 0
......@@ -133,7 +131,7 @@ RDS datastructures
.. _v4l2-rds-block-codes:
.. tabularcolumns:: |p{6.4cm}|p{2.0cm}|p{1.2cm}|p{7.9cm}|
.. tabularcolumns:: |p{6.4cm}|p{2.0cm}|p{1.2cm}|p{7.0cm}|
.. flat-table:: Block defines
:header-rows: 0
......
Documentation/userspace-api/media/v4l/dev-sdr.rst
View file @ 3aa139aa
......@@ -80,7 +80,7 @@ data transfer, set by the driver in order to inform application.
.. c:type:: v4l2_sdr_format
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.5cm}|
.. flat-table:: struct v4l2_sdr_format
:header-rows: 0
......
Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst
View file @ 3aa139aa
......@@ -108,7 +108,7 @@ struct v4l2_sliced_vbi_format
\scriptsize
\setlength{\tabcolsep}{2pt}
.. tabularcolumns:: |p{.85cm}|p{3.3cm}|p{4.4cm}|p{4.4cm}|p{4.4cm}|
.. tabularcolumns:: |p{.85cm}|p{3.3cm}|p{4.45cm}|p{4.45cm}|p{4.45cm}|
.. cssclass:: longtable
......@@ -213,9 +213,9 @@ Sliced VBI services
.. raw:: latex
\scriptsize
\footnotesize
.. tabularcolumns:: |p{4.1cm}|p{1.1cm}|p{2.4cm}|p{2.0cm}|p{7.3cm}|
.. tabularcolumns:: |p{4.2cm}|p{1.1cm}|p{2.1cm}|p{2.0cm}|p{6.5cm}|
.. flat-table::
:header-rows: 1
......@@ -253,13 +253,7 @@ Sliced VBI services
:ref:`en300294`
- PAL/SECAM line 23
-
::
Byte 0 1
msb lsb msb lsb
Bit 7 6 5 4 3 2 1 0 x x 13 12 11 10 9
- See :ref:`v4l2-sliced-wss-625-payload` below.
* - ``V4L2_SLICED_VBI_525``
- 0x1000
- :cspan:`2` Set of services applicable to 525 line systems.
......@@ -282,6 +276,21 @@ format while i/o is in progress (between a
:ref:`VIDIOC_STREAMOFF <VIDIOC_STREAMON>` call, and after the first
:c:func:`read()` or :c:func:`write()` call).
.. _v4l2-sliced-wss-625-payload:
V4L2_SLICED_WSS_625 payload
~~~~~~~~~~~~~~~~~~~~~~~~~~~
The payload for ``V4L2_SLICED_WSS_625`` is:
+-----+------------------+-----------------------+
|Byte | 0 | 1 |
+-----+--------+---------+-----------+-----------+
| | msb | lsb | msb | lsb |
| +-+-+-+--+--+-+-+--+--+-+--+---+---+--+-+--+
| Bit |7|6|5|4 | 3|2|1|0 | x|x|13|12 | 11|10|9|8 |
+-----+-+-+-+--+--+-+-+--+--+-+--+---+---+--+-+--+
Reading and writing sliced VBI data
===================================
......@@ -298,7 +307,7 @@ struct :c:type:`v4l2_sliced_vbi_data` elements must be zero.
struct v4l2_sliced_vbi_data
---------------------------
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}|
.. tabularcolumns:: |p{1.2cm}|p{2.2cm}|p{13.9cm}|
.. flat-table::
:header-rows: 0
......@@ -455,7 +464,7 @@ number).
struct v4l2_mpeg_vbi_fmt_ivtv
-----------------------------
.. tabularcolumns:: |p{1.0cm}|p{3.8cm}|p{1.0cm}|p{11.2cm}|
.. tabularcolumns:: |p{4.2cm}|p{2.0cm}|p{11.1cm}|
.. flat-table::
:header-rows: 0
......@@ -490,7 +499,7 @@ struct v4l2_mpeg_vbi_fmt_ivtv
Magic Constants for struct v4l2_mpeg_vbi_fmt_ivtv magic field
-------------------------------------------------------------
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}|
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.5cm}|
.. flat-table::
:header-rows: 1
......@@ -519,7 +528,11 @@ Magic Constants for struct v4l2_mpeg_vbi_fmt_ivtv magic field
structs v4l2_mpeg_vbi_itv0 and v4l2_mpeg_vbi_ITV0
-------------------------------------------------
.. tabularcolumns:: |p{5.2cm}|p{2.4cm}|p{9.9cm}|
.. raw:: latex
\footnotesize
.. tabularcolumns:: |p{4.6cm}|p{2.0cm}|p{10.7cm}|
.. flat-table::
:header-rows: 0
......@@ -560,13 +573,16 @@ structs v4l2_mpeg_vbi_itv0 and v4l2_mpeg_vbi_ITV0
one line of unspecified data that should be ignored by
applications.
.. raw:: latex
\normalsize
.. _v4l2-mpeg-vbi-itv0-1:
struct v4l2_mpeg_vbi_ITV0
-------------------------
.. tabularcolumns:: |p{5.2cm}|p{2.4cm}|p{9.9cm}|
.. tabularcolumns:: |p{5.2cm}|p{2.4cm}|p{9.7cm}|
.. flat-table::
:header-rows: 0
......@@ -587,7 +603,7 @@ struct v4l2_mpeg_vbi_ITV0
struct v4l2_mpeg_vbi_itv0_line
------------------------------
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.5cm}|
.. flat-table::
:header-rows: 0
......@@ -609,7 +625,7 @@ struct v4l2_mpeg_vbi_itv0_line
Line Identifiers for struct v4l2_mpeg_vbi_itv0_line id field
------------------------------------------------------------
.. tabularcolumns:: |p{7.0cm}|p{1.8cm}|p{8.7cm}|
.. tabularcolumns:: |p{7.0cm}|p{1.8cm}|p{8.5cm}|
.. flat-table::
:header-rows: 1
......
Documentation/userspace-api/media/v4l/dev-subdev.rst
View file @ 3aa139aa
......@@ -209,9 +209,11 @@ list entity names and pad numbers).
.. raw:: latex
\begingroup
\scriptsize
\setlength{\tabcolsep}{2pt}
.. tabularcolumns:: |p{2.0cm}|p{2.3cm}|p{2.3cm}|p{2.3cm}|p{2.3cm}|p{2.3cm}|p{2.3cm}|
.. tabularcolumns:: |p{2.0cm}|p{2.1cm}|p{2.1cm}|p{2.1cm}|p{2.1cm}|p{2.1cm}|p{2.1cm}|
.. _sample-pipeline-config:
......@@ -298,7 +300,7 @@ list entity names and pad numbers).
.. raw:: latex
\normalsize
\endgroup
1. Initial state. The sensor source pad format is set to its native 3MP
size and V4L2_MBUS_FMT_SGRBG8_1X8 media bus code. Formats on the
......
Documentation/userspace-api/media/v4l/diff-v4l.rst
View file @ 3aa139aa
......@@ -72,7 +72,11 @@ and radio devices supporting a set of related functions like video
capturing, video overlay and VBI capturing. See :ref:`open` for an
introduction.
.. tabularcolumns:: |p{5.5cm}|p{6.5cm}|p{5.5cm}
.. raw:: latex
\small
.. tabularcolumns:: |p{5.3cm}|p{6.7cm}|p{5.3cm}|
.. cssclass:: longtable
......@@ -148,6 +152,10 @@ introduction.
- ``-``
- See above.
.. raw:: latex
\normalsize
The ``audios`` field was replaced by ``capabilities`` flag
``V4L2_CAP_AUDIO``, indicating *if* the device has any audio inputs or
outputs. To determine their number applications can enumerate audio
......
Documentation/userspace-api/media/v4l/ext-ctrls-camera.rst
View file @ 3aa139aa
......@@ -32,6 +32,7 @@ enum v4l2_exposure_auto_type -
should ignore such requests. Possible values are:
.. tabularcolumns:: |p{7.1cm}|p{10.4cm}|
.. flat-table::
:header-rows: 0
......@@ -81,7 +82,7 @@ enum v4l2_exposure_metering -
Determines how the camera measures the amount of light available for
the frame exposure. Possible values are:
.. tabularcolumns:: |p{8.7cm}|p{8.8cm}|
.. tabularcolumns:: |p{8.7cm}|p{8.7cm}|
.. flat-table::
:header-rows: 0
......@@ -173,7 +174,7 @@ enum v4l2_exposure_metering -
control may stop updates of the ``V4L2_CID_AUTO_FOCUS_STATUS``
control value.
.. tabularcolumns:: |p{6.7cm}|p{10.8cm}|
.. tabularcolumns:: |p{6.8cm}|p{10.7cm}|
.. flat-table::
:header-rows: 0
......@@ -199,7 +200,7 @@ enum v4l2_exposure_metering -
enum v4l2_auto_focus_range -
Determines auto focus distance range for which lens may be adjusted.
.. tabularcolumns:: |p{6.8cm}|p{10.7cm}|
.. tabularcolumns:: |p{6.9cm}|p{10.6cm}|
.. flat-table::
:header-rows: 0
......@@ -274,7 +275,7 @@ enum v4l2_auto_n_preset_white_balance -
representation. The following white balance presets are listed in
order of increasing color temperature.
.. tabularcolumns:: |p{7.2 cm}|p{10.3cm}|
.. tabularcolumns:: |p{7.4cm}|p{10.1cm}|
.. flat-table::
:header-rows: 0
......@@ -384,7 +385,9 @@ enum v4l2_scene_mode -
\small
.. tabularcolumns:: |p{5.9cm}|p{11.5cm}|
.. tabularcolumns:: |p{5.9cm}|p{11.6cm}|
.. cssclass:: longtable
.. flat-table::
:header-rows: 0
......@@ -519,6 +522,7 @@ enum v4l2_scene_mode -
have the ``V4L2_CAMERA_ORIENTATION_EXTERNAL`` orientation.
.. tabularcolumns:: |p{7.7cm}|p{9.8cm}|
.. flat-table::
:header-rows: 0
......
Documentation/userspace-api/media/v4l/ext-ctrls-colorimetry.rst 0 → 100644
View file @ 3aa139aa
.. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
.. _colorimetry-controls:
*****************************
Colorimetry Control Reference
*****************************
The Colorimetry class includes controls for High Dynamic Range
imaging for representing colors in digital images and video. The
controls should be used for video and image encoding and decoding
as well as in HDMI receivers and transmitters.
Colorimetry Control IDs
-----------------------
.. _colorimetry-control-id:
``V4L2_CID_COLORIMETRY_CLASS (class)``
The Colorimetry class descriptor. Calling
:ref:`VIDIOC_QUERYCTRL` for this control will
return a description of this control class.
``V4L2_CID_COLORIMETRY_HDR10_CLL_INFO (struct)``
The Content Light Level defines upper bounds for the nominal target
brightness light level of the pictures.
.. c:type:: v4l2_ctrl_hdr10_cll_info
.. cssclass:: longtable
.. flat-table:: struct v4l2_ctrl_hdr10_cll_info
:header-rows: 0
:stub-columns: 0
:widths: 1 1 2
* - __u16
- ``max_content_light_level``
- The upper bound for the maximum light level among all individual
samples for the pictures of a video sequence, cd/m\ :sup:`2`.
When equal to 0 no such upper bound is present.
* - __u16
- ``max_pic_average_light_level``
- The upper bound for the maximum average light level among the
samples for any individual picture of a video sequence,
cd/m\ :sup:`2`. When equal to 0 no such upper bound is present.
``V4L2_CID_COLORIMETRY_HDR10_MASTERING_DISPLAY (struct)``
The mastering display defines the color volume (the color primaries,
white point and luminance range) of a display considered to be the
mastering display for the current video content.
.. c:type:: v4l2_ctrl_hdr10_mastering_display
.. cssclass:: longtable
.. flat-table:: struct v4l2_ctrl_hdr10_mastering_display
:header-rows: 0
:stub-columns: 0
:widths: 1 1 2
* - __u16
- ``display_primaries_x[3]``
- Specifies the normalized x chromaticity coordinate of the color
primary component c of the mastering display in increments of 0.00002.
For describing the mastering display that uses Red, Green and Blue
color primaries, index value c equal to 0 corresponds to the Green
primary, c equal to 1 corresponds to Blue primary and c equal to 2
corresponds to the Red color primary.
* - __u16
- ``display_primaries_y[3]``
- Specifies the normalized y chromaticity coordinate of the color
primary component c of the mastering display in increments of 0.00002.
For describing the mastering display that uses Red, Green and Blue
color primaries, index value c equal to 0 corresponds to the Green
primary, c equal to 1 corresponds to Blue primary and c equal to 2
corresponds to Red color primary.
* - __u16
- ``white_point_x``
- Specifies the normalized x chromaticity coordinate of the white
point of the mastering display in increments of 0.00002.
* - __u16
- ``white_point_y``
- Specifies the normalized y chromaticity coordinate of the white
point of the mastering display in increments of 0.00002.
* - __u32
- ``max_luminance``
- Specifies the nominal maximum display luminance of the mastering
display in units of 0.0001 cd/m\ :sup:`2`.
* - __u32
- ``min_luminance``
- specifies the nominal minimum display luminance of the mastering
display in units of 0.0001 cd/m\ :sup:`2`.
Documentation/userspace-api/media/v4l/ext-ctrls-dv.rst
View file @ 3aa139aa
......@@ -99,7 +99,7 @@ enum v4l2_dv_it_content_type -
or an analog source. The enum v4l2_dv_it_content_type defines
the possible content types:
.. tabularcolumns:: |p{7.3cm}|p{10.4cm}|
.. tabularcolumns:: |p{7.3cm}|p{10.2cm}|
.. flat-table::
:header-rows: 0
......
Documentation/userspace-api/media/v4l/ext-ctrls-flash.rst
View file @ 3aa139aa
......@@ -63,6 +63,7 @@ Flash Control IDs
presence of some faults. See V4L2_CID_FLASH_FAULT.
.. tabularcolumns:: |p{5.7cm}|p{11.8cm}|
.. flat-table::
:header-rows: 0
......@@ -73,14 +74,16 @@ Flash Control IDs
* - ``V4L2_FLASH_LED_MODE_FLASH``
- Flash mode.
* - ``V4L2_FLASH_LED_MODE_TORCH``
- Torch mode. See V4L2_CID_FLASH_TORCH_INTENSITY.
- Torch mode.
See V4L2_CID_FLASH_TORCH_INTENSITY.
``V4L2_CID_FLASH_STROBE_SOURCE (menu)``
Defines the source of the flash LED strobe.
.. tabularcolumns:: |p{7.5cm}|p{10.0cm}|
.. tabularcolumns:: |p{7.5cm}|p{7.5cm}|
.. flat-table::
:header-rows: 0
......
Documentation/userspace-api/media/v4l/ext-ctrls-jpeg.rst
View file @ 3aa139aa
......@@ -64,13 +64,12 @@ JPEG Control IDs
.. _jpeg-quality-control:
``V4L2_CID_JPEG_COMPRESSION_QUALITY (integer)``
``V4L2_CID_JPEG_COMPRESSION_QUALITY`` control determines trade-off
between image quality and size. It provides simpler method for
applications to control image quality, without a need for direct
reconfiguration of luminance and chrominance quantization tables. In
cases where a driver uses quantization tables configured directly by
an application, using interfaces defined elsewhere,
``V4L2_CID_JPEG_COMPRESSION_QUALITY`` control should be set by
Determines trade-off between image quality and size.
It provides simpler method for applications to control image quality,
without a need for direct reconfiguration of luminance and chrominance
quantization tables. In cases where a driver uses quantization tables
configured directly by an application, using interfaces defined
elsewhere, ``V4L2_CID_JPEG_COMPRESSION_QUALITY`` control should be set by
driver to 0.
The value range of this control is driver-specific. Only positive,
......
Documentation/userspace-api/media/v4l/field-order.rst
View file @ 3aa139aa
......@@ -62,7 +62,7 @@ enum v4l2_field
.. c:type:: v4l2_field
.. tabularcolumns:: |p{5.8cm}|p{0.6cm}|p{11.1cm}|
.. tabularcolumns:: |p{5.8cm}|p{0.6cm}|p{10.9cm}|
.. cssclass:: longtable
......
Documentation/userspace-api/media/v4l/pixfmt-compressed.rst
View file @ 3aa139aa
......@@ -7,7 +7,13 @@ Compressed Formats
.. _compressed-formats:
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}|
.. raw:: latex
\small
.. tabularcolumns:: |p{5.8cm}|p{1.2cm}|p{10.3cm}|
.. cssclass:: longtable
.. flat-table:: Compressed Image Formats
:header-rows: 1
......@@ -147,22 +153,17 @@ Compressed Formats
- ``V4L2_PIX_FMT_VP8_FRAME``
- 'VP8F'
- VP8 parsed frame, as extracted from the container.
This format is adapted for stateless video decoders that implement a
VP8 pipeline (using the :ref:`mem2mem` and :ref:`media-request-api`).
- VP8 parsed frame, including the frame header, as extracted from the container.
This format is adapted for stateless video decoders that implement an
VP8 pipeline with the :ref:`stateless_decoder`.
Metadata associated with the frame to decode is required to be passed
through the ``V4L2_CID_MPEG_VIDEO_VP8_FRAME_HEADER`` control.
See the :ref:`associated Codec Control IDs <v4l2-mpeg-vp8>`.
through the ``V4L2_CID_STATELESS_VP8_FRAME`` control.
See the :ref:`associated Codec Control IDs <v4l2-codec-stateless-vp8>`.
Exactly one output and one capture buffer must be provided for use with
this pixel format. The output buffer must contain the appropriate number
of macroblocks to decode a full corresponding frame to the matching
capture buffer.
.. note::
This format is not yet part of the public kernel API and it
is expected to change.
* .. _V4L2-PIX-FMT-VP9:
- ``V4L2_PIX_FMT_VP9``
......@@ -220,3 +221,7 @@ Compressed Formats
Metadata associated with the frame to decode is required to be passed
through the ``V4L2_CID_STATELESS_FWHT_PARAMS`` control.
See the :ref:`associated Codec Control ID <codec-stateless-fwht>`.
.. raw:: latex
\normalsize
Documentation/userspace-api/media/v4l/pixfmt-packed-yuv.rst
View file @ 3aa139aa
......@@ -36,10 +36,10 @@ Cb\ :sub:`5-0` Cr\ :sub:`4-0`], and stored in memory in two bytes,
.. raw:: latex
\begingroup
\tiny
\scriptsize
\setlength{\tabcolsep}{2pt}
.. tabularcolumns:: |p{2.5cm}|p{0.69cm}|p{0.31cm}|p{0.31cm}|p{0.31cm}|p{0.31cm}|p{0.31cm}|p{0.31cm}|p{0.31cm}|p{0.31cm}|p{0.31cm}|p{0.31cm}|p{0.31cm}|p{0.31cm}|p{0.31cm}|p{0.31cm}|p{0.31cm}|p{0.31cm}|
.. tabularcolumns:: |p{3.5cm}|p{0.96cm}|p{0.52cm}|p{0.52cm}|p{0.52cm}|p{0.52cm}|p{0.52cm}|p{0.52cm}|p{0.52cm}|p{0.52cm}|p{0.52cm}|p{0.52cm}|p{0.52cm}|p{0.52cm}|p{0.52cm}|p{0.52cm}|p{0.52cm}|p{0.52cm}|
.. flat-table:: Packed YUV 4:4:4 Image Formats (less than 8bpc)
:header-rows: 2
......@@ -220,6 +220,16 @@ the second byte and Y'\ :sub:`7-0` in the third byte.
- Y'\ :sub:`7-0`
- X\ :sub:`7-0`
* .. _V4L2-PIX-FMT-YUV24:
- ``V4L2_PIX_FMT_YUV24``
- 'YUV3'
- Y'\ :sub:`7-0`
- Cb\ :sub:`7-0`
- Cr\ :sub:`7-0`
- -\
.. note::
- The alpha component is expected to contain a meaningful value that can be
......@@ -234,6 +244,12 @@ the second byte and Y'\ :sub:`7-0` in the third byte.
These formats, commonly referred to as YUYV or YUY2, subsample the chroma
components horizontally by 2, storing 2 pixels in 4 bytes.
.. raw:: latex
\footnotesize
.. tabularcolumns:: |p{3.4cm}|p{1.2cm}|p{0.8cm}|p{0.8cm}|p{0.8cm}|p{0.8cm}|p{0.8cm}|p{0.8cm}|p{0.8cm}|p{0.8cm}|
.. flat-table:: Packed YUV 4:2:2 Formats
:header-rows: 1
:stub-columns: 0
......@@ -301,6 +317,10 @@ components horizontally by 2, storing 2 pixels in 4 bytes.
- Y'\ :sub:`3`
- Cb\ :sub:`2`
.. raw:: latex
\normalsize
**Color Sample Location:**
Chroma samples are :ref:`interstitially sited<yuv-chroma-centered>`
horizontally.
......@@ -312,6 +332,12 @@ horizontally.
This format subsamples the chroma components horizontally by 4, storing 8
pixels in 12 bytes.
.. raw:: latex
\scriptsize
.. tabularcolumns:: |p{2.9cm}|p{0.8cm}|p{0.5cm}|p{0.5cm}|p{0.5cm}|p{0.5cm}|p{0.5cm}|p{0.5cm}|p{0.5cm}|p{0.5cm}|p{0.5cm}|p{0.5cm}|p{0.5cm}|p{0.5cm}|
.. flat-table:: Packed YUV 4:1:1 Formats
:header-rows: 1
:stub-columns: 0
......@@ -348,11 +374,15 @@ pixels in 12 bytes.
- Y'\ :sub:`6`
- Y'\ :sub:`7`
.. raw:: latex
\normalsize
.. note::
Do not confuse ``V4L2_PIX_FMT_Y41P`` with
:ref:`V4L2_PIX_FMT_YUV411P <V4L2-PIX-FMT-YUV411P>`. Y41P is derived from
"YUV 4:1:1 *packed*", while YUV411P stands for "YUV 4:1:1 *planar*".
"YUV 4:1:1 **packed**", while YUV411P stands for "YUV 4:1:1 **planar**".
**Color Sample Location:**
Chroma samples are :ref:`interstitially sited<yuv-chroma-centered>`
......
Documentation/userspace-api/media/v4l/pixfmt-reserved.rst
View file @ 3aa139aa
......@@ -17,7 +17,11 @@ you think your format should be listed in a standard format section
please make a proposal on the linux-media mailing list.
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}|
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.5cm}|
.. raw:: latex
\small
.. _reserved-formats:
......@@ -256,3 +260,7 @@ please make a proposal on the linux-media mailing list.
of tiles, resulting in 32-aligned resolutions for the luminance plane
and 16-aligned resolutions for the chrominance plane (with 2x2
subsampling).
.. raw:: latex
\normalsize
Documentation/userspace-api/media/v4l/pixfmt-rgb.rst
View file @ 3aa139aa
......@@ -655,12 +655,7 @@ nomenclature that instead use the order of components as seen in a 24- or
.. raw:: latex
\begingroup
\tiny
\setlength{\tabcolsep}{2pt}
.. tabularcolumns:: |p{2.8cm}|p{2.0cm}|p{2.0cm}|p{2.0cm}|p{2.0cm}|p{2.0cm}|p{2.0cm}|p{2.0cm}|
\small
.. flat-table:: RGB Formats With 8 Bits Per Component
:header-rows: 1
......@@ -765,7 +760,7 @@ nomenclature that instead use the order of components as seen in a 24- or
.. raw:: latex
\endgroup
\normalsize
Deprecated RGB Formats
......
Documentation/userspace-api/media/v4l/pixfmt-srggb10-ipu3.rst
View file @ 3aa139aa
......@@ -9,7 +9,9 @@
V4L2_PIX_FMT_IPU3_SBGGR10 ('ip3b'), V4L2_PIX_FMT_IPU3_SGBRG10 ('ip3g'), V4L2_PIX_FMT_IPU3_SGRBG10 ('ip3G'), V4L2_PIX_FMT_IPU3_SRGGB10 ('ip3r')
**********************************************************************************************************************************************
====================
10-bit Bayer formats
====================
Description
===========
......@@ -25,7 +27,11 @@ Below is an example of a small image in V4L2_PIX_FMT_IPU3_SBGGR10 format.
**Byte Order.**
Each cell is one byte.
.. tabularcolumns:: |p{0.8cm}|p{4.0cm}|p{4.0cm}|p{4.0cm}|p{4.0cm}|
.. raw:: latex
\small
.. tabularcolumns:: |p{0.8cm}|p{3.3cm}|p{3.3cm}|p{3.3cm}|p{3.3cm}|
.. flat-table::
......@@ -333,3 +339,7 @@ Each cell is one byte.
- R\ :sub:`0323high`
- G\ :sub:`0324low`
- G\ :sub:`0324high`\ (bits 1--0)
.. raw:: latex
\normalsize
Documentation/userspace-api/media/v4l/pixfmt-srggb10p.rst
View file @ 3aa139aa
......@@ -33,7 +33,7 @@ of a small V4L2_PIX_FMT_SBGGR10P image:
**Byte Order.**
Each cell is one byte.
.. tabularcolumns:: |p{2.4cm}|p{1.4cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{6.4cm}|
.. tabularcolumns:: |p{2.4cm}|p{1.4cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{9.3cm}|
.. flat-table::
:header-rows: 0
......
Documentation/userspace-api/media/v4l/pixfmt-srggb12p.rst
View file @ 3aa139aa
......@@ -31,7 +31,7 @@ Below is an example of a small V4L2_PIX_FMT_SBGGR12P image:
**Byte Order.**
Each cell is one byte.
.. tabularcolumns:: |p{2.2cm}|p{1.2cm}|p{1.2cm}|p{3.1cm}|p{1.2cm}|p{1.2cm}|p{3.1cm}|
.. tabularcolumns:: |p{2.2cm}|p{1.2cm}|p{1.2cm}|p{3.1cm}|p{1.2cm}|p{1.2cm}|p{6.4cm}|
.. flat-table::
......
Documentation/userspace-api/media/v4l/pixfmt-srggb14.rst
View file @ 3aa139aa
......@@ -11,7 +11,9 @@ V4L2_PIX_FMT_SRGGB14 ('RG14'), V4L2_PIX_FMT_SGRBG14 ('GR14'), V4L2_PIX_FMT_SGBRG
***************************************************************************************************************************
========================================
14-bit Bayer formats expanded to 16 bits
========================================
Description
......
Documentation/userspace-api/media/v4l/pixfmt-srggb14p.rst
View file @ 3aa139aa
......@@ -36,9 +36,11 @@ Each cell is one byte.
.. raw:: latex
\begingroup
\footnotesize
\setlength{\tabcolsep}{2pt}
.. tabularcolumns:: |p{1.8cm}|p{1.0cm}|p{1.0cm}|p{1.0cm}|p{1.1cm}|p{3.3cm}|p{3.3cm}|p{3.3cm}|
.. tabularcolumns:: |p{1.6cm}|p{1.0cm}|p{1.0cm}|p{1.0cm}|p{1.0cm}|p{3.5cm}|p{3.5cm}|p{3.5cm}|
.. flat-table::
:header-rows: 0
......@@ -141,5 +143,5 @@ Each cell is one byte.
.. raw:: latex
\normalsize
\endgroup
Documentation/userspace-api/media/v4l/pixfmt-srggb16.rst
View file @ 3aa139aa
......@@ -11,7 +11,9 @@ V4L2_PIX_FMT_SRGGB16 ('RG16'), V4L2_PIX_FMT_SGRBG16 ('GR16'), V4L2_PIX_FMT_SGBRG
***************************************************************************************************************************
====================
16-bit Bayer formats
====================
Description
......
Documentation/userspace-api/media/v4l/pixfmt-srggb8.rst
View file @ 3aa139aa
......@@ -10,8 +10,9 @@ V4L2_PIX_FMT_SRGGB8 ('RGGB'), V4L2_PIX_FMT_SGRBG8 ('GRBG'), V4L2_PIX_FMT_SGBRG8
***************************************************************************************************************************
===================
8-bit Bayer formats
===================
Description
===========
......
Documentation/userspace-api/media/v4l/pixfmt-v4l2-mplane.rst
View file @ 3aa139aa
......@@ -13,7 +13,7 @@ describing all planes of that format.
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. tabularcolumns:: |p{1.4cm}|p{4.0cm}|p{11.9cm}|
.. c:type:: v4l2_plane_pix_format
......@@ -52,7 +52,7 @@ describing all planes of that format.
\small
.. tabularcolumns:: |p{4.4cm}|p{5.6cm}|p{7.5cm}|
.. tabularcolumns:: |p{4.4cm}|p{5.6cm}|p{7.3cm}|
.. c:type:: v4l2_pix_format_mplane
......
Documentation/userspace-api/media/v4l/pixfmt-v4l2.rst
View file @ 3aa139aa
......@@ -4,7 +4,7 @@
Single-planar format structure
******************************
.. tabularcolumns:: |p{4.0cm}|p{2.5cm}|p{11.0cm}|
.. tabularcolumns:: |p{4.0cm}|p{2.6cm}|p{10.7cm}|
.. c:type:: v4l2_pix_format
......@@ -205,7 +205,7 @@ Single-planar format structure
the flag V4L2_FMT_FLAG_CSC_XFER_FUNC in the corresponding struct
:c:type:`v4l2_fmtdesc` during enumeration. See :ref:`fmtdesc-flags`.
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}|
.. tabularcolumns:: |p{6.8cm}|p{2.3cm}|p{8.2cm}|
.. _format-flags:
......
Documentation/userspace-api/media/v4l/pixfmt-yuv-luma.rst
View file @ 3aa139aa
......@@ -19,6 +19,12 @@ are often referred to as greyscale formats.
- `0` denotes padding bits set to 0.
.. raw:: latex
\scriptsize
.. tabularcolumns:: |p{3.6cm}|p{3.0cm}|p{1.3cm}|p{2.6cm}|p{1.3cm}|p{1.3cm}|p{1.3cm}|
.. flat-table:: Luma-Only Image Formats
:header-rows: 1
:stub-columns: 0
......@@ -119,6 +125,10 @@ are often referred to as greyscale formats.
- ...
- ...
.. raw:: latex
\normalsize
.. note::
For the Y16 and Y16_BE formats, the actual sampling precision may be lower
......
Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst
View file @ 3aa139aa
......@@ -48,6 +48,12 @@ relationship between the luma and chroma line padding and stride.
All components are stored with the same number of bits per component.
.. raw:: latex
\footnotesize
.. tabularcolumns:: |p{5.2cm}|p{1.0cm}|p{1.5cm}|p{1.9cm}|p{1.2cm}|p{1.8cm}|p{2.7cm}|
.. flat-table:: Overview of Semi-Planar YUV Formats
:header-rows: 1
:stub-columns: 0
......@@ -146,12 +152,14 @@ All components are stored with the same number of bits per component.
- Yes
- Linear
.. note::
.. raw:: latex
\normalsize
.. [1] Order of chroma samples in the second plane
.. [2] Indicates if planes have to be contiguous in memory or can be
disjoint
.. [3] Macroblock size in pixels
.. [1] Order of chroma samples in the second plane
.. [2] Indicates if planes have to be contiguous in memory or can be
disjoint
.. [3] Macroblock size in pixels
**Color Sample Location:**
......@@ -481,6 +489,12 @@ relationship between the luma and chroma line padding and stride.
All components are stored with the same number of bits per component.
.. raw:: latex
\small
.. tabularcolumns:: |p{5.0cm}|p{1.1cm}|p{1.5cm}|p{2.2cm}|p{1.2cm}|p{3.7cm}|
.. flat-table:: Overview of Fully Planar YUV Formats
:header-rows: 1
:stub-columns: 0
......@@ -565,11 +579,13 @@ All components are stored with the same number of bits per component.
- Y, Cr, Cb
- No
.. note::
.. raw:: latex
\normalsize
.. [4] Order of luma and chroma planes
.. [5] Indicates if planes have to be contiguous in memory or can be
disjoint
.. [4] Order of luma and chroma planes
.. [5] Indicates if planes have to be contiguous in memory or can be
disjoint
**Color Sample Location:**
......
Documentation/userspace-api/media/v4l/subdev-formats.rst
View file @ 3aa139aa
......@@ -5,10 +5,12 @@
Media Bus Formats
=================
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
.. c:type:: v4l2_mbus_framefmt
.. tabularcolumns:: |p{2.0cm}|p{4.0cm}|p{11.3cm}|
.. cssclass:: longtable
.. flat-table:: struct v4l2_mbus_framefmt
:header-rows: 0
:stub-columns: 0
......@@ -113,6 +115,8 @@ Media Bus Formats
.. _v4l2-mbus-framefmt-flags:
.. tabularcolumns:: |p{6.5cm}|p{1.6cm}|p{9.2cm}|
.. flat-table:: v4l2_mbus_framefmt Flags
:header-rows: 0
:stub-columns: 0
......@@ -204,7 +208,7 @@ The following tables list existing packed RGB formats.
.. it switches to long table, and there's no way to override it.
.. tabularcolumns:: |p{4.0cm}|p{0.7cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|
.. tabularcolumns:: |p{5.0cm}|p{0.7cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|
.. _v4l2-mbus-pixelcode-rgb:
......@@ -1567,8 +1571,8 @@ The following tables list existing packed RGB formats.
- MEDIA_BUS_FMT_RGB101010_1X30
- 0x1018
-
- 0
- 0
-
-
- r\ :sub:`9`
- r\ :sub:`8`
- r\ :sub:`7`
......@@ -1890,7 +1894,7 @@ JEIDA defined bit mapping will be named
.. raw:: latex
\tiny
\small
.. _v4l2-mbus-pixelcode-rgb-lvds:
......@@ -2152,7 +2156,7 @@ organization is given as an example for the first pixel only.
\tiny
\setlength{\tabcolsep}{2pt}
.. tabularcolumns:: |p{4.0cm}|p{0.7cm}|p{0.3cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|
.. tabularcolumns:: |p{6.0cm}|p{0.7cm}|p{0.3cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|
.. _v4l2-mbus-pixelcode-bayer:
......@@ -3005,7 +3009,7 @@ the following codes.
\tiny
\setlength{\tabcolsep}{2pt}
.. tabularcolumns:: |p{4.0cm}|p{0.7cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|
.. tabularcolumns:: |p{5.0cm}|p{0.7cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|
.. _v4l2-mbus-pixelcode-yuv8:
......@@ -7210,7 +7214,7 @@ The following table list existing packed 36bit wide YUV formats.
\tiny
\setlength{\tabcolsep}{2pt}
.. tabularcolumns:: |p{4.0cm}|p{0.7cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|
.. tabularcolumns:: |p{4.1cm}|p{0.7cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|
.. _v4l2-mbus-pixelcode-yuv8-36bit:
......@@ -7398,7 +7402,7 @@ The following table list existing packed 48bit wide YUV formats.
\tiny
\setlength{\tabcolsep}{2pt}
.. tabularcolumns:: |p{4.0cm}|p{0.7cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|
.. tabularcolumns:: |p{5.6cm}|p{0.7cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|
.. _v4l2-mbus-pixelcode-yuv8-48bit:
......@@ -7851,7 +7855,7 @@ The following table lists existing JPEG compressed formats.
.. _v4l2-mbus-pixelcode-jpeg:
.. tabularcolumns:: |p{6.0cm}|p{1.4cm}|p{10.1cm}|
.. tabularcolumns:: |p{6.0cm}|p{1.4cm}|p{9.9cm}|
.. flat-table:: JPEG Formats
:header-rows: 1
......@@ -7884,7 +7888,7 @@ formats.
.. _v4l2-mbus-pixelcode-vendor-specific:
.. tabularcolumns:: |p{8.0cm}|p{1.4cm}|p{7.7cm}|
.. tabularcolumns:: |p{8.0cm}|p{1.4cm}|p{7.9cm}|
.. flat-table:: Vendor and device specific formats
:header-rows: 1
......@@ -7909,7 +7913,7 @@ This section lists all metadata formats.
The following table lists the existing metadata formats.
.. tabularcolumns:: |p{8.0cm}|p{1.4cm}|p{7.7cm}|
.. tabularcolumns:: |p{8.0cm}|p{1.4cm}|p{7.9cm}|
.. flat-table:: Metadata formats
:header-rows: 1
......
Documentation/userspace-api/media/v4l/v4l2-selection-flags.rst
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......@@ -6,10 +6,16 @@
Selection flags
***************
.. tabularcolumns:: |p{5.2cm}|p{2.0cm}|p{6.5cm}|p{1.2cm}|p{1.6cm}|
.. _v4l2-selection-flags-table:
.. raw:: latex
\small
.. tabularcolumns:: |p{5.6cm}|p{2.0cm}|p{6.5cm}|p{1.2cm}|p{1.2cm}|
.. cssclass:: longtable
.. flat-table:: Selection flag definitions
:header-rows: 1
:stub-columns: 0
......@@ -42,3 +48,7 @@ Selection flags
inside the subdevice to all further processing steps.
- No
- Yes
.. raw:: latex
\normalsize
Documentation/userspace-api/media/v4l/v4l2-selection-targets.rst
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......@@ -12,7 +12,13 @@ of the two interfaces they are used.
.. _v4l2-selection-targets-table:
.. tabularcolumns:: |p{6.0cm}|p{1.4cm}|p{7.4cm}|p{1.2cm}|p{1.4cm}|
.. raw:: latex
\small
.. tabularcolumns:: |p{6.2cm}|p{1.4cm}|p{7.3cm}|p{1.2cm}|p{0.8cm}|
.. cssclass:: longtable
.. flat-table:: Selection target definitions
:header-rows: 1
......@@ -69,3 +75,7 @@ of the two interfaces they are used.
modified by hardware.
- Yes
- No
.. raw:: latex
\normalsize
Documentation/userspace-api/media/v4l/vbi_525.svg
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......@@ -14,7 +14,7 @@
xml:space="preserve"
width="208.73068mm"
height="51.395489mm"
viewBox="0 0 739.59691 182.11"
viewBox="0 0 788.90338 194.25067"
sodipodi:docname="vbi_525.svg"><sodipodi:namedview
pagecolor="#ffffff"
bordercolor="#666666"
......@@ -25,7 +25,7 @@
inkscape:pageopacity="0"
inkscape:pageshadow="2"
inkscape:window-width="1920"
inkscape:window-height="997"
inkscape:window-height="1000"
id="namedview4"
showgrid="false"
fit-margin-top="0"
......
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