Commit 3bc3e3da authored by Lucas Tanure's avatar Lucas Tanure Committed by Mark Brown

ASoC: cs35l41: Create shared function for setting channels

ASoC and HDA will use the same register to set channels
for the device
Signed-off-by: default avatarLucas Tanure <tanureal@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20211217115708.882525-6-tanureal@opensource.cirrus.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 8b227860
......@@ -764,5 +764,8 @@ extern struct regmap_config cs35l41_regmap_spi;
int cs35l41_otp_unpack(struct device *dev, struct regmap *regmap);
int cs35l41_register_errata_patch(struct device *dev, struct regmap *reg, unsigned int reg_revid);
int cs35l41_set_channels(struct device *dev, struct regmap *reg,
unsigned int tx_num, unsigned int *tx_slot,
unsigned int rx_num, unsigned int *rx_slot);
#endif /* __CS35L41_H */
......@@ -934,6 +934,38 @@ int cs35l41_register_errata_patch(struct device *dev, struct regmap *reg, unsign
}
EXPORT_SYMBOL_GPL(cs35l41_register_errata_patch);
int cs35l41_set_channels(struct device *dev, struct regmap *reg,
unsigned int tx_num, unsigned int *tx_slot,
unsigned int rx_num, unsigned int *rx_slot)
{
unsigned int val, mask;
int i;
if (tx_num > 4 || rx_num > 2)
return -EINVAL;
val = 0;
mask = 0;
for (i = 0; i < rx_num; i++) {
dev_dbg(dev, "rx slot %d position = %d\n", i, rx_slot[i]);
val |= rx_slot[i] << (i * 8);
mask |= 0x3F << (i * 8);
}
regmap_update_bits(reg, CS35L41_SP_FRAME_RX_SLOT, mask, val);
val = 0;
mask = 0;
for (i = 0; i < tx_num; i++) {
dev_dbg(dev, "tx slot %d position = %d\n", i, tx_slot[i]);
val |= tx_slot[i] << (i * 8);
mask |= 0x3F << (i * 8);
}
regmap_update_bits(reg, CS35L41_SP_FRAME_TX_SLOT, mask, val);
return 0;
}
EXPORT_SYMBOL_GPL(cs35l41_set_channels);
MODULE_DESCRIPTION("CS35L41 library");
MODULE_AUTHOR("David Rhodes, Cirrus Logic Inc, <david.rhodes@cirrus.com>");
MODULE_AUTHOR("Lucas Tanure, Cirrus Logic Inc, <tanureal@opensource.cirrus.com>");
......
......@@ -751,36 +751,12 @@ static const struct cs_dsp_region cs35l41_dsp1_regions[] = {
{. type = WMFW_ADSP2_YM, .base = CS35L41_DSP1_YMEM_UNPACK24_0},
};
static int cs35l41_set_channel_map(struct snd_soc_dai *dai, unsigned int tx_num,
unsigned int *tx_slot, unsigned int rx_num,
unsigned int *rx_slot)
static int cs35l41_set_channel_map(struct snd_soc_dai *dai, unsigned int tx_n,
unsigned int *tx_slot, unsigned int rx_n, unsigned int *rx_slot)
{
struct cs35l41_private *cs35l41 = snd_soc_component_get_drvdata(dai->component);
unsigned int val, mask;
int i;
if (tx_num > 4 || rx_num > 2)
return -EINVAL;
val = 0;
mask = 0;
for (i = 0; i < rx_num; i++) {
dev_dbg(cs35l41->dev, "rx slot %d position = %d\n", i, rx_slot[i]);
val |= rx_slot[i] << (i * 8);
mask |= 0x3F << (i * 8);
}
regmap_update_bits(cs35l41->regmap, CS35L41_SP_FRAME_RX_SLOT, mask, val);
val = 0;
mask = 0;
for (i = 0; i < tx_num; i++) {
dev_dbg(cs35l41->dev, "tx slot %d position = %d\n", i, tx_slot[i]);
val |= tx_slot[i] << (i * 8);
mask |= 0x3F << (i * 8);
}
regmap_update_bits(cs35l41->regmap, CS35L41_SP_FRAME_TX_SLOT, mask, val);
return 0;
return cs35l41_set_channels(cs35l41->dev, cs35l41->regmap, tx_n, tx_slot, rx_n, rx_slot);
}
static int cs35l41_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
......
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