Commit 3c47e8ae authored by Jiawen Wu's avatar Jiawen Wu Committed by David S. Miller

net: libwx: Support to receive packets in NAPI

Clean all queues associated with a q_vector, to simple receive packets
without hardware features.
Signed-off-by: default avatarJiawen Wu <jiawenwu@trustnetic.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 0ef7e159
...@@ -8,6 +8,7 @@ ...@@ -8,6 +8,7 @@
#include <linux/pci.h> #include <linux/pci.h>
#include "wx_type.h" #include "wx_type.h"
#include "wx_lib.h"
#include "wx_hw.h" #include "wx_hw.h"
static void wx_intr_disable(struct wx *wx, u64 qmask) static void wx_intr_disable(struct wx *wx, u64 qmask)
...@@ -1368,6 +1369,7 @@ static void wx_configure_rx_ring(struct wx *wx, ...@@ -1368,6 +1369,7 @@ static void wx_configure_rx_ring(struct wx *wx,
struct wx_ring *ring) struct wx_ring *ring)
{ {
u16 reg_idx = ring->reg_idx; u16 reg_idx = ring->reg_idx;
union wx_rx_desc *rx_desc;
u64 rdba = ring->dma; u64 rdba = ring->dma;
u32 rxdctl; u32 rxdctl;
...@@ -1393,11 +1395,20 @@ static void wx_configure_rx_ring(struct wx *wx, ...@@ -1393,11 +1395,20 @@ static void wx_configure_rx_ring(struct wx *wx,
wx_configure_srrctl(wx, ring); wx_configure_srrctl(wx, ring);
/* initialize rx_buffer_info */
memset(ring->rx_buffer_info, 0,
sizeof(struct wx_rx_buffer) * ring->count);
/* initialize Rx descriptor 0 */
rx_desc = WX_RX_DESC(ring, 0);
rx_desc->wb.upper.length = 0;
/* enable receive descriptor ring */ /* enable receive descriptor ring */
wr32m(wx, WX_PX_RR_CFG(reg_idx), wr32m(wx, WX_PX_RR_CFG(reg_idx),
WX_PX_RR_CFG_RR_EN, WX_PX_RR_CFG_RR_EN); WX_PX_RR_CFG_RR_EN, WX_PX_RR_CFG_RR_EN);
wx_enable_rx_queue(wx, ring); wx_enable_rx_queue(wx, ring);
wx_alloc_rx_buffers(ring, wx_desc_unused(ring));
} }
/** /**
......
This diff is collapsed.
...@@ -7,6 +7,10 @@ ...@@ -7,6 +7,10 @@
#ifndef _WX_LIB_H_ #ifndef _WX_LIB_H_
#define _WX_LIB_H_ #define _WX_LIB_H_
void wx_alloc_rx_buffers(struct wx_ring *rx_ring, u16 cleaned_count);
u16 wx_desc_unused(struct wx_ring *ring);
void wx_napi_enable_all(struct wx *wx);
void wx_napi_disable_all(struct wx *wx);
void wx_reset_interrupt_capability(struct wx *wx); void wx_reset_interrupt_capability(struct wx *wx);
void wx_clear_interrupt_scheme(struct wx *wx); void wx_clear_interrupt_scheme(struct wx *wx);
int wx_init_interrupt_scheme(struct wx *wx); int wx_init_interrupt_scheme(struct wx *wx);
...@@ -16,7 +20,10 @@ int wx_setup_isb_resources(struct wx *wx); ...@@ -16,7 +20,10 @@ int wx_setup_isb_resources(struct wx *wx);
void wx_free_isb_resources(struct wx *wx); void wx_free_isb_resources(struct wx *wx);
u32 wx_misc_isb(struct wx *wx, enum wx_isb_idx idx); u32 wx_misc_isb(struct wx *wx, enum wx_isb_idx idx);
void wx_configure_vectors(struct wx *wx); void wx_configure_vectors(struct wx *wx);
void wx_clean_all_rx_rings(struct wx *wx);
void wx_free_resources(struct wx *wx); void wx_free_resources(struct wx *wx);
int wx_setup_resources(struct wx *wx); int wx_setup_resources(struct wx *wx);
void wx_get_stats64(struct net_device *netdev,
struct rtnl_link_stats64 *stats);
#endif /* _NGBE_LIB_H_ */ #endif /* _NGBE_LIB_H_ */
...@@ -311,8 +311,15 @@ ...@@ -311,8 +311,15 @@
#define WX_RX_BUFSZ WX_RXBUFFER_2K #define WX_RX_BUFSZ WX_RXBUFFER_2K
#endif #endif
#define WX_RX_BUFFER_WRITE 16 /* Must be power of 2 */
#define WX_CFG_PORT_ST 0x14404 #define WX_CFG_PORT_ST 0x14404
/******************* Receive Descriptor bit definitions **********************/
#define WX_RXD_STAT_DD BIT(0) /* Done */
#define WX_RXD_STAT_EOP BIT(1) /* End of Packet */
#define WX_RXD_ERR_RXE BIT(29) /* Any MAC Error */
/* Host Interface Command Structures */ /* Host Interface Command Structures */
struct wx_hic_hdr { struct wx_hic_hdr {
u8 cmd; u8 cmd;
...@@ -433,6 +440,15 @@ enum wx_reset_type { ...@@ -433,6 +440,15 @@ enum wx_reset_type {
WX_GLOBAL_RESET WX_GLOBAL_RESET
}; };
struct wx_cb {
dma_addr_t dma;
u16 append_cnt; /* number of skb's appended */
bool page_released;
bool dma_released;
};
#define WX_CB(skb) ((struct wx_cb *)(skb)->cb)
/* Transmit Descriptor */ /* Transmit Descriptor */
union wx_tx_desc { union wx_tx_desc {
struct { struct {
...@@ -478,6 +494,9 @@ union wx_rx_desc { ...@@ -478,6 +494,9 @@ union wx_rx_desc {
} wb; /* writeback */ } wb; /* writeback */
}; };
#define WX_RX_DESC(R, i) \
(&(((union wx_rx_desc *)((R)->desc))[i]))
/* wrapper around a pointer to a socket buffer, /* wrapper around a pointer to a socket buffer,
* so a DMA handle can be stored along with the buffer * so a DMA handle can be stored along with the buffer
*/ */
...@@ -496,6 +515,12 @@ struct wx_rx_buffer { ...@@ -496,6 +515,12 @@ struct wx_rx_buffer {
dma_addr_t page_dma; dma_addr_t page_dma;
struct page *page; struct page *page;
unsigned int page_offset; unsigned int page_offset;
u16 pagecnt_bias;
};
struct wx_queue_stats {
u64 packets;
u64 bytes;
}; };
/* iterator for handling rings in ring container */ /* iterator for handling rings in ring container */
...@@ -504,6 +529,8 @@ struct wx_rx_buffer { ...@@ -504,6 +529,8 @@ struct wx_rx_buffer {
struct wx_ring_container { struct wx_ring_container {
struct wx_ring *ring; /* pointer to linked list of rings */ struct wx_ring *ring; /* pointer to linked list of rings */
unsigned int total_bytes; /* total bytes processed this int */
unsigned int total_packets; /* total packets processed this int */
u8 count; /* total number of rings in vector */ u8 count; /* total number of rings in vector */
u8 itr; /* current ITR setting for ring */ u8 itr; /* current ITR setting for ring */
}; };
...@@ -531,6 +558,12 @@ struct wx_ring { ...@@ -531,6 +558,12 @@ struct wx_ring {
* associated with this ring, which is * associated with this ring, which is
* different for DCB and RSS modes * different for DCB and RSS modes
*/ */
u16 next_to_use;
u16 next_to_clean;
u16 next_to_alloc;
struct wx_queue_stats stats;
struct u64_stats_sync syncp;
} ____cacheline_internodealigned_in_smp; } ____cacheline_internodealigned_in_smp;
struct wx_q_vector { struct wx_q_vector {
...@@ -632,6 +665,7 @@ struct wx { ...@@ -632,6 +665,7 @@ struct wx {
}; };
#define WX_INTR_ALL (~0ULL) #define WX_INTR_ALL (~0ULL)
#define WX_INTR_Q(i) BIT(i)
/* register operations */ /* register operations */
#define wr32(a, reg, value) writel((value), ((a)->hw_addr + (reg))) #define wr32(a, reg, value) writel((value), ((a)->hw_addr + (reg)))
......
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