Commit 3f180427 authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Matthias Brugger

arm64: dts: mediatek: mt2712e: Add mediatek, infracfg phandle for IOMMU

The IOMMU driver now looks for the "mediatek,infracfg" phandle as a
new way to retrieve a syscon to that:
even though the old way is retained, it has been deprecated and the
driver will write a message in kmsg advertising to use the phandle
way instead.

For this reason, assign the right phandle to mediatek,infracfg in
the iommu node.
Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarMiles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220616110830.26037-5-angelogioacchino.delregno@collabora.comSigned-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 7b06e86e
...@@ -329,6 +329,7 @@ iommu0: iommu@10205000 { ...@@ -329,6 +329,7 @@ iommu0: iommu@10205000 {
interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_LOW>; interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_LOW>;
clocks = <&infracfg CLK_INFRA_M4U>; clocks = <&infracfg CLK_INFRA_M4U>;
clock-names = "bclk"; clock-names = "bclk";
mediatek,infracfg = <&infracfg>;
mediatek,larbs = <&larb0>, <&larb1>, <&larb2>, mediatek,larbs = <&larb0>, <&larb1>, <&larb2>,
<&larb3>, <&larb6>; <&larb3>, <&larb6>;
#iommu-cells = <1>; #iommu-cells = <1>;
...@@ -346,6 +347,7 @@ iommu1: iommu@1020a000 { ...@@ -346,6 +347,7 @@ iommu1: iommu@1020a000 {
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_LOW>; interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_LOW>;
clocks = <&infracfg CLK_INFRA_M4U>; clocks = <&infracfg CLK_INFRA_M4U>;
clock-names = "bclk"; clock-names = "bclk";
mediatek,infracfg = <&infracfg>;
mediatek,larbs = <&larb4>, <&larb5>, <&larb7>; mediatek,larbs = <&larb4>, <&larb5>, <&larb7>;
#iommu-cells = <1>; #iommu-cells = <1>;
}; };
......
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