Commit 3f2e924b authored by Bastian Hecht's avatar Bastian Hecht Committed by David Woodhouse

mtd: sh_flctl: Add FLHOLDCR register

Add a register used in new FLCTL hardware and a feature flag for it.
Signed-off-by: default avatarBastian Hecht <hechtb@gmail.com>
Acked-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
parent 0b3f0d12
...@@ -693,6 +693,8 @@ static void flctl_select_chip(struct mtd_info *mtd, int chipnr) ...@@ -693,6 +693,8 @@ static void flctl_select_chip(struct mtd_info *mtd, int chipnr)
case 0: case 0:
flctl->flcmncr_base |= CE0_ENABLE; flctl->flcmncr_base |= CE0_ENABLE;
writel(flctl->flcmncr_base, FLCMNCR(flctl)); writel(flctl->flcmncr_base, FLCMNCR(flctl));
if (flctl->holden)
writel(HOLDEN, FLHOLDCR(flctl));
break; break;
default: default:
BUG(); BUG();
...@@ -849,6 +851,7 @@ static int __devinit flctl_probe(struct platform_device *pdev) ...@@ -849,6 +851,7 @@ static int __devinit flctl_probe(struct platform_device *pdev)
flctl->pdev = pdev; flctl->pdev = pdev;
flctl->flcmncr_base = pdata->flcmncr_val; flctl->flcmncr_base = pdata->flcmncr_val;
flctl->hwecc = pdata->has_hwecc; flctl->hwecc = pdata->has_hwecc;
flctl->holden = pdata->use_holden;
nand->options = NAND_NO_AUTOINCR; nand->options = NAND_NO_AUTOINCR;
......
...@@ -38,6 +38,7 @@ ...@@ -38,6 +38,7 @@
#define FLDTFIFO(f) (f->reg + 0x24) #define FLDTFIFO(f) (f->reg + 0x24)
#define FLECFIFO(f) (f->reg + 0x28) #define FLECFIFO(f) (f->reg + 0x28)
#define FLTRCR(f) (f->reg + 0x2C) #define FLTRCR(f) (f->reg + 0x2C)
#define FLHOLDCR(f) (f->reg + 0x38)
#define FL4ECCRESULT0(f) (f->reg + 0x80) #define FL4ECCRESULT0(f) (f->reg + 0x80)
#define FL4ECCRESULT1(f) (f->reg + 0x84) #define FL4ECCRESULT1(f) (f->reg + 0x84)
#define FL4ECCRESULT2(f) (f->reg + 0x88) #define FL4ECCRESULT2(f) (f->reg + 0x88)
...@@ -109,6 +110,15 @@ ...@@ -109,6 +110,15 @@
#define TRSTRT (0x1 << 0) /* translation start */ #define TRSTRT (0x1 << 0) /* translation start */
#define TREND (0x1 << 1) /* translation end */ #define TREND (0x1 << 1) /* translation end */
/*
* FLHOLDCR control bits
*
* HOLDEN: Bus Occupancy Enable (inverted)
* Enable this bit when the external bus might be used in between transfers.
* If not set and the bus gets used by other modules, a deadlock occurs.
*/
#define HOLDEN (0x1 << 0)
/* FL4ECCCR control bits */ /* FL4ECCCR control bits */
#define _4ECCFA (0x1 << 2) /* 4 symbols correct fault */ #define _4ECCFA (0x1 << 2) /* 4 symbols correct fault */
#define _4ECCEND (0x1 << 1) /* 4 symbols end */ #define _4ECCEND (0x1 << 1) /* 4 symbols end */
...@@ -138,6 +148,7 @@ struct sh_flctl { ...@@ -138,6 +148,7 @@ struct sh_flctl {
unsigned page_size:1; /* NAND page size (0 = 512, 1 = 2048) */ unsigned page_size:1; /* NAND page size (0 = 512, 1 = 2048) */
unsigned hwecc:1; /* Hardware ECC (0 = disabled, 1 = enabled) */ unsigned hwecc:1; /* Hardware ECC (0 = disabled, 1 = enabled) */
unsigned holden:1; /* Hardware has FLHOLDCR and HOLDEN is set */
}; };
struct sh_flctl_platform_data { struct sh_flctl_platform_data {
...@@ -146,6 +157,7 @@ struct sh_flctl_platform_data { ...@@ -146,6 +157,7 @@ struct sh_flctl_platform_data {
unsigned long flcmncr_val; unsigned long flcmncr_val;
unsigned has_hwecc:1; unsigned has_hwecc:1;
unsigned use_holden:1;
}; };
static inline struct sh_flctl *mtd_to_flctl(struct mtd_info *mtdinfo) static inline struct sh_flctl *mtd_to_flctl(struct mtd_info *mtdinfo)
......
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