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Commit 40fd9090 authored by Nevenko Stupar's avatar Nevenko Stupar Committed by Alex Deucher
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drm/amd/display:Use Pixel clock in 100Hz units for HDMI Audio wall clock DTO 

[Why]
-Pass and use pixel clock in 100 Hz to Audio for HDMI
audio DTO for Audio wall clock programming so audio DTO gets
increased precision for timings with /1001 factor.
-For HDMI TMDS for N and CTS ACR tables are based on 10 KHz
units, these does not need to be modified as N and CTS values
are still valid using current tables.
Signed-off-by: default avatarNevenko Stupar <Nevenko.Stupar@amd.com>
Reviewed-by: default avatarCharlene Liu <Charlene.Liu@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7cecfe9d
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Showing with 59 additions and 59 deletions
drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
View file @ 40fd9090
...@@ -145,20 +145,20 @@ static void check_audio_bandwidth_hdmi( ...@@ -145,20 +145,20 @@ static void check_audio_bandwidth_hdmi(
if (channel_count > 2) { if (channel_count > 2) {
/* Based on HDMI spec 1.3 Table 7.5 */ /* Based on HDMI spec 1.3 Table 7.5 */
if ((crtc_info->requested_pixel_clock <= 27000) && if ((crtc_info->requested_pixel_clock_100Hz <= 270000) &&
(crtc_info->v_active <= 576) && (crtc_info->v_active <= 576) &&
!(crtc_info->interlaced) && !(crtc_info->interlaced) &&
!(crtc_info->pixel_repetition == 2 || !(crtc_info->pixel_repetition == 2 ||
crtc_info->pixel_repetition == 4)) { crtc_info->pixel_repetition == 4)) {
limit_freq_to_48_khz = true; limit_freq_to_48_khz = true;
} else if ((crtc_info->requested_pixel_clock <= 27000) && } else if ((crtc_info->requested_pixel_clock_100Hz <= 270000) &&
(crtc_info->v_active <= 576) && (crtc_info->v_active <= 576) &&
(crtc_info->interlaced) && (crtc_info->interlaced) &&
(crtc_info->pixel_repetition == 2)) { (crtc_info->pixel_repetition == 2)) {
limit_freq_to_88_2_khz = true; limit_freq_to_88_2_khz = true;
} else if ((crtc_info->requested_pixel_clock <= 54000) && } else if ((crtc_info->requested_pixel_clock_100Hz <= 540000) &&
(crtc_info->v_active <= 576) && (crtc_info->v_active <= 576) &&
!(crtc_info->interlaced)) { !(crtc_info->interlaced)) {
limit_freq_to_174_4_khz = true; limit_freq_to_174_4_khz = true;
...@@ -737,8 +737,8 @@ void dce_aud_az_configure( ...@@ -737,8 +737,8 @@ void dce_aud_az_configure(
/* search pixel clock value for Azalia HDMI Audio */ /* search pixel clock value for Azalia HDMI Audio */
static void get_azalia_clock_info_hdmi( static void get_azalia_clock_info_hdmi(
uint32_t crtc_pixel_clock_in_khz, uint32_t crtc_pixel_clock_100hz,
uint32_t actual_pixel_clock_in_khz, uint32_t actual_pixel_clock_100Hz,
struct azalia_clock_info *azalia_clock_info) struct azalia_clock_info *azalia_clock_info)
{ {
/* audio_dto_phase= 24 * 10,000; /* audio_dto_phase= 24 * 10,000;
...@@ -749,11 +749,11 @@ static void get_azalia_clock_info_hdmi( ...@@ -749,11 +749,11 @@ static void get_azalia_clock_info_hdmi(
/* audio_dto_module = PCLKFrequency * 10,000; /* audio_dto_module = PCLKFrequency * 10,000;
* [khz] -> [100Hz] */ * [khz] -> [100Hz] */
azalia_clock_info->audio_dto_module = azalia_clock_info->audio_dto_module =
actual_pixel_clock_in_khz * 10; actual_pixel_clock_100Hz;
} }
static void get_azalia_clock_info_dp( static void get_azalia_clock_info_dp(
uint32_t requested_pixel_clock_in_khz, uint32_t requested_pixel_clock_100Hz,
const struct audio_pll_info *pll_info, const struct audio_pll_info *pll_info,
struct azalia_clock_info *azalia_clock_info) struct azalia_clock_info *azalia_clock_info)
{ {
...@@ -792,15 +792,15 @@ void dce_aud_wall_dto_setup( ...@@ -792,15 +792,15 @@ void dce_aud_wall_dto_setup(
/* calculate DTO settings */ /* calculate DTO settings */
get_azalia_clock_info_hdmi( get_azalia_clock_info_hdmi(
crtc_info->requested_pixel_clock, crtc_info->requested_pixel_clock_100Hz,
crtc_info->calculated_pixel_clock, crtc_info->calculated_pixel_clock_100Hz,
&clock_info); &clock_info);
DC_LOG_HW_AUDIO("\n%s:Input::requested_pixel_clock = %d"\ DC_LOG_HW_AUDIO("\n%s:Input::requested_pixel_clock_100Hz = %d"\
"calculated_pixel_clock =%d\n"\ "calculated_pixel_clock_100Hz =%d\n"\
"audio_dto_module = %d audio_dto_phase =%d \n\n", __func__,\ "audio_dto_module = %d audio_dto_phase =%d \n\n", __func__,\
crtc_info->requested_pixel_clock,\ crtc_info->requested_pixel_clock_100Hz,\
crtc_info->calculated_pixel_clock,\ crtc_info->calculated_pixel_clock_100Hz,\
clock_info.audio_dto_module,\ clock_info.audio_dto_module,\
clock_info.audio_dto_phase); clock_info.audio_dto_phase);
...@@ -833,7 +833,7 @@ void dce_aud_wall_dto_setup( ...@@ -833,7 +833,7 @@ void dce_aud_wall_dto_setup(
calculate DTO settings */ calculate DTO settings */
get_azalia_clock_info_dp( get_azalia_clock_info_dp(
crtc_info->requested_pixel_clock, crtc_info->requested_pixel_clock_100Hz,
pll_info, pll_info,
&clock_info); &clock_info);
......
drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
View file @ 40fd9090
...@@ -1251,13 +1251,13 @@ static uint32_t calc_max_audio_packets_per_line( ...@@ -1251,13 +1251,13 @@ static uint32_t calc_max_audio_packets_per_line(
static void get_audio_clock_info( static void get_audio_clock_info(
enum dc_color_depth color_depth, enum dc_color_depth color_depth,
uint32_t crtc_pixel_clock_in_khz, uint32_t crtc_pixel_clock_100Hz,
uint32_t actual_pixel_clock_in_khz, uint32_t actual_pixel_clock_100Hz,
struct audio_clock_info *audio_clock_info) struct audio_clock_info *audio_clock_info)
{ {
const struct audio_clock_info *clock_info; const struct audio_clock_info *clock_info;
uint32_t index; uint32_t index;
uint32_t crtc_pixel_clock_in_10khz = crtc_pixel_clock_in_khz / 10; uint32_t crtc_pixel_clock_in_10khz = crtc_pixel_clock_100Hz / 100;
uint32_t audio_array_size; uint32_t audio_array_size;
switch (color_depth) { switch (color_depth) {
...@@ -1294,16 +1294,16 @@ static void get_audio_clock_info( ...@@ -1294,16 +1294,16 @@ static void get_audio_clock_info(
} }
/* not found */ /* not found */
if (actual_pixel_clock_in_khz == 0) if (actual_pixel_clock_100Hz == 0)
actual_pixel_clock_in_khz = crtc_pixel_clock_in_khz; actual_pixel_clock_100Hz = crtc_pixel_clock_100Hz;
/* See HDMI spec the table entry under /* See HDMI spec the table entry under
* pixel clock of "Other". */ * pixel clock of "Other". */
audio_clock_info->pixel_clock_in_10khz = audio_clock_info->pixel_clock_in_10khz =
actual_pixel_clock_in_khz / 10; actual_pixel_clock_100Hz / 100;
audio_clock_info->cts_32khz = actual_pixel_clock_in_khz; audio_clock_info->cts_32khz = actual_pixel_clock_100Hz / 10;
audio_clock_info->cts_44khz = actual_pixel_clock_in_khz; audio_clock_info->cts_44khz = actual_pixel_clock_100Hz / 10;
audio_clock_info->cts_48khz = actual_pixel_clock_in_khz; audio_clock_info->cts_48khz = actual_pixel_clock_100Hz / 10;
audio_clock_info->n_32khz = 4096; audio_clock_info->n_32khz = 4096;
audio_clock_info->n_44khz = 6272; audio_clock_info->n_44khz = 6272;
...@@ -1369,14 +1369,14 @@ static void dce110_se_setup_hdmi_audio( ...@@ -1369,14 +1369,14 @@ static void dce110_se_setup_hdmi_audio(
/* Program audio clock sample/regeneration parameters */ /* Program audio clock sample/regeneration parameters */
get_audio_clock_info(crtc_info->color_depth, get_audio_clock_info(crtc_info->color_depth,
crtc_info->requested_pixel_clock, crtc_info->requested_pixel_clock_100Hz,
crtc_info->calculated_pixel_clock, crtc_info->calculated_pixel_clock_100Hz,
&audio_clock_info); &audio_clock_info);
DC_LOG_HW_AUDIO( DC_LOG_HW_AUDIO(
"\n%s:Input::requested_pixel_clock = %d" \ "\n%s:Input::requested_pixel_clock_100Hz = %d" \
"calculated_pixel_clock = %d \n", __func__, \ "calculated_pixel_clock_100Hz = %d \n", __func__, \
crtc_info->requested_pixel_clock, \ crtc_info->requested_pixel_clock_100Hz, \
crtc_info->calculated_pixel_clock); crtc_info->calculated_pixel_clock_100Hz);
/* HDMI_ACR_32_0__HDMI_ACR_CTS_32_MASK */ /* HDMI_ACR_32_0__HDMI_ACR_CTS_32_MASK */
REG_UPDATE(HDMI_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz); REG_UPDATE(HDMI_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz);
......
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
View file @ 40fd9090
...@@ -1162,27 +1162,27 @@ static void build_audio_output( ...@@ -1162,27 +1162,27 @@ static void build_audio_output(
stream->timing.flags.INTERLACE; stream->timing.flags.INTERLACE;
audio_output->crtc_info.refresh_rate = audio_output->crtc_info.refresh_rate =
(stream->timing.pix_clk_100hz*10000)/ (stream->timing.pix_clk_100hz*100)/
(stream->timing.h_total*stream->timing.v_total); (stream->timing.h_total*stream->timing.v_total);
audio_output->crtc_info.color_depth = audio_output->crtc_info.color_depth =
stream->timing.display_color_depth; stream->timing.display_color_depth;
audio_output->crtc_info.requested_pixel_clock = audio_output->crtc_info.requested_pixel_clock_100Hz =
pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz / 10; pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz;
audio_output->crtc_info.calculated_pixel_clock = audio_output->crtc_info.calculated_pixel_clock_100Hz =
pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz / 10; pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz;
/*for HDMI, audio ACR is with deep color ratio factor*/ /*for HDMI, audio ACR is with deep color ratio factor*/
if (dc_is_hdmi_signal(pipe_ctx->stream->signal) && if (dc_is_hdmi_signal(pipe_ctx->stream->signal) &&
audio_output->crtc_info.requested_pixel_clock == audio_output->crtc_info.requested_pixel_clock_100Hz ==
(stream->timing.pix_clk_100hz / 10)) { (stream->timing.pix_clk_100hz)) {
if (pipe_ctx->stream_res.pix_clk_params.pixel_encoding == PIXEL_ENCODING_YCBCR420) { if (pipe_ctx->stream_res.pix_clk_params.pixel_encoding == PIXEL_ENCODING_YCBCR420) {
audio_output->crtc_info.requested_pixel_clock = audio_output->crtc_info.requested_pixel_clock_100Hz =
audio_output->crtc_info.requested_pixel_clock/2; audio_output->crtc_info.requested_pixel_clock_100Hz/2;
audio_output->crtc_info.calculated_pixel_clock = audio_output->crtc_info.calculated_pixel_clock_100Hz =
pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz/20; pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz/2;
} }
} }
......
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
View file @ 40fd9090
...@@ -1196,13 +1196,13 @@ static union audio_cea_channels speakers_to_channels( ...@@ -1196,13 +1196,13 @@ static union audio_cea_channels speakers_to_channels(
void get_audio_clock_info( void get_audio_clock_info(
enum dc_color_depth color_depth, enum dc_color_depth color_depth,
uint32_t crtc_pixel_clock_in_khz, uint32_t crtc_pixel_clock_100Hz,
uint32_t actual_pixel_clock_in_khz, uint32_t actual_pixel_clock_100Hz,
struct audio_clock_info *audio_clock_info) struct audio_clock_info *audio_clock_info)
{ {
const struct audio_clock_info *clock_info; const struct audio_clock_info *clock_info;
uint32_t index; uint32_t index;
uint32_t crtc_pixel_clock_in_10khz = crtc_pixel_clock_in_khz / 10; uint32_t crtc_pixel_clock_in_10khz = crtc_pixel_clock_100Hz / 100;
uint32_t audio_array_size; uint32_t audio_array_size;
switch (color_depth) { switch (color_depth) {
...@@ -1239,16 +1239,16 @@ void get_audio_clock_info( ...@@ -1239,16 +1239,16 @@ void get_audio_clock_info(
} }
/* not found */ /* not found */
if (actual_pixel_clock_in_khz == 0) if (actual_pixel_clock_100Hz == 0)
actual_pixel_clock_in_khz = crtc_pixel_clock_in_khz; actual_pixel_clock_100Hz = crtc_pixel_clock_100Hz;
/* See HDMI spec the table entry under /* See HDMI spec the table entry under
* pixel clock of "Other". */ * pixel clock of "Other". */
audio_clock_info->pixel_clock_in_10khz = audio_clock_info->pixel_clock_in_10khz =
actual_pixel_clock_in_khz / 10; actual_pixel_clock_100Hz / 100;
audio_clock_info->cts_32khz = actual_pixel_clock_in_khz; audio_clock_info->cts_32khz = actual_pixel_clock_100Hz / 10;
audio_clock_info->cts_44khz = actual_pixel_clock_in_khz; audio_clock_info->cts_44khz = actual_pixel_clock_100Hz / 10;
audio_clock_info->cts_48khz = actual_pixel_clock_in_khz; audio_clock_info->cts_48khz = actual_pixel_clock_100Hz / 10;
audio_clock_info->n_32khz = 4096; audio_clock_info->n_32khz = 4096;
audio_clock_info->n_44khz = 6272; audio_clock_info->n_44khz = 6272;
...@@ -1308,14 +1308,14 @@ static void enc1_se_setup_hdmi_audio( ...@@ -1308,14 +1308,14 @@ static void enc1_se_setup_hdmi_audio(
/* Program audio clock sample/regeneration parameters */ /* Program audio clock sample/regeneration parameters */
get_audio_clock_info(crtc_info->color_depth, get_audio_clock_info(crtc_info->color_depth,
crtc_info->requested_pixel_clock, crtc_info->requested_pixel_clock_100Hz,
crtc_info->calculated_pixel_clock, crtc_info->calculated_pixel_clock_100Hz,
&audio_clock_info); &audio_clock_info);
DC_LOG_HW_AUDIO( DC_LOG_HW_AUDIO(
"\n%s:Input::requested_pixel_clock = %d" \ "\n%s:Input::requested_pixel_clock_100Hz = %d" \
"calculated_pixel_clock = %d \n", __func__, \ "calculated_pixel_clock_100Hz = %d \n", __func__, \
crtc_info->requested_pixel_clock, \ crtc_info->requested_pixel_clock_100Hz, \
crtc_info->calculated_pixel_clock); crtc_info->calculated_pixel_clock_100Hz);
/* HDMI_ACR_32_0__HDMI_ACR_CTS_32_MASK */ /* HDMI_ACR_32_0__HDMI_ACR_CTS_32_MASK */
REG_UPDATE(HDMI_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz); REG_UPDATE(HDMI_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz);
......
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
View file @ 40fd9090
...@@ -605,8 +605,8 @@ void enc1_se_enable_dp_audio( ...@@ -605,8 +605,8 @@ void enc1_se_enable_dp_audio(
void get_audio_clock_info( void get_audio_clock_info(
enum dc_color_depth color_depth, enum dc_color_depth color_depth,
uint32_t crtc_pixel_clock_in_khz, uint32_t crtc_pixel_clock_100Hz,
uint32_t actual_pixel_clock_in_khz, uint32_t actual_pixel_clock_100Hz,
struct audio_clock_info *audio_clock_info); struct audio_clock_info *audio_clock_info);
#endif /* __DC_STREAM_ENCODER_DCN10_H__ */ #endif /* __DC_STREAM_ENCODER_DCN10_H__ */
drivers/gpu/drm/amd/display/include/audio_types.h
View file @ 40fd9090
...@@ -38,8 +38,8 @@ struct audio_crtc_info { ...@@ -38,8 +38,8 @@ struct audio_crtc_info {
uint32_t h_active; uint32_t h_active;
uint32_t v_active; uint32_t v_active;
uint32_t pixel_repetition; uint32_t pixel_repetition;
uint32_t requested_pixel_clock; /* in KHz */ uint32_t requested_pixel_clock_100Hz; /* in 100Hz */
uint32_t calculated_pixel_clock; /* in KHz */ uint32_t calculated_pixel_clock_100Hz; /* in 100Hz */
uint32_t refresh_rate; uint32_t refresh_rate;
enum dc_color_depth color_depth; enum dc_color_depth color_depth;
bool interlaced; bool interlaced;
......
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