Commit 43753826 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'fbdev-updates-for-3.4' of git://github.com/schandinat/linux-2.6

Pull fbdev updates for 3.4 from Florian Tobias Schandinat:
 - drivers for Samsung Exynos MIPI DSI and display port
 - i740fb to support those old Intel chips
 - large updates to OMAP, viafb and sh_mobile_lcdcfb
 - some updates to s3c-fb and udlfb, few patches to others

Fix up conflicts in drivers/video/udlfb.c due to Key Sievers' fix making
it in twice.

* tag 'fbdev-updates-for-3.4' of git://github.com/schandinat/linux-2.6: (156 commits)
  Revert "video:uvesafb: Fix oops that uvesafb try to execute NX-protected page"
  OMAPDSS: register dss drivers in module init
  video: pxafb: add clk_prepare/clk_unprepare calls
  fbdev: bfin_adv7393fb: Drop needless include
  fbdev: sh_mipi_dsi: add extra phyctrl for sh_mipi_dsi_info
  fbdev: remove dependency of FB_SH_MOBILE_MERAM from FB_SH_MOBILE_LCDC
  Revert "MAINTAINERS: add entry for exynos mipi display drivers"
  fbdev: da8xx: add support for SP10Q010 display
  fbdev: da8xx:: fix reporting of the display timing info
  drivers/video/pvr2fb.c: ensure arguments to request_irq and free_irq are compatible
  OMAPDSS: APPLY: fix clearing shadow dirty flag with manual update
  fbdev: sh_mobile_meram: Implement system suspend/resume
  fbdev: sh_mobile_meram: Remove unneeded sanity checks
  fbdev: sh_mobile_meram: Don't perform update in register operation
  arm: mach-shmobile: Constify sh_mobile_meram_cfg structures
  fbdev: sh_mobile_lcdc: Don't store copy of platform data
  fbdev: sh_mobile_meram: Remove unused sh_mobile_meram_icb_cfg fields
  arm: mach-shmobile: Don't set MERAM ICB numbers in platform data
  fbdev: sh_mobile_meram: Allocate ICBs automatically
  fbdev: sh_mobile_meram: Use genalloc to manage MERAM allocation
  ...
parents 9586c959 6bff98b4
......@@ -2257,6 +2257,15 @@ F: Documentation/filesystems/quota.txt
F: fs/quota/
F: include/linux/quota*.h
DISPLAYLINK USB 2.0 FRAMEBUFFER DRIVER (UDLFB)
M: Bernie Thompson <bernie@plugable.com>
L: linux-fbdev@vger.kernel.org
S: Maintained
W: http://plugable.com/category/projects/udlfb/
F: drivers/video/udlfb.c
F: include/video/udlfb.h
F: Documentation/fb/udlfb.txt
DISTRIBUTED LOCK MANAGER (DLM)
M: Christine Caulfield <ccaulfie@redhat.com>
M: David Teigland <teigland@redhat.com>
......@@ -2378,15 +2387,6 @@ S: Supported
F: drivers/gpu/drm/exynos
F: include/drm/exynos*
EXYNOS MIPI DISPLAY DRIVERS
M: Inki Dae <inki.dae@samsung.com>
M: Donghwa Lee <dh09.lee@samsung.com>
M: Kyungmin Park <kyungmin.park@samsung.com>
L: linux-fbdev@vger.kernel.org
S: Maintained
F: drivers/video/exynos/exynos_mipi*
F: include/video/exynos_mipi*
DSCC4 DRIVER
M: Francois Romieu <romieu@fr.zoreil.com>
L: netdev@vger.kernel.org
......@@ -2667,6 +2667,21 @@ M: Mimi Zohar <zohar@us.ibm.com>
S: Supported
F: security/integrity/evm/
EXYNOS DP DRIVER
M: Jingoo Han <jg1.han@samsung.com>
L: linux-fbdev@vger.kernel.org
S: Maintained
F: drivers/video/exynos/exynos_dp*
EXYNOS MIPI DISPLAY DRIVERS
M: Inki Dae <inki.dae@samsung.com>
M: Donghwa Lee <dh09.lee@samsung.com>
M: Kyungmin Park <kyungmin.park@samsung.com>
L: linux-fbdev@vger.kernel.org
S: Maintained
F: drivers/video/exynos/exynos_mipi*
F: include/video/exynos_mipi*
F71805F HARDWARE MONITORING DRIVER
M: Jean Delvare <khali@linux-fr.org>
L: lm-sensors@lm-sensors.org
......
......@@ -20,6 +20,7 @@
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/export.h>
#include <linux/omapfb.h>
#include <media/soc_camera.h>
......@@ -169,10 +170,6 @@ static struct omap_usb_config ams_delta_usb_config __initdata = {
.pins[0] = 2,
};
static struct omap_board_config_kernel ams_delta_config[] __initdata = {
{ OMAP_TAG_LCD, &ams_delta_lcd_config },
};
static struct resource ams_delta_nand_resources[] = {
[0] = {
.start = OMAP1_MPUIO_BASE,
......@@ -302,8 +299,6 @@ static void __init ams_delta_init(void)
omap_cfg_reg(J19_1610_CAM_D6);
omap_cfg_reg(J18_1610_CAM_D7);
omap_board_config = ams_delta_config;
omap_board_config_size = ARRAY_SIZE(ams_delta_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
......@@ -321,6 +316,8 @@ static void __init ams_delta_init(void)
ams_delta_init_fiq();
omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1);
omapfb_set_lcd_config(&ams_delta_lcd_config);
}
static struct plat_serial8250_port ams_delta_modem_ports[] = {
......
......@@ -21,6 +21,7 @@
#include <linux/mtd/physmap.h>
#include <linux/input.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
......@@ -273,27 +274,17 @@ static struct platform_device kp_device = {
.resource = kp_resources,
};
static struct platform_device lcd_device = {
.name = "lcd_p2",
.id = -1,
};
static struct platform_device *devices[] __initdata = {
&nor_device,
&nand_device,
&smc91x_device,
&kp_device,
&lcd_device,
};
static struct omap_lcd_config fsample_lcd_config = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel fsample_config[] __initdata = {
{ OMAP_TAG_LCD, &fsample_lcd_config },
};
static void __init omap_fsample_init(void)
{
/* Early, board-dependent init */
......@@ -352,10 +343,10 @@ static void __init omap_fsample_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
omap_board_config = fsample_config;
omap_board_config_size = ARRAY_SIZE(fsample_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
omapfb_set_lcd_config(&fsample_lcd_config);
}
/* Only FPGA needs to be mapped here. All others are done with ioremap */
......
......@@ -30,6 +30,7 @@
#include <linux/input.h>
#include <linux/i2c/tps65010.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
......@@ -325,18 +326,12 @@ static struct platform_device h2_irda_device = {
.resource = h2_irda_resources,
};
static struct platform_device h2_lcd_device = {
.name = "lcd_h2",
.id = -1,
};
static struct platform_device *h2_devices[] __initdata = {
&h2_nor_device,
&h2_nand_device,
&h2_smc91x_device,
&h2_irda_device,
&h2_kp_device,
&h2_lcd_device,
};
static void __init h2_init_smc91x(void)
......@@ -391,10 +386,6 @@ static struct omap_lcd_config h2_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel h2_config[] __initdata = {
{ OMAP_TAG_LCD, &h2_lcd_config },
};
static void __init h2_init(void)
{
h2_init_smc91x();
......@@ -438,13 +429,13 @@ static void __init h2_init(void)
omap_cfg_reg(N19_1610_KBR5);
platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
omap_board_config = h2_config;
omap_board_config_size = ARRAY_SIZE(h2_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, h2_i2c_board_info,
ARRAY_SIZE(h2_i2c_board_info));
omap1_usb_init(&h2_usb_config);
h2_mmc_init();
omapfb_set_lcd_config(&h2_lcd_config);
}
MACHINE_START(OMAP_H2, "TI-H2")
......
......@@ -30,6 +30,7 @@
#include <linux/spi/spi.h>
#include <linux/i2c/tps65010.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <asm/setup.h>
#include <asm/page.h>
......@@ -370,10 +371,6 @@ static struct omap_lcd_config h3_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel h3_config[] __initdata = {
{ OMAP_TAG_LCD, &h3_lcd_config },
};
static struct i2c_board_info __initdata h3_i2c_board_info[] = {
{
I2C_BOARD_INFO("tps65013", 0x48),
......@@ -426,13 +423,13 @@ static void __init h3_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
spi_register_board_info(h3_spi_board_info,
ARRAY_SIZE(h3_spi_board_info));
omap_board_config = h3_config;
omap_board_config_size = ARRAY_SIZE(h3_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, h3_i2c_board_info,
ARRAY_SIZE(h3_i2c_board_info));
omap1_usb_init(&h3_usb_config);
h3_mmc_init();
omapfb_set_lcd_config(&h3_lcd_config);
}
MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
......
......@@ -36,6 +36,7 @@
#include <linux/leds.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/omapfb.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
......@@ -398,10 +399,6 @@ static struct omap_lcd_config htcherald_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel htcherald_config[] __initdata = {
{ OMAP_TAG_LCD, &htcherald_lcd_config },
};
static struct platform_device lcd_device = {
.name = "lcd_htcherald",
.id = -1,
......@@ -580,8 +577,6 @@ static void __init htcherald_init(void)
printk(KERN_INFO "HTC Herald init.\n");
/* Do board initialization before we register all the devices */
omap_board_config = htcherald_config;
omap_board_config_size = ARRAY_SIZE(htcherald_config);
platform_add_devices(devices, ARRAY_SIZE(devices));
htcherald_disable_watchdog();
......@@ -598,6 +593,8 @@ static void __init htcherald_init(void)
htc_mmc_data[0] = &htc_mmc1_data;
omap1_init_mmc(htc_mmc_data, 1);
#endif
omapfb_set_lcd_config(&htcherald_lcd_config);
}
MACHINE_START(HERALD, "HTC Herald")
......
......@@ -25,6 +25,7 @@
#include <linux/mtd/physmap.h>
#include <linux/input.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
......@@ -370,10 +371,6 @@ static inline void innovator_mmc_init(void)
}
#endif
static struct omap_board_config_kernel innovator_config[] = {
{ OMAP_TAG_LCD, NULL },
};
static void __init innovator_init(void)
{
if (cpu_is_omap1510())
......@@ -416,17 +413,15 @@ static void __init innovator_init(void)
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap1510()) {
omap1_usb_init(&innovator1510_usb_config);
innovator_config[0].data = &innovator1510_lcd_config;
omapfb_set_lcd_config(&innovator1510_lcd_config);
}
#endif
#ifdef CONFIG_ARCH_OMAP16XX
if (cpu_is_omap1610()) {
omap1_usb_init(&h2_usb_config);
innovator_config[0].data = &innovator1610_lcd_config;
omapfb_set_lcd_config(&innovator1610_lcd_config);
}
#endif
omap_board_config = innovator_config;
omap_board_config_size = ARRAY_SIZE(innovator_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
innovator_mmc_init();
......
......@@ -31,7 +31,6 @@
#include <plat/board.h>
#include <plat/keypad.h>
#include "common.h"
#include <plat/hwa742.h>
#include <plat/lcd_mipid.h>
#include <plat/mmc.h>
#include <plat/clock.h>
......@@ -99,15 +98,16 @@ static struct mipid_platform_data nokia770_mipid_platform_data = {
.shutdown = mipid_shutdown,
};
static struct omap_lcd_config nokia770_lcd_config __initdata = {
.ctrl_name = "hwa742",
};
static void __init mipid_dev_init(void)
{
const struct omap_lcd_config *conf;
nokia770_mipid_platform_data.nreset_gpio = 13;
nokia770_mipid_platform_data.data_lines = 16;
conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
if (conf != NULL) {
nokia770_mipid_platform_data.nreset_gpio = conf->nreset_gpio;
nokia770_mipid_platform_data.data_lines = conf->data_lines;
}
omapfb_set_lcd_config(&nokia770_lcd_config);
}
static void __init ads7846_dev_init(void)
......@@ -150,14 +150,9 @@ static struct spi_board_info nokia770_spi_board_info[] __initdata = {
},
};
static struct hwa742_platform_data nokia770_hwa742_platform_data = {
.te_connected = 1,
};
static void __init hwa742_dev_init(void)
{
clk_add_alias("hwa_sys_ck", NULL, "bclk", NULL);
omapfb_set_ctrl_platform_data(&nokia770_hwa742_platform_data);
}
/* assume no Mini-AB port */
......
......@@ -34,6 +34,7 @@
#include <linux/i2c.h>
#include <linux/leds.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
......@@ -300,12 +301,6 @@ static struct omap_lcd_config osk_lcd_config __initdata = {
};
#endif
static struct omap_board_config_kernel osk_config[] __initdata = {
#ifdef CONFIG_OMAP_OSK_MISTRAL
{ OMAP_TAG_LCD, &osk_lcd_config },
#endif
};
#ifdef CONFIG_OMAP_OSK_MISTRAL
#include <linux/input.h>
......@@ -549,8 +544,6 @@ static void __init osk_init(void)
osk_flash_resource.end = osk_flash_resource.start = omap_cs3_phys();
osk_flash_resource.end += SZ_32M - 1;
platform_add_devices(osk5912_devices, ARRAY_SIZE(osk5912_devices));
omap_board_config = osk_config;
omap_board_config_size = ARRAY_SIZE(osk_config);
l = omap_readl(USB_TRANSCEIVER_CTRL);
l |= (3 << 1);
......@@ -567,6 +560,11 @@ static void __init osk_init(void)
omap_register_i2c_bus(1, 400, osk_i2c_board_info,
ARRAY_SIZE(osk_i2c_board_info));
osk_mistral_init();
#ifdef CONFIG_OMAP_OSK_MISTRAL
omapfb_set_lcd_config(&osk_lcd_config);
#endif
}
MACHINE_START(OMAP_OSK, "TI-OSK")
......
......@@ -27,6 +27,7 @@
#include <linux/spi/spi.h>
#include <linux/interrupt.h>
#include <linux/apm-emulation.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
......@@ -209,10 +210,6 @@ static struct omap_lcd_config palmte_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel palmte_config[] __initdata = {
{ OMAP_TAG_LCD, &palmte_lcd_config },
};
static struct spi_board_info palmte_spi_info[] __initdata = {
{
.modalias = "tsc2102",
......@@ -250,9 +247,6 @@ static void __init omap_palmte_init(void)
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
omap_board_config = palmte_config;
omap_board_config_size = ARRAY_SIZE(palmte_config);
platform_add_devices(palmte_devices, ARRAY_SIZE(palmte_devices));
spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info));
......@@ -260,6 +254,8 @@ static void __init omap_palmte_init(void)
omap_serial_init();
omap1_usb_init(&palmte_usb_config);
omap_register_i2c_bus(1, 100, NULL, 0);
omapfb_set_lcd_config(&palmte_lcd_config);
}
MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
......
......@@ -24,6 +24,7 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/leds.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
......@@ -273,10 +274,6 @@ static struct omap_lcd_config palmtt_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel palmtt_config[] __initdata = {
{ OMAP_TAG_LCD, &palmtt_lcd_config },
};
static void __init omap_mpu_wdt_mode(int mode) {
if (mode)
omap_writew(0x8000, OMAP_WDT_TIMER_MODE);
......@@ -298,15 +295,14 @@ static void __init omap_palmtt_init(void)
omap_mpu_wdt_mode(0);
omap_board_config = palmtt_config;
omap_board_config_size = ARRAY_SIZE(palmtt_config);
platform_add_devices(palmtt_devices, ARRAY_SIZE(palmtt_devices));
spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo));
omap_serial_init();
omap1_usb_init(&palmtt_usb_config);
omap_register_i2c_bus(1, 100, NULL, 0);
omapfb_set_lcd_config(&palmtt_lcd_config);
}
MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
......
......@@ -27,6 +27,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
......@@ -239,10 +240,6 @@ static struct omap_lcd_config palmz71_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel palmz71_config[] __initdata = {
{OMAP_TAG_LCD, &palmz71_lcd_config},
};
static irqreturn_t
palmz71_powercable(int irq, void *dev_id)
{
......@@ -313,9 +310,6 @@ omap_palmz71_init(void)
palmz71_gpio_setup(1);
omap_mpu_wdt_mode(0);
omap_board_config = palmz71_config;
omap_board_config_size = ARRAY_SIZE(palmz71_config);
platform_add_devices(devices, ARRAY_SIZE(devices));
spi_register_board_info(palmz71_boardinfo,
......@@ -324,6 +318,8 @@ omap_palmz71_init(void)
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
palmz71_gpio_setup(0);
omapfb_set_lcd_config(&palmz71_lcd_config);
}
MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
......
......@@ -21,6 +21,7 @@
#include <linux/mtd/physmap.h>
#include <linux/input.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
......@@ -232,27 +233,17 @@ static struct platform_device kp_device = {
.resource = kp_resources,
};
static struct platform_device lcd_device = {
.name = "lcd_p2",
.id = -1,
};
static struct platform_device *devices[] __initdata = {
&nor_device,
&nand_device,
&smc91x_device,
&kp_device,
&lcd_device,
};
static struct omap_lcd_config perseus2_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel perseus2_config[] __initdata = {
{ OMAP_TAG_LCD, &perseus2_lcd_config },
};
static void __init perseus2_init_smc91x(void)
{
fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
......@@ -320,10 +311,10 @@ static void __init omap_perseus2_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
omap_board_config = perseus2_config;
omap_board_config_size = ARRAY_SIZE(perseus2_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
omapfb_set_lcd_config(&perseus2_lcd_config);
}
/* Only FPGA needs to be mapped here. All others are done with ioremap */
......
......@@ -27,6 +27,7 @@
#include <linux/i2c.h>
#include <linux/errno.h>
#include <linux/export.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
......@@ -355,11 +356,6 @@ static struct omap_usb_config sx1_usb_config __initdata = {
/*----------- LCD -------------------------*/
static struct platform_device sx1_lcd_device = {
.name = "lcd_sx1",
.id = -1,
};
static struct omap_lcd_config sx1_lcd_config __initdata = {
.ctrl_name = "internal",
};
......@@ -368,14 +364,8 @@ static struct omap_lcd_config sx1_lcd_config __initdata = {
static struct platform_device *sx1_devices[] __initdata = {
&sx1_flash_device,
&sx1_kp_device,
&sx1_lcd_device,
&sx1_irda_device,
};
/*-----------------------------------------*/
static struct omap_board_config_kernel sx1_config[] __initdata = {
{ OMAP_TAG_LCD, &sx1_lcd_config },
};
/*-----------------------------------------*/
......@@ -391,8 +381,6 @@ static void __init omap_sx1_init(void)
platform_add_devices(sx1_devices, ARRAY_SIZE(sx1_devices));
omap_board_config = sx1_config;
omap_board_config_size = ARRAY_SIZE(sx1_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
omap1_usb_init(&sx1_usb_config);
......@@ -406,6 +394,8 @@ static void __init omap_sx1_init(void)
gpio_direction_output(1, 1); /*A_IRDA_OFF = 1 */
gpio_direction_output(11, 0); /*A_SWITCH = 0 */
gpio_direction_output(15, 0); /*A_USB_ON = 0 */
omapfb_set_lcd_config(&sx1_lcd_config);
}
MACHINE_START(SX1, "OMAP310 based Siemens SX1")
......
......@@ -21,7 +21,6 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/omapfb.h>
#include <asm/tlb.h>
......
......@@ -230,16 +230,6 @@ static void lcd_backlight_reset(void)
gpio_set_value(GPIO_PORT235, 1);
}
static void lcd_on(void *board_data, struct fb_info *info)
{
lcd_backlight_on();
}
static void lcd_off(void *board_data)
{
lcd_backlight_reset();
}
/* LCDC0 */
static const struct fb_videomode lcdc0_modes[] = {
{
......@@ -263,14 +253,14 @@ static struct sh_mobile_lcdc_info lcdc0_info = {
.interface_type = RGB24,
.clock_divider = 1,
.flags = LCDC_FLAGS_DWPOL,
.lcd_size_cfg.width = 44,
.lcd_size_cfg.height = 79,
.fourcc = V4L2_PIX_FMT_RGB565,
.lcd_cfg = lcdc0_modes,
.num_cfg = ARRAY_SIZE(lcdc0_modes),
.board_cfg = {
.display_on = lcd_on,
.display_off = lcd_off,
.lcd_modes = lcdc0_modes,
.num_modes = ARRAY_SIZE(lcdc0_modes),
.panel_cfg = {
.width = 44,
.height = 79,
.display_on = lcd_backlight_on,
.display_off = lcd_backlight_reset,
},
}
};
......
......@@ -258,10 +258,16 @@ static struct sh_mobile_meram_info meram_info = {
static struct resource meram_resources[] = {
[0] = {
.name = "MERAM",
.start = 0xe8000000,
.end = 0xe81fffff,
.flags = IORESOURCE_MEM,
.name = "regs",
.start = 0xe8000000,
.end = 0xe807ffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.name = "meram",
.start = 0xe8080000,
.end = 0xe81fffff,
.flags = IORESOURCE_MEM,
},
};
......@@ -437,82 +443,6 @@ static struct platform_device usb1_host_device = {
.resource = usb1_host_resources,
};
static const struct fb_videomode ap4evb_lcdc_modes[] = {
{
#ifdef CONFIG_AP4EVB_QHD
.name = "R63302(QHD)",
.xres = 544,
.yres = 961,
.left_margin = 72,
.right_margin = 600,
.hsync_len = 16,
.upper_margin = 8,
.lower_margin = 8,
.vsync_len = 2,
.sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
#else
.name = "WVGA Panel",
.xres = 800,
.yres = 480,
.left_margin = 220,
.right_margin = 110,
.hsync_len = 70,
.upper_margin = 20,
.lower_margin = 5,
.vsync_len = 5,
.sync = 0,
#endif
},
};
static struct sh_mobile_meram_cfg lcd_meram_cfg = {
.icb[0] = {
.marker_icb = 28,
.cache_icb = 24,
.meram_offset = 0x0,
.meram_size = 0x40,
},
.icb[1] = {
.marker_icb = 29,
.cache_icb = 25,
.meram_offset = 0x40,
.meram_size = 0x40,
},
};
static struct sh_mobile_lcdc_info lcdc_info = {
.meram_dev = &meram_info,
.ch[0] = {
.chan = LCDC_CHAN_MAINLCD,
.fourcc = V4L2_PIX_FMT_RGB565,
.lcd_cfg = ap4evb_lcdc_modes,
.num_cfg = ARRAY_SIZE(ap4evb_lcdc_modes),
.meram_cfg = &lcd_meram_cfg,
}
};
static struct resource lcdc_resources[] = {
[0] = {
.name = "LCDC",
.start = 0xfe940000, /* P4-only space */
.end = 0xfe943fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = intcs_evt2irq(0x580),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device lcdc_device = {
.name = "sh_mobile_lcdc_fb",
.num_resources = ARRAY_SIZE(lcdc_resources),
.resource = lcdc_resources,
.dev = {
.platform_data = &lcdc_info,
.coherent_dma_mask = ~0,
},
};
/*
* QHD display
*/
......@@ -556,20 +486,25 @@ static struct platform_device keysc_device = {
};
/* MIPI-DSI */
#define PHYCTRL 0x0070
static int sh_mipi_set_dot_clock(struct platform_device *pdev,
void __iomem *base,
int enable)
{
struct clk *pck = clk_get(&pdev->dev, "dsip_clk");
void __iomem *phy = base + PHYCTRL;
if (IS_ERR(pck))
return PTR_ERR(pck);
if (enable) {
/*
* DSIPCLK = 24MHz
* D-PHY = DSIPCLK * ((0x6*2)+1) = 312MHz (see .phyctrl)
* HsByteCLK = D-PHY/8 = 39MHz
*
* X * Y * FPS =
* (544+72+600+16) * (961+8+8+2) * 30 = 36.1MHz
*/
clk_set_rate(pck, clk_round_rate(pck, 24000000));
iowrite32(ioread32(phy) | (0xb << 8), phy);
clk_enable(pck);
} else {
clk_disable(pck);
......@@ -593,11 +528,14 @@ static struct resource mipidsi0_resources[] = {
},
};
static struct sh_mobile_lcdc_info lcdc_info;
static struct sh_mipi_dsi_info mipidsi0_info = {
.data_format = MIPI_RGB888,
.lcd_chan = &lcdc_info.ch[0],
.lane = 2,
.vsynw_offset = 17,
.phyctrl = 0x6 << 8,
.flags = SH_MIPI_DSI_SYNC_PULSES_MODE |
SH_MIPI_DSI_HSbyteCLK,
.set_dot_clock = sh_mipi_set_dot_clock,
......@@ -619,6 +557,81 @@ static struct platform_device *qhd_devices[] __initdata = {
};
#endif /* CONFIG_AP4EVB_QHD */
/* LCDC0 */
static const struct fb_videomode ap4evb_lcdc_modes[] = {
{
#ifdef CONFIG_AP4EVB_QHD
.name = "R63302(QHD)",
.xres = 544,
.yres = 961,
.left_margin = 72,
.right_margin = 600,
.hsync_len = 16,
.upper_margin = 8,
.lower_margin = 8,
.vsync_len = 2,
.sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
#else
.name = "WVGA Panel",
.xres = 800,
.yres = 480,
.left_margin = 220,
.right_margin = 110,
.hsync_len = 70,
.upper_margin = 20,
.lower_margin = 5,
.vsync_len = 5,
.sync = 0,
#endif
},
};
static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
.icb[0] = {
.meram_size = 0x40,
},
.icb[1] = {
.meram_size = 0x40,
},
};
static struct sh_mobile_lcdc_info lcdc_info = {
.meram_dev = &meram_info,
.ch[0] = {
.chan = LCDC_CHAN_MAINLCD,
.fourcc = V4L2_PIX_FMT_RGB565,
.lcd_modes = ap4evb_lcdc_modes,
.num_modes = ARRAY_SIZE(ap4evb_lcdc_modes),
.meram_cfg = &lcd_meram_cfg,
#ifdef CONFIG_AP4EVB_QHD
.tx_dev = &mipidsi0_device,
#endif
}
};
static struct resource lcdc_resources[] = {
[0] = {
.name = "LCDC",
.start = 0xfe940000, /* P4-only space */
.end = 0xfe943fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = intcs_evt2irq(0x580),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device lcdc_device = {
.name = "sh_mobile_lcdc_fb",
.num_resources = ARRAY_SIZE(lcdc_resources),
.resource = lcdc_resources,
.dev = {
.platform_data = &lcdc_info,
.coherent_dma_mask = ~0,
},
};
/* FSI */
#define IRQ_FSI evt2irq(0x1840)
static int __fsi_set_rate(struct clk *clk, long rate, int enable)
......@@ -790,65 +803,11 @@ static struct platform_device fsi_ak4643_device = {
},
};
static struct sh_mobile_meram_cfg hdmi_meram_cfg = {
.icb[0] = {
.marker_icb = 30,
.cache_icb = 26,
.meram_offset = 0x80,
.meram_size = 0x100,
},
.icb[1] = {
.marker_icb = 31,
.cache_icb = 27,
.meram_offset = 0x180,
.meram_size = 0x100,
},
};
static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
.clock_source = LCDC_CLK_EXTERNAL,
.meram_dev = &meram_info,
.ch[0] = {
.chan = LCDC_CHAN_MAINLCD,
.fourcc = V4L2_PIX_FMT_RGB565,
.interface_type = RGB24,
.clock_divider = 1,
.flags = LCDC_FLAGS_DWPOL,
.meram_cfg = &hdmi_meram_cfg,
}
};
static struct resource lcdc1_resources[] = {
[0] = {
.name = "LCDC1",
.start = 0xfe944000,
.end = 0xfe947fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = intcs_evt2irq(0x1780),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device lcdc1_device = {
.name = "sh_mobile_lcdc_fb",
.num_resources = ARRAY_SIZE(lcdc1_resources),
.resource = lcdc1_resources,
.id = 1,
.dev = {
.platform_data = &sh_mobile_lcdc1_info,
.coherent_dma_mask = ~0,
},
};
/* LCDC1 */
static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
unsigned long *parent_freq);
static struct sh_mobile_hdmi_info hdmi_info = {
.lcd_chan = &sh_mobile_lcdc1_info.ch[0],
.lcd_dev = &lcdc1_device.dev,
.flags = HDMI_SND_SRC_SPDIF,
.clk_optimize_parent = ap4evb_clk_optimize,
};
......@@ -877,10 +836,6 @@ static struct platform_device hdmi_device = {
},
};
static struct platform_device fsi_hdmi_device = {
.name = "sh_fsi2_b_hdmi",
};
static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
unsigned long *parent_freq)
{
......@@ -900,6 +855,57 @@ static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
return error;
}
static const struct sh_mobile_meram_cfg hdmi_meram_cfg = {
.icb[0] = {
.meram_size = 0x100,
},
.icb[1] = {
.meram_size = 0x100,
},
};
static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
.clock_source = LCDC_CLK_EXTERNAL,
.meram_dev = &meram_info,
.ch[0] = {
.chan = LCDC_CHAN_MAINLCD,
.fourcc = V4L2_PIX_FMT_RGB565,
.interface_type = RGB24,
.clock_divider = 1,
.flags = LCDC_FLAGS_DWPOL,
.meram_cfg = &hdmi_meram_cfg,
.tx_dev = &hdmi_device,
}
};
static struct resource lcdc1_resources[] = {
[0] = {
.name = "LCDC1",
.start = 0xfe944000,
.end = 0xfe947fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = intcs_evt2irq(0x1780),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device lcdc1_device = {
.name = "sh_mobile_lcdc_fb",
.num_resources = ARRAY_SIZE(lcdc1_resources),
.resource = lcdc1_resources,
.id = 1,
.dev = {
.platform_data = &sh_mobile_lcdc1_info,
.coherent_dma_mask = ~0,
},
};
static struct platform_device fsi_hdmi_device = {
.name = "sh_fsi2_b_hdmi",
};
static struct gpio_led ap4evb_leds[] = {
{
.name = "led4",
......@@ -1034,9 +1040,9 @@ static struct platform_device *ap4evb_devices[] __initdata = {
&fsi_ak4643_device,
&fsi_hdmi_device,
&sh_mmcif_device,
&lcdc1_device,
&lcdc_device,
&hdmi_device,
&lcdc_device,
&lcdc1_device,
&ceu_device,
&ap4evb_camera,
&meram_device,
......@@ -1347,8 +1353,8 @@ static void __init ap4evb_init(void)
lcdc_info.ch[0].interface_type = RGB24;
lcdc_info.ch[0].clock_divider = 1;
lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
lcdc_info.ch[0].lcd_size_cfg.width = 44;
lcdc_info.ch[0].lcd_size_cfg.height = 79;
lcdc_info.ch[0].panel_cfg.width = 44;
lcdc_info.ch[0].panel_cfg.height = 79;
platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
......@@ -1389,8 +1395,8 @@ static void __init ap4evb_init(void)
lcdc_info.ch[0].interface_type = RGB18;
lcdc_info.ch[0].clock_divider = 3;
lcdc_info.ch[0].flags = 0;
lcdc_info.ch[0].lcd_size_cfg.width = 152;
lcdc_info.ch[0].lcd_size_cfg.height = 91;
lcdc_info.ch[0].panel_cfg.width = 152;
lcdc_info.ch[0].panel_cfg.height = 91;
/* enable TouchScreen */
irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
......
......@@ -246,9 +246,9 @@ static struct sh_mobile_lcdc_info lcdc0_info = {
.interface_type = RGB24,
.clock_divider = 5,
.flags = 0,
.lcd_cfg = &lcdc0_mode,
.num_cfg = 1,
.lcd_size_cfg = {
.lcd_modes = &lcdc0_mode,
.num_modes = 1,
.panel_cfg = {
.width = 152,
.height = 91,
},
......
......@@ -318,8 +318,14 @@ static struct sh_mobile_meram_info mackerel_meram_info = {
static struct resource meram_resources[] = {
[0] = {
.name = "MERAM",
.name = "regs",
.start = 0xe8000000,
.end = 0xe807ffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.name = "meram",
.start = 0xe8080000,
.end = 0xe81fffff,
.flags = IORESOURCE_MEM,
},
......@@ -351,29 +357,23 @@ static struct fb_videomode mackerel_lcdc_modes[] = {
},
};
static int mackerel_set_brightness(void *board_data, int brightness)
static int mackerel_set_brightness(int brightness)
{
gpio_set_value(GPIO_PORT31, brightness);
return 0;
}
static int mackerel_get_brightness(void *board_data)
static int mackerel_get_brightness(void)
{
return gpio_get_value(GPIO_PORT31);
}
static struct sh_mobile_meram_cfg lcd_meram_cfg = {
static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
.icb[0] = {
.marker_icb = 28,
.cache_icb = 24,
.meram_offset = 0x0,
.meram_size = 0x40,
},
.icb[1] = {
.marker_icb = 29,
.cache_icb = 25,
.meram_offset = 0x40,
.meram_size = 0x40,
},
};
......@@ -384,20 +384,20 @@ static struct sh_mobile_lcdc_info lcdc_info = {
.ch[0] = {
.chan = LCDC_CHAN_MAINLCD,
.fourcc = V4L2_PIX_FMT_RGB565,
.lcd_cfg = mackerel_lcdc_modes,
.num_cfg = ARRAY_SIZE(mackerel_lcdc_modes),
.lcd_modes = mackerel_lcdc_modes,
.num_modes = ARRAY_SIZE(mackerel_lcdc_modes),
.interface_type = RGB24,
.clock_divider = 3,
.flags = 0,
.lcd_size_cfg.width = 152,
.lcd_size_cfg.height = 91,
.board_cfg = {
.set_brightness = mackerel_set_brightness,
.get_brightness = mackerel_get_brightness,
.panel_cfg = {
.width = 152,
.height = 91,
},
.bl_info = {
.name = "sh_mobile_lcdc_bl",
.max_brightness = 1,
.set_brightness = mackerel_set_brightness,
.get_brightness = mackerel_get_brightness,
},
.meram_cfg = &lcd_meram_cfg,
}
......@@ -426,21 +426,44 @@ static struct platform_device lcdc_device = {
},
};
static struct sh_mobile_meram_cfg hdmi_meram_cfg = {
/* HDMI */
static struct sh_mobile_hdmi_info hdmi_info = {
.flags = HDMI_SND_SRC_SPDIF,
};
static struct resource hdmi_resources[] = {
[0] = {
.name = "HDMI",
.start = 0xe6be0000,
.end = 0xe6be00ff,
.flags = IORESOURCE_MEM,
},
[1] = {
/* There's also an HDMI interrupt on INTCS @ 0x18e0 */
.start = evt2irq(0x17e0),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device hdmi_device = {
.name = "sh-mobile-hdmi",
.num_resources = ARRAY_SIZE(hdmi_resources),
.resource = hdmi_resources,
.id = -1,
.dev = {
.platform_data = &hdmi_info,
},
};
static const struct sh_mobile_meram_cfg hdmi_meram_cfg = {
.icb[0] = {
.marker_icb = 30,
.cache_icb = 26,
.meram_offset = 0x80,
.meram_size = 0x100,
},
.icb[1] = {
.marker_icb = 31,
.cache_icb = 27,
.meram_offset = 0x180,
.meram_size = 0x100,
},
};
/* HDMI */
static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
.meram_dev = &mackerel_meram_info,
.clock_source = LCDC_CLK_EXTERNAL,
......@@ -451,6 +474,7 @@ static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
.clock_divider = 1,
.flags = LCDC_FLAGS_DWPOL,
.meram_cfg = &hdmi_meram_cfg,
.tx_dev = &hdmi_device,
}
};
......@@ -478,36 +502,6 @@ static struct platform_device hdmi_lcdc_device = {
},
};
static struct sh_mobile_hdmi_info hdmi_info = {
.lcd_chan = &hdmi_lcdc_info.ch[0],
.lcd_dev = &hdmi_lcdc_device.dev,
.flags = HDMI_SND_SRC_SPDIF,
};
static struct resource hdmi_resources[] = {
[0] = {
.name = "HDMI",
.start = 0xe6be0000,
.end = 0xe6be00ff,
.flags = IORESOURCE_MEM,
},
[1] = {
/* There's also an HDMI interrupt on INTCS @ 0x18e0 */
.start = evt2irq(0x17e0),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device hdmi_device = {
.name = "sh-mobile-hdmi",
.num_resources = ARRAY_SIZE(hdmi_resources),
.resource = hdmi_resources,
.id = -1,
.dev = {
.platform_data = &hdmi_info,
},
};
static struct platform_device fsi_hdmi_device = {
.name = "sh_fsi2_b_hdmi",
};
......@@ -1274,8 +1268,8 @@ static struct platform_device *mackerel_devices[] __initdata = {
&sh_mmcif_device,
&ceu_device,
&mackerel_camera,
&hdmi_lcdc_device,
&hdmi_device,
&hdmi_lcdc_device,
&meram_device,
};
......
......@@ -15,7 +15,6 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/dma-mapping.h>
#include <linux/omapfb.h>
#include <plat/common.h>
#include <plat/board.h>
......@@ -65,7 +64,6 @@ const void *__init omap_get_var_config(u16 tag, size_t *len)
void __init omap_reserve(void)
{
omapfb_reserve_sdram_memblock();
omap_vram_reserve_sdram_memblock();
omap_dsp_reserve_sdram_memblock();
omap_secure_ram_reserve_memblock();
......
......@@ -34,15 +34,11 @@
#include <asm/mach/map.h>
#include <plat/board.h>
#include <plat/sram.h>
#include "fb.h"
#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE)
static bool omapfb_lcd_configured;
static struct omapfb_platform_data omapfb_config;
static int config_invalid;
static int configured_regions;
static u64 omap_fb_dma_mask = ~(u32)0;
......@@ -57,302 +53,21 @@ static struct platform_device omap_fb_device = {
.num_resources = 0,
};
void omapfb_set_platform_data(struct omapfb_platform_data *data)
{
}
static inline int ranges_overlap(unsigned long start1, unsigned long size1,
unsigned long start2, unsigned long size2)
{
return (start1 >= start2 && start1 < start2 + size2) ||
(start2 >= start1 && start2 < start1 + size1);
}
static inline int range_included(unsigned long start1, unsigned long size1,
unsigned long start2, unsigned long size2)
{
return start1 >= start2 && start1 + size1 <= start2 + size2;
}
/* Check if there is an overlapping region. */
static int fbmem_region_reserved(unsigned long start, size_t size)
{
struct omapfb_mem_region *rg;
int i;
rg = &omapfb_config.mem_desc.region[0];
for (i = 0; i < OMAPFB_PLANE_NUM; i++, rg++) {
if (!rg->paddr)
/* Empty slot. */
continue;
if (ranges_overlap(start, size, rg->paddr, rg->size))
return 1;
}
return 0;
}
/*
* Get the region_idx`th region from board config/ATAG and convert it to
* our internal format.
*/
static int __init get_fbmem_region(int region_idx, struct omapfb_mem_region *rg)
void __init omapfb_set_lcd_config(const struct omap_lcd_config *config)
{
const struct omap_fbmem_config *conf;
u32 paddr;
conf = omap_get_nr_config(OMAP_TAG_FBMEM,
struct omap_fbmem_config, region_idx);
if (conf == NULL)
return -ENOENT;
paddr = conf->start;
/*
* Low bits encode the page allocation mode, if high bits
* are zero. Otherwise we need a page aligned fixed
* address.
*/
memset(rg, 0, sizeof(*rg));
rg->type = paddr & ~PAGE_MASK;
rg->paddr = paddr & PAGE_MASK;
rg->size = PAGE_ALIGN(conf->size);
return 0;
omapfb_config.lcd = *config;
omapfb_lcd_configured = true;
}
static int set_fbmem_region_type(struct omapfb_mem_region *rg, int mem_type,
unsigned long mem_start,
unsigned long mem_size)
{
/*
* Check if the configuration specifies the type explicitly.
* type = 0 && paddr = 0, a default don't care case maps to
* the SDRAM type.
*/
if (rg->type || !rg->paddr)
return 0;
if (ranges_overlap(rg->paddr, rg->size, mem_start, mem_size)) {
rg->type = mem_type;
return 0;
}
/* Can't determine it. */
return -1;
}
static int check_fbmem_region(int region_idx, struct omapfb_mem_region *rg,
unsigned long start_avail, unsigned size_avail)
static int __init omap_init_fb(void)
{
unsigned long paddr = rg->paddr;
size_t size = rg->size;
if (rg->type > OMAPFB_MEMTYPE_MAX) {
printk(KERN_ERR
"Invalid start address for FB region %d\n", region_idx);
return -EINVAL;
}
if (!rg->size) {
printk(KERN_ERR "Zero size for FB region %d\n", region_idx);
return -EINVAL;
}
if (!paddr)
/* Allocate this dynamically, leave paddr 0 for now. */
return 0;
/*
* Fixed region for the given RAM range. Check if it's already
* reserved by the FB code or someone else.
* If the board file has not set the lcd config with
* omapfb_set_lcd_config(), don't bother registering the omapfb device
*/
if (fbmem_region_reserved(paddr, size) ||
!range_included(paddr, size, start_avail, size_avail)) {
printk(KERN_ERR "Trying to use reserved memory "
"for FB region %d\n", region_idx);
return -EINVAL;
}
return 0;
}
static int valid_sdram(unsigned long addr, unsigned long size)
{
return memblock_is_region_memory(addr, size);
}
static int reserve_sdram(unsigned long addr, unsigned long size)
{
if (memblock_is_region_reserved(addr, size))
return -EBUSY;
if (memblock_reserve(addr, size))
return -ENOMEM;
return 0;
}
/*
* Called from map_io. We need to call to this early enough so that we
* can reserve the fixed SDRAM regions before VM could get hold of them.
*/
void __init omapfb_reserve_sdram_memblock(void)
{
unsigned long reserved = 0;
int i;
if (config_invalid)
return;
for (i = 0; ; i++) {
struct omapfb_mem_region rg;
if (get_fbmem_region(i, &rg) < 0)
break;
if (i == OMAPFB_PLANE_NUM) {
pr_err("Extraneous FB mem configuration entries\n");
config_invalid = 1;
return;
}
/* Check if it's our memory type. */
if (rg.type != OMAPFB_MEMTYPE_SDRAM)
continue;
/* Check if the region falls within SDRAM */
if (rg.paddr && !valid_sdram(rg.paddr, rg.size))
continue;
if (rg.size == 0) {
pr_err("Zero size for FB region %d\n", i);
config_invalid = 1;
return;
}
if (rg.paddr) {
if (reserve_sdram(rg.paddr, rg.size)) {
pr_err("Trying to use reserved memory for FB region %d\n",
i);
config_invalid = 1;
return;
}
reserved += rg.size;
}
if (omapfb_config.mem_desc.region[i].size) {
pr_err("FB region %d already set\n", i);
config_invalid = 1;
return;
}
omapfb_config.mem_desc.region[i] = rg;
configured_regions++;
}
omapfb_config.mem_desc.region_cnt = i;
if (reserved)
pr_info("Reserving %lu bytes SDRAM for frame buffer\n",
reserved);
}
/*
* Called at sram init time, before anything is pushed to the SRAM stack.
* Because of the stack scheme, we will allocate everything from the
* start of the lowest address region to the end of SRAM. This will also
* include padding for page alignment and possible holes between regions.
*
* As opposed to the SDRAM case, we'll also do any dynamic allocations at
* this point, since the driver built as a module would have problem with
* freeing / reallocating the regions.
*/
unsigned long __init omapfb_reserve_sram(unsigned long sram_pstart,
unsigned long sram_vstart,
unsigned long sram_size,
unsigned long pstart_avail,
unsigned long size_avail)
{
struct omapfb_mem_region rg;
unsigned long pend_avail;
unsigned long reserved;
int i;
if (config_invalid)
if (!omapfb_lcd_configured)
return 0;
reserved = 0;
pend_avail = pstart_avail + size_avail;
for (i = 0; ; i++) {
if (get_fbmem_region(i, &rg) < 0)
break;
if (i == OMAPFB_PLANE_NUM) {
printk(KERN_ERR
"Extraneous FB mem configuration entries\n");
config_invalid = 1;
return 0;
}
/* Check if it's our memory type. */
if (set_fbmem_region_type(&rg, OMAPFB_MEMTYPE_SRAM,
sram_pstart, sram_size) < 0 ||
(rg.type != OMAPFB_MEMTYPE_SRAM))
continue;
BUG_ON(omapfb_config.mem_desc.region[i].size);
if (check_fbmem_region(i, &rg, pstart_avail, size_avail) < 0) {
config_invalid = 1;
return 0;
}
if (!rg.paddr) {
/* Dynamic allocation */
if ((size_avail & PAGE_MASK) < rg.size) {
printk("Not enough SRAM for FB region %d\n",
i);
config_invalid = 1;
return 0;
}
size_avail = (size_avail - rg.size) & PAGE_MASK;
rg.paddr = pstart_avail + size_avail;
}
/* Reserve everything above the start of the region. */
if (pend_avail - rg.paddr > reserved)
reserved = pend_avail - rg.paddr;
size_avail = pend_avail - reserved - pstart_avail;
/*
* We have a kernel mapping for this already, so the
* driver won't have to make one.
*/
rg.vaddr = (void *)(sram_vstart + rg.paddr - sram_pstart);
omapfb_config.mem_desc.region[i] = rg;
configured_regions++;
}
omapfb_config.mem_desc.region_cnt = i;
if (reserved)
pr_info("Reserving %lu bytes SRAM for frame buffer\n",
reserved);
return reserved;
}
void omapfb_set_ctrl_platform_data(void *data)
{
omapfb_config.ctrl_platform_data = data;
}
static int __init omap_init_fb(void)
{
const struct omap_lcd_config *conf;
if (config_invalid)
return 0;
if (configured_regions != omapfb_config.mem_desc.region_cnt) {
printk(KERN_ERR "Invalid FB mem configuration entries\n");
return 0;
}
conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
if (conf == NULL) {
if (configured_regions)
/* FB mem config, but no LCD config? */
printk(KERN_ERR "Missing LCD configuration\n");
return 0;
}
omapfb_config.lcd = *conf;
return platform_device_register(&omap_fb_device);
}
......@@ -374,11 +89,6 @@ static struct platform_device omap_fb_device = {
.num_resources = 0,
};
void omapfb_set_platform_data(struct omapfb_platform_data *data)
{
omapfb_config = *data;
}
static int __init omap_init_fb(void)
{
return platform_device_register(&omap_fb_device);
......@@ -386,36 +96,10 @@ static int __init omap_init_fb(void)
arch_initcall(omap_init_fb);
void omapfb_reserve_sdram_memblock(void)
{
}
unsigned long __init omapfb_reserve_sram(unsigned long sram_pstart,
unsigned long sram_vstart,
unsigned long sram_size,
unsigned long start_avail,
unsigned long size_avail)
{
return 0;
}
#else
void omapfb_set_platform_data(struct omapfb_platform_data *data)
{
}
void omapfb_reserve_sdram_memblock(void)
{
}
unsigned long __init omapfb_reserve_sram(unsigned long sram_pstart,
unsigned long sram_vstart,
unsigned long sram_size,
unsigned long start_avail,
unsigned long size_avail)
void __init omapfb_set_lcd_config(const struct omap_lcd_config *config)
{
return 0;
}
#endif
#ifndef __PLAT_OMAP_FB_H__
#define __PLAT_OMAP_FB_H__
extern unsigned long omapfb_reserve_sram(unsigned long sram_pstart,
unsigned long sram_vstart,
unsigned long sram_size,
unsigned long pstart_avail,
unsigned long size_avail);
#endif /* __PLAT_OMAP_FB_H__ */
#ifndef _BLIZZARD_H
#define _BLIZZARD_H
struct blizzard_platform_data {
void (*power_up)(struct device *dev);
void (*power_down)(struct device *dev);
unsigned long (*get_clock_rate)(struct device *dev);
unsigned te_connected:1;
};
#endif
......@@ -28,9 +28,7 @@ enum {
/* Different peripheral ids */
#define OMAP_TAG_CLOCK 0x4f01
#define OMAP_TAG_LCD 0x4f05
#define OMAP_TAG_GPIO_SWITCH 0x4f06
#define OMAP_TAG_FBMEM 0x4f08
#define OMAP_TAG_STI_CONSOLE 0x4f09
#define OMAP_TAG_CAMERA_SENSOR 0x4f0a
......
#ifndef _HWA742_H
#define _HWA742_H
struct hwa742_platform_data {
unsigned te_connected:1;
};
#endif
......@@ -23,40 +23,21 @@
#include <linux/types.h>
#define OMAP_VRAM_MEMTYPE_SDRAM 0
#define OMAP_VRAM_MEMTYPE_SRAM 1
#define OMAP_VRAM_MEMTYPE_MAX 1
extern int omap_vram_add_region(unsigned long paddr, size_t size);
extern int omap_vram_free(unsigned long paddr, size_t size);
extern int omap_vram_alloc(int mtype, size_t size, unsigned long *paddr);
extern int omap_vram_alloc(size_t size, unsigned long *paddr);
extern int omap_vram_reserve(unsigned long paddr, size_t size);
extern void omap_vram_get_info(unsigned long *vram, unsigned long *free_vram,
unsigned long *largest_free_block);
#ifdef CONFIG_OMAP2_VRAM
extern void omap_vram_set_sdram_vram(u32 size, u32 start);
extern void omap_vram_set_sram_vram(u32 size, u32 start);
extern void omap_vram_reserve_sdram_memblock(void);
extern unsigned long omap_vram_reserve_sram(unsigned long sram_pstart,
unsigned long sram_vstart,
unsigned long sram_size,
unsigned long pstart_avail,
unsigned long size_avail);
#else
static inline void omap_vram_set_sdram_vram(u32 size, u32 start) { }
static inline void omap_vram_set_sram_vram(u32 size, u32 start) { }
static inline void omap_vram_reserve_sdram_memblock(void) { }
static inline unsigned long omap_vram_reserve_sram(unsigned long sram_pstart,
unsigned long sram_vstart,
unsigned long sram_size,
unsigned long pstart_avail,
unsigned long size_avail)
{
return 0;
}
#endif
#endif
......@@ -91,6 +91,9 @@
#define VIDCON1_VSTATUS_BACKPORCH (0x1 << 13)
#define VIDCON1_VSTATUS_ACTIVE (0x2 << 13)
#define VIDCON1_VSTATUS_FRONTPORCH (0x0 << 13)
#define VIDCON1_VCLK_MASK (0x3 << 9)
#define VIDCON1_VCLK_HOLD (0x0 << 9)
#define VIDCON1_VCLK_RUN (0x1 << 9)
#define VIDCON1_INV_VCLK (1 << 7)
#define VIDCON1_INV_HSYNC (1 << 6)
......@@ -164,15 +167,17 @@
#define VIDTCON1_HSPW(_x) ((_x) << 0)
#define VIDTCON2 (0x18)
#define VIDTCON2_LINEVAL_E(_x) ((((_x) & 0x800) >> 11) << 23)
#define VIDTCON2_LINEVAL_MASK (0x7ff << 11)
#define VIDTCON2_LINEVAL_SHIFT (11)
#define VIDTCON2_LINEVAL_LIMIT (0x7ff)
#define VIDTCON2_LINEVAL(_x) ((_x) << 11)
#define VIDTCON2_LINEVAL(_x) (((_x) & 0x7ff) << 11)
#define VIDTCON2_HOZVAL_E(_x) ((((_x) & 0x800) >> 11) << 22)
#define VIDTCON2_HOZVAL_MASK (0x7ff << 0)
#define VIDTCON2_HOZVAL_SHIFT (0)
#define VIDTCON2_HOZVAL_LIMIT (0x7ff)
#define VIDTCON2_HOZVAL(_x) ((_x) << 0)
#define VIDTCON2_HOZVAL(_x) (((_x) & 0x7ff) << 0)
/* WINCONx */
......@@ -228,25 +233,29 @@
/* Local input channels (windows 0-2) */
#define SHADOWCON_CHx_LOCAL_ENABLE(_win) (1 << (5 + (_win)))
#define VIDOSDxA_TOPLEFT_X_E(_x) ((((_x) & 0x800) >> 11) << 23)
#define VIDOSDxA_TOPLEFT_X_MASK (0x7ff << 11)
#define VIDOSDxA_TOPLEFT_X_SHIFT (11)
#define VIDOSDxA_TOPLEFT_X_LIMIT (0x7ff)
#define VIDOSDxA_TOPLEFT_X(_x) ((_x) << 11)
#define VIDOSDxA_TOPLEFT_X(_x) (((_x) & 0x7ff) << 11)
#define VIDOSDxA_TOPLEFT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22)
#define VIDOSDxA_TOPLEFT_Y_MASK (0x7ff << 0)
#define VIDOSDxA_TOPLEFT_Y_SHIFT (0)
#define VIDOSDxA_TOPLEFT_Y_LIMIT (0x7ff)
#define VIDOSDxA_TOPLEFT_Y(_x) ((_x) << 0)
#define VIDOSDxA_TOPLEFT_Y(_x) (((_x) & 0x7ff) << 0)
#define VIDOSDxB_BOTRIGHT_X_E(_x) ((((_x) & 0x800) >> 11) << 23)
#define VIDOSDxB_BOTRIGHT_X_MASK (0x7ff << 11)
#define VIDOSDxB_BOTRIGHT_X_SHIFT (11)
#define VIDOSDxB_BOTRIGHT_X_LIMIT (0x7ff)
#define VIDOSDxB_BOTRIGHT_X(_x) ((_x) << 11)
#define VIDOSDxB_BOTRIGHT_X(_x) (((_x) & 0x7ff) << 11)
#define VIDOSDxB_BOTRIGHT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22)
#define VIDOSDxB_BOTRIGHT_Y_MASK (0x7ff << 0)
#define VIDOSDxB_BOTRIGHT_Y_SHIFT (0)
#define VIDOSDxB_BOTRIGHT_Y_LIMIT (0x7ff)
#define VIDOSDxB_BOTRIGHT_Y(_x) ((_x) << 0)
#define VIDOSDxB_BOTRIGHT_Y(_x) (((_x) & 0x7ff) << 0)
/* For VIDOSD[1..4]C */
#define VIDISD14C_ALPHA0_R(_x) ((_x) << 20)
......@@ -278,15 +287,17 @@
#define VIDW_BUF_END1(_buff) (0xD4 + ((_buff) * 8))
#define VIDW_BUF_SIZE(_buff) (0x100 + ((_buff) * 4))
#define VIDW_BUF_SIZE_OFFSET_E(_x) ((((_x) & 0x2000) >> 13) << 27)
#define VIDW_BUF_SIZE_OFFSET_MASK (0x1fff << 13)
#define VIDW_BUF_SIZE_OFFSET_SHIFT (13)
#define VIDW_BUF_SIZE_OFFSET_LIMIT (0x1fff)
#define VIDW_BUF_SIZE_OFFSET(_x) ((_x) << 13)
#define VIDW_BUF_SIZE_OFFSET(_x) (((_x) & 0x1fff) << 13)
#define VIDW_BUF_SIZE_PAGEWIDTH_E(_x) ((((_x) & 0x2000) >> 13) << 26)
#define VIDW_BUF_SIZE_PAGEWIDTH_MASK (0x1fff << 0)
#define VIDW_BUF_SIZE_PAGEWIDTH_SHIFT (0)
#define VIDW_BUF_SIZE_PAGEWIDTH_LIMIT (0x1fff)
#define VIDW_BUF_SIZE_PAGEWIDTH(_x) ((_x) << 0)
#define VIDW_BUF_SIZE_PAGEWIDTH(_x) (((_x) & 0x1fff) << 0)
/* Interrupt controls and status */
......@@ -384,3 +395,9 @@
#define WPALCON_W0PAL_16BPP_A555 (0x5 << 0)
#define WPALCON_W0PAL_16BPP_565 (0x6 << 0)
/* Blending equation control */
#define BLENDCON (0x260)
#define BLENDCON_NEW_MASK (1 << 0)
#define BLENDCON_NEW_8BIT_ALPHA_VALUE (1 << 0)
#define BLENDCON_NEW_4BIT_ALPHA_VALUE (0 << 0)
......@@ -157,7 +157,7 @@ static struct platform_device nand_flash_device = {
#define PORT_DRVCRA 0xA405018A
#define PORT_DRVCRB 0xA405018C
static int ap320_wvga_set_brightness(void *board_data, int brightness)
static int ap320_wvga_set_brightness(int brightness)
{
if (brightness) {
gpio_set_value(GPIO_PTS3, 0);
......@@ -170,12 +170,12 @@ static int ap320_wvga_set_brightness(void *board_data, int brightness)
return 0;
}
static int ap320_wvga_get_brightness(void *board_data)
static int ap320_wvga_get_brightness(void)
{
return gpio_get_value(GPIO_PTS3);
}
static void ap320_wvga_power_on(void *board_data, struct fb_info *info)
static void ap320_wvga_power_on(void)
{
msleep(100);
......@@ -183,7 +183,7 @@ static void ap320_wvga_power_on(void *board_data, struct fb_info *info)
__raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG);
}
static void ap320_wvga_power_off(void *board_data)
static void ap320_wvga_power_off(void)
{
/* ASD AP-320/325 LCD OFF */
__raw_writew(0, FPGA_LCDREG);
......@@ -211,21 +211,19 @@ static struct sh_mobile_lcdc_info lcdc_info = {
.fourcc = V4L2_PIX_FMT_RGB565,
.interface_type = RGB18,
.clock_divider = 1,
.lcd_cfg = ap325rxa_lcdc_modes,
.num_cfg = ARRAY_SIZE(ap325rxa_lcdc_modes),
.lcd_size_cfg = { /* 7.0 inch */
.width = 152,
.lcd_modes = ap325rxa_lcdc_modes,
.num_modes = ARRAY_SIZE(ap325rxa_lcdc_modes),
.panel_cfg = {
.width = 152, /* 7.0 inch */
.height = 91,
},
.board_cfg = {
.display_on = ap320_wvga_power_on,
.display_off = ap320_wvga_power_off,
.set_brightness = ap320_wvga_set_brightness,
.get_brightness = ap320_wvga_get_brightness,
},
.bl_info = {
.name = "sh_mobile_lcdc_bl",
.max_brightness = 1,
.set_brightness = ap320_wvga_set_brightness,
.get_brightness = ap320_wvga_get_brightness,
},
}
};
......
......@@ -310,14 +310,14 @@ static const struct fb_videomode ecovec_dvi_modes[] = {
},
};
static int ecovec24_set_brightness(void *board_data, int brightness)
static int ecovec24_set_brightness(int brightness)
{
gpio_set_value(GPIO_PTR1, brightness);
return 0;
}
static int ecovec24_get_brightness(void *board_data)
static int ecovec24_get_brightness(void)
{
return gpio_get_value(GPIO_PTR1);
}
......@@ -327,17 +327,15 @@ static struct sh_mobile_lcdc_info lcdc_info = {
.interface_type = RGB18,
.chan = LCDC_CHAN_MAINLCD,
.fourcc = V4L2_PIX_FMT_RGB565,
.lcd_size_cfg = { /* 7.0 inch */
.panel_cfg = { /* 7.0 inch */
.width = 152,
.height = 91,
},
.board_cfg = {
.set_brightness = ecovec24_set_brightness,
.get_brightness = ecovec24_get_brightness,
},
.bl_info = {
.name = "sh_mobile_lcdc_bl",
.max_brightness = 1,
.set_brightness = ecovec24_set_brightness,
.get_brightness = ecovec24_get_brightness,
},
}
};
......@@ -1118,8 +1116,8 @@ static int __init arch_setup(void)
/* DVI */
lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
lcdc_info.ch[0].clock_divider = 1;
lcdc_info.ch[0].lcd_cfg = ecovec_dvi_modes;
lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_dvi_modes);
lcdc_info.ch[0].lcd_modes = ecovec_dvi_modes;
lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_dvi_modes);
gpio_set_value(GPIO_PTA2, 1);
gpio_set_value(GPIO_PTU1, 1);
......@@ -1127,8 +1125,8 @@ static int __init arch_setup(void)
/* Panel */
lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
lcdc_info.ch[0].clock_divider = 2;
lcdc_info.ch[0].lcd_cfg = ecovec_lcd_modes;
lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_lcd_modes);
lcdc_info.ch[0].lcd_modes = ecovec_lcd_modes;
lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_lcd_modes);
gpio_set_value(GPIO_PTR1, 1);
......
......@@ -251,8 +251,7 @@ static void display_on(void *sohandle,
write_memory_start(sohandle, so);
}
int kfr2r09_lcd_setup(void *board_data, void *sohandle,
struct sh_mobile_lcdc_sys_bus_ops *so)
int kfr2r09_lcd_setup(void *sohandle, struct sh_mobile_lcdc_sys_bus_ops *so)
{
/* power on */
gpio_set_value(GPIO_PTF4, 0); /* PROTECT/ -> L */
......@@ -273,8 +272,7 @@ int kfr2r09_lcd_setup(void *board_data, void *sohandle,
return 0;
}
void kfr2r09_lcd_start(void *board_data, void *sohandle,
struct sh_mobile_lcdc_sys_bus_ops *so)
void kfr2r09_lcd_start(void *sohandle, struct sh_mobile_lcdc_sys_bus_ops *so)
{
write_memory_start(sohandle, so);
}
......@@ -327,12 +325,12 @@ static int kfr2r09_lcd_backlight(int on)
return 0;
}
void kfr2r09_lcd_on(void *board_data, struct fb_info *info)
void kfr2r09_lcd_on(void)
{
kfr2r09_lcd_backlight(1);
}
void kfr2r09_lcd_off(void *board_data)
void kfr2r09_lcd_off(void)
{
kfr2r09_lcd_backlight(0);
}
......@@ -148,13 +148,11 @@ static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
.interface_type = SYS18,
.clock_divider = 6,
.flags = LCDC_FLAGS_DWPOL,
.lcd_cfg = kfr2r09_lcdc_modes,
.num_cfg = ARRAY_SIZE(kfr2r09_lcdc_modes),
.lcd_size_cfg = {
.lcd_modes = kfr2r09_lcdc_modes,
.num_modes = ARRAY_SIZE(kfr2r09_lcdc_modes),
.panel_cfg = {
.width = 35,
.height = 58,
},
.board_cfg = {
.setup_sys = kfr2r09_lcd_setup,
.start_transfer = kfr2r09_lcd_start,
.display_on = kfr2r09_lcd_on,
......
......@@ -113,8 +113,7 @@ static const unsigned short magic3_data[] = {
0x0010, 0x16B0, 0x0011, 0x0111, 0x0007, 0x0061,
};
int migor_lcd_qvga_setup(void *board_data, void *sohandle,
struct sh_mobile_lcdc_sys_bus_ops *so)
int migor_lcd_qvga_setup(void *sohandle, struct sh_mobile_lcdc_sys_bus_ops *so)
{
unsigned long xres = 320;
unsigned long yres = 240;
......
......@@ -246,9 +246,9 @@ static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
.fourcc = V4L2_PIX_FMT_RGB565,
.interface_type = RGB16,
.clock_divider = 2,
.lcd_cfg = migor_lcd_modes,
.num_cfg = ARRAY_SIZE(migor_lcd_modes),
.lcd_size_cfg = { /* 7.0 inch */
.lcd_modes = migor_lcd_modes,
.num_modes = ARRAY_SIZE(migor_lcd_modes),
.panel_cfg = { /* 7.0 inch */
.width = 152,
.height = 91,
},
......@@ -260,13 +260,11 @@ static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
.fourcc = V4L2_PIX_FMT_RGB565,
.interface_type = SYS16A,
.clock_divider = 10,
.lcd_cfg = migor_lcd_modes,
.num_cfg = ARRAY_SIZE(migor_lcd_modes),
.lcd_size_cfg = { /* 2.4 inch */
.width = 49,
.lcd_modes = migor_lcd_modes,
.num_modes = ARRAY_SIZE(migor_lcd_modes),
.panel_cfg = {
.width = 49, /* 2.4 inch */
.height = 37,
},
.board_cfg = {
.setup_sys = migor_lcd_qvga_setup,
},
.sys_bus_cfg = {
......
......@@ -182,12 +182,10 @@ static struct sh_mobile_lcdc_info lcdc_info = {
.chan = LCDC_CHAN_MAINLCD,
.fourcc = V4L2_PIX_FMT_RGB565,
.clock_divider = 1,
.lcd_size_cfg = { /* 7.0 inch */
.panel_cfg = { /* 7.0 inch */
.width = 152,
.height = 91,
},
.board_cfg = {
},
}
};
......@@ -890,12 +888,12 @@ static int __init devices_setup(void)
if (sw & SW41_B) {
/* 720p */
lcdc_info.ch[0].lcd_cfg = lcdc_720p_modes;
lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_720p_modes);
lcdc_info.ch[0].lcd_modes = lcdc_720p_modes;
lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_720p_modes);
} else {
/* VGA */
lcdc_info.ch[0].lcd_cfg = lcdc_vga_modes;
lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_vga_modes);
lcdc_info.ch[0].lcd_modes = lcdc_vga_modes;
lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_vga_modes);
}
if (sw & SW41_A) {
......
......@@ -4,21 +4,21 @@
#include <video/sh_mobile_lcdc.h>
#if defined(CONFIG_FB_SH_MOBILE_LCDC) || defined(CONFIG_FB_SH_MOBILE_LCDC_MODULE)
void kfr2r09_lcd_on(void *board_data, struct fb_info *info);
void kfr2r09_lcd_off(void *board_data);
int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
void kfr2r09_lcd_on(void);
void kfr2r09_lcd_off(void);
int kfr2r09_lcd_setup(void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle,
void kfr2r09_lcd_start(void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
#else
static void kfr2r09_lcd_on(void *board_data) {}
static void kfr2r09_lcd_off(void *board_data) {}
static int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
static void kfr2r09_lcd_on(void) {}
static void kfr2r09_lcd_off(void) {}
static int kfr2r09_lcd_setup(void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops)
{
return -ENODEV;
}
static void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle,
static void kfr2r09_lcd_start(void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops)
{
}
......
......@@ -9,7 +9,7 @@
#include <video/sh_mobile_lcdc.h>
int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle,
int migor_lcd_qvga_setup(void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
#endif /* __ASM_SH_MIGOR_H */
......@@ -1123,6 +1123,18 @@ config FB_RIVA_BACKLIGHT
help
Say Y here if you want to control the backlight of your display.
config FB_I740
tristate "Intel740 support (EXPERIMENTAL)"
depends on EXPERIMENTAL && FB && PCI
select FB_MODE_HELPERS
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
select VGASTATE
select FB_DDC
help
This driver supports graphics cards based on Intel740 chip.
config FB_I810
tristate "Intel 810/815 support (EXPERIMENTAL)"
depends on EXPERIMENTAL && FB && PCI && X86_32 && AGP_INTEL
......@@ -2001,18 +2013,6 @@ config FB_SH_MOBILE_HDMI
---help---
Driver for the on-chip SH-Mobile HDMI controller.
config FB_SH_MOBILE_MERAM
tristate "SuperH Mobile MERAM read ahead support for LCDC"
depends on FB_SH_MOBILE_LCDC
default y
---help---
Enable MERAM support for the SH-Mobile LCD controller.
This will allow for caching of the framebuffer to provide more
reliable access under heavy main memory bus traffic situations.
Up to 4 memory channels can be configured, allowing 4 RGB or
2 YCbCr framebuffers to be configured.
config FB_TMIO
tristate "Toshiba Mobile IO FrameBuffer support"
depends on FB && MFD_CORE
......@@ -2233,6 +2233,7 @@ config FB_DA8XX
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
select FB_CFB_REV_PIXELS_IN_BYTE
---help---
This is the frame buffer device driver for the TI LCD controller
found on DA8xx/OMAP-L1xx SoCs.
......@@ -2412,7 +2413,7 @@ config FB_PUV3_UNIGFX
source "drivers/video/omap/Kconfig"
source "drivers/video/omap2/Kconfig"
source "drivers/video/exynos/Kconfig"
source "drivers/video/backlight/Kconfig"
if VT
......@@ -2423,4 +2424,16 @@ if FB || SGI_NEWPORT_CONSOLE
source "drivers/video/logo/Kconfig"
endif
config FB_SH_MOBILE_MERAM
tristate "SuperH Mobile MERAM read ahead support"
depends on (SUPERH || ARCH_SHMOBILE)
select GENERIC_ALLOCATOR
---help---
Enable MERAM support for the SuperH controller.
This will allow for caching of the framebuffer to provide more
reliable access under heavy main memory bus traffic situations.
Up to 4 memory channels can be configured, allowing 4 RGB or
2 YCbCr framebuffers to be configured.
endmenu
......@@ -15,6 +15,8 @@ obj-$(CONFIG_VT) += console/
obj-$(CONFIG_LOGO) += logo/
obj-y += backlight/
obj-$(CONFIG_EXYNOS_VIDEO) += exynos/
obj-$(CONFIG_FB_CFB_FILLRECT) += cfbfillrect.o
obj-$(CONFIG_FB_CFB_COPYAREA) += cfbcopyarea.o
obj-$(CONFIG_FB_CFB_IMAGEBLIT) += cfbimgblt.o
......@@ -37,6 +39,7 @@ obj-$(CONFIG_FB_GRVGA) += grvga.o
obj-$(CONFIG_FB_PM2) += pm2fb.o
obj-$(CONFIG_FB_PM3) += pm3fb.o
obj-$(CONFIG_FB_I740) += i740fb.o
obj-$(CONFIG_FB_MATROX) += matrox/
obj-$(CONFIG_FB_RIVA) += riva/
obj-$(CONFIG_FB_NVIDIA) += nvidia/
......
......@@ -421,24 +421,18 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
var->red.length = var->green.length = var->blue.length
= var->bits_per_pixel;
break;
case 15:
case 16:
if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
/* RGB:565 mode */
var->red.offset = 11;
var->blue.offset = 0;
var->green.length = 6;
} else if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB555) {
var->red.offset = 10;
var->blue.offset = 0;
var->green.length = 5;
} else {
/* BGR:555 mode */
/* BGR:565 mode */
var->red.offset = 0;
var->blue.offset = 10;
var->green.length = 5;
var->blue.offset = 11;
}
var->green.offset = 5;
var->green.length = 6;
var->red.length = var->blue.length = 5;
break;
case 32:
......
......@@ -477,7 +477,8 @@ static int __devinit au1100fb_drv_probe(struct platform_device *dev)
u32 sys_clksrc;
/* Allocate new device private */
fbdev = kzalloc(sizeof(struct au1100fb_device), GFP_KERNEL);
fbdev = devm_kzalloc(&dev->dev, sizeof(struct au1100fb_device),
GFP_KERNEL);
if (!fbdev) {
print_err("fail to allocate device private record");
return -ENOMEM;
......@@ -498,8 +499,9 @@ static int __devinit au1100fb_drv_probe(struct platform_device *dev)
au1100fb_fix.mmio_start = regs_res->start;
au1100fb_fix.mmio_len = resource_size(regs_res);
if (!request_mem_region(au1100fb_fix.mmio_start, au1100fb_fix.mmio_len,
DRIVER_NAME)) {
if (!devm_request_mem_region(au1100fb_fix.mmio_start,
au1100fb_fix.mmio_len,
DRIVER_NAME)) {
print_err("fail to lock memory region at 0x%08lx",
au1100fb_fix.mmio_start);
return -EBUSY;
......@@ -514,8 +516,9 @@ static int __devinit au1100fb_drv_probe(struct platform_device *dev)
fbdev->fb_len = fbdev->panel->xres * fbdev->panel->yres *
(fbdev->panel->bpp >> 3) * AU1100FB_NBR_VIDEO_BUFFERS;
fbdev->fb_mem = dma_alloc_coherent(&dev->dev, PAGE_ALIGN(fbdev->fb_len),
&fbdev->fb_phys, GFP_KERNEL);
fbdev->fb_mem = dmam_alloc_coherent(&dev->dev, &dev->dev,
PAGE_ALIGN(fbdev->fb_len),
&fbdev->fb_phys, GFP_KERNEL);
if (!fbdev->fb_mem) {
print_err("fail to allocate frambuffer (size: %dK))",
fbdev->fb_len / 1024);
......@@ -557,14 +560,14 @@ static int __devinit au1100fb_drv_probe(struct platform_device *dev)
fbdev->info.fbops = &au1100fb_ops;
fbdev->info.fix = au1100fb_fix;
if (!(fbdev->info.pseudo_palette = kzalloc(sizeof(u32) * 16, GFP_KERNEL))) {
fbdev->info.pseudo_palette =
devm_kzalloc(&dev->dev, sizeof(u32) * 16, GFP_KERNEL);
if (!fbdev->info.pseudo_palette)
return -ENOMEM;
}
if (fb_alloc_cmap(&fbdev->info.cmap, AU1100_LCD_NBR_PALETTE_ENTRIES, 0) < 0) {
print_err("Fail to allocate colormap (%d entries)",
AU1100_LCD_NBR_PALETTE_ENTRIES);
kfree(fbdev->info.pseudo_palette);
return -EFAULT;
}
......@@ -582,9 +585,6 @@ static int __devinit au1100fb_drv_probe(struct platform_device *dev)
return 0;
failed:
if (fbdev->regs) {
release_mem_region(fbdev->regs_phys, fbdev->regs_len);
}
if (fbdev->fb_mem) {
dma_free_noncoherent(&dev->dev, fbdev->fb_len, fbdev->fb_mem,
fbdev->fb_phys);
......@@ -592,10 +592,9 @@ static int __devinit au1100fb_drv_probe(struct platform_device *dev)
if (fbdev->info.cmap.len != 0) {
fb_dealloc_cmap(&fbdev->info.cmap);
}
kfree(fbdev);
platform_set_drvdata(dev, NULL);
return 0;
return -ENODEV;
}
int au1100fb_drv_remove(struct platform_device *dev)
......@@ -615,14 +614,7 @@ int au1100fb_drv_remove(struct platform_device *dev)
/* Clean up all probe data */
unregister_framebuffer(&fbdev->info);
release_mem_region(fbdev->regs_phys, fbdev->regs_len);
dma_free_coherent(&dev->dev, PAGE_ALIGN(fbdev->fb_len), fbdev->fb_mem,
fbdev->fb_phys);
fb_dealloc_cmap(&fbdev->info.cmap);
kfree(fbdev->info.pseudo_palette);
kfree((void*)fbdev);
return 0;
}
......
......@@ -1724,7 +1724,7 @@ static int __devinit au1200fb_drv_probe(struct platform_device *dev)
/* Allocate the framebuffer to the maximum screen size */
fbdev->fb_len = (win->w[plane].xres * win->w[plane].yres * bpp) / 8;
fbdev->fb_mem = dma_alloc_noncoherent(&dev->dev,
fbdev->fb_mem = dmam_alloc_noncoherent(&dev->dev, &dev->dev,
PAGE_ALIGN(fbdev->fb_len),
&fbdev->fb_phys, GFP_KERNEL);
if (!fbdev->fb_mem) {
......@@ -1788,9 +1788,6 @@ static int __devinit au1200fb_drv_probe(struct platform_device *dev)
failed:
/* NOTE: This only does the current plane/window that failed; others are still active */
if (fbdev->fb_mem)
dma_free_noncoherent(&dev->dev, PAGE_ALIGN(fbdev->fb_len),
fbdev->fb_mem, fbdev->fb_phys);
if (fbi) {
if (fbi->cmap.len != 0)
fb_dealloc_cmap(&fbi->cmap);
......@@ -1817,10 +1814,6 @@ static int __devexit au1200fb_drv_remove(struct platform_device *dev)
/* Clean up all probe data */
unregister_framebuffer(fbi);
if (fbdev->fb_mem)
dma_free_noncoherent(&dev->dev,
PAGE_ALIGN(fbdev->fb_len),
fbdev->fb_mem, fbdev->fb_phys);
if (fbi->cmap.len != 0)
fb_dealloc_cmap(&fbi->cmap);
kfree(fbi->pseudo_palette);
......
......@@ -383,23 +383,19 @@ static int __devinit request_ports(void)
}
#if (defined(UD) && defined(LBR))
if (gpio_request(UD, KBUILD_MODNAME)) {
if (gpio_request_one(UD, GPIOF_OUT_INIT_LOW, KBUILD_MODNAME)) {
pr_err("requesting GPIO %d failed\n", UD);
return -EBUSY;
}
if (gpio_request(LBR, KBUILD_MODNAME)) {
if (gpio_request_one(LBR, GPIOF_OUT_INIT_HIGH, KBUILD_MODNAME)) {
pr_err("requesting GPIO %d failed\n", LBR);
gpio_free(UD);
return -EBUSY;
}
gpio_direction_output(UD, 0);
gpio_direction_output(LBR, 1);
#endif
if (gpio_request(MOD, KBUILD_MODNAME)) {
if (gpio_request_one(MOD, GPIOF_OUT_INIT_HIGH, KBUILD_MODNAME)) {
pr_err("requesting GPIO %d failed\n", MOD);
#if (defined(UD) && defined(LBR))
gpio_free(LBR);
......@@ -408,8 +404,6 @@ static int __devinit request_ports(void)
return -EBUSY;
}
gpio_direction_output(MOD, 1);
SSYNC();
return 0;
}
......
......@@ -240,7 +240,7 @@ static int request_ports(struct bfin_bf54xfb_info *fbi)
u16 eppi_req_18[] = EPPI0_18;
u16 disp = fbi->mach_info->disp;
if (gpio_request(disp, DRIVER_NAME)) {
if (gpio_request_one(disp, GPIOF_OUT_INIT_HIGH, DRIVER_NAME)) {
printk(KERN_ERR "Requesting GPIO %d failed\n", disp);
return -EFAULT;
}
......@@ -263,8 +263,6 @@ static int request_ports(struct bfin_bf54xfb_info *fbi)
}
}
gpio_direction_output(disp, 1);
return 0;
}
......
......@@ -365,10 +365,10 @@ static int __devinit bfin_lq035q1_request_ports(struct platform_device *pdev,
* Drive PPI_FS3 Low
*/
if (ANOMALY_05000400) {
int ret = gpio_request(P_IDENT(P_PPI0_FS3), "PPI_FS3");
int ret = gpio_request_one(P_IDENT(P_PPI0_FS3),
GPIOF_OUT_INIT_LOW, "PPI_FS3");
if (ret)
return ret;
gpio_direction_output(P_IDENT(P_PPI0_FS3), 0);
}
if (ppi16)
......@@ -716,14 +716,14 @@ static int __devinit bfin_lq035q1_probe(struct platform_device *pdev)
}
if (info->disp_info->use_bl) {
ret = gpio_request(info->disp_info->gpio_bl, "LQ035 Backlight");
ret = gpio_request_one(info->disp_info->gpio_bl,
GPIOF_OUT_INIT_LOW, "LQ035 Backlight");
if (ret) {
dev_err(&pdev->dev, "failed to request GPIO %d\n",
info->disp_info->gpio_bl);
goto out9;
}
gpio_direction_output(info->disp_info->gpio_bl, 0);
}
ret = register_framebuffer(fbinfo);
......
......@@ -36,9 +36,7 @@
#include <linux/dma-mapping.h>
#include <linux/proc_fs.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/i2c-dev.h>
#include "bfin_adv7393fb.h"
......@@ -411,12 +409,13 @@ static int __devinit bfin_adv7393_fb_probe(struct i2c_client *client,
/* Workaround "PPI Does Not Start Properly In Specific Mode" */
if (ANOMALY_05000400) {
if (gpio_request(P_IDENT(P_PPI0_FS3), "PPI0_FS3")) {
ret = gpio_request_one(P_IDENT(P_PPI0_FS3), GPIOF_OUT_INIT_LOW,
"PPI0_FS3")
if (ret) {
dev_err(&client->dev, "PPI0_FS3 GPIO request failed\n");
ret = -EBUSY;
goto out_8;
}
gpio_direction_output(P_IDENT(P_PPI0_FS3), 0);
}
if (peripheral_request_list(ppi_pins, DRIVER_NAME)) {
......
......@@ -32,6 +32,7 @@
#include <linux/console.h>
#include <linux/slab.h>
#include <video/da8xx-fb.h>
#include <asm/div64.h>
#define DRIVER_NAME "da8xx_lcdc"
......@@ -161,6 +162,7 @@ struct da8xx_fb_par {
int vsync_timeout;
#ifdef CONFIG_CPU_FREQ
struct notifier_block freq_transition;
unsigned int lcd_fck_rate;
#endif
void (*panel_power_ctrl)(int);
};
......@@ -174,7 +176,6 @@ static struct fb_var_screeninfo da8xx_fb_var __devinitdata = {
.activate = 0,
.height = -1,
.width = -1,
.pixclock = 46666, /* 46us - AUO display */
.accel_flags = 0,
.left_margin = LEFT_MARGIN,
.right_margin = RIGHT_MARGIN,
......@@ -238,6 +239,20 @@ static struct da8xx_panel known_lcd_panels[] = {
.pxl_clk = 7833600,
.invert_pxl_clk = 0,
},
[2] = {
/* Hitachi SP10Q010 */
.name = "SP10Q010",
.width = 320,
.height = 240,
.hfp = 10,
.hbp = 10,
.hsw = 10,
.vfp = 10,
.vbp = 10,
.vsw = 10,
.pxl_clk = 7833600,
.invert_pxl_clk = 0,
},
};
/* Enable the Raster Engine of the LCD Controller */
......@@ -546,7 +561,26 @@ static int fb_setcolreg(unsigned regno, unsigned red, unsigned green,
if (info->fix.visual == FB_VISUAL_DIRECTCOLOR)
return 1;
if (info->var.bits_per_pixel == 8) {
if (info->var.bits_per_pixel == 4) {
if (regno > 15)
return 1;
if (info->var.grayscale) {
pal = regno;
} else {
red >>= 4;
green >>= 8;
blue >>= 12;
pal = (red & 0x0f00);
pal |= (green & 0x00f0);
pal |= (blue & 0x000f);
}
if (regno == 0)
pal |= 0x2000;
palette[regno] = pal;
} else if (info->var.bits_per_pixel == 8) {
red >>= 4;
green >>= 8;
blue >>= 12;
......@@ -801,6 +835,7 @@ static int fb_check_var(struct fb_var_screeninfo *var,
var->blue.length = 8;
var->transp.offset = 0;
var->transp.length = 0;
var->nonstd = 0;
break;
case 4:
var->red.offset = 0;
......@@ -811,6 +846,7 @@ static int fb_check_var(struct fb_var_screeninfo *var,
var->blue.length = 4;
var->transp.offset = 0;
var->transp.length = 0;
var->nonstd = FB_NONSTD_REV_PIX_IN_B;
break;
case 16: /* RGB 565 */
var->red.offset = 11;
......@@ -821,6 +857,7 @@ static int fb_check_var(struct fb_var_screeninfo *var,
var->blue.length = 5;
var->transp.offset = 0;
var->transp.length = 0;
var->nonstd = 0;
break;
default:
err = -EINVAL;
......@@ -840,11 +877,13 @@ static int lcd_da8xx_cpufreq_transition(struct notifier_block *nb,
struct da8xx_fb_par *par;
par = container_of(nb, struct da8xx_fb_par, freq_transition);
if (val == CPUFREQ_PRECHANGE) {
lcd_disable_raster();
} else if (val == CPUFREQ_POSTCHANGE) {
lcd_calc_clk_divider(par);
lcd_enable_raster();
if (val == CPUFREQ_POSTCHANGE) {
if (par->lcd_fck_rate != clk_get_rate(par->lcdc_clk)) {
par->lcd_fck_rate = clk_get_rate(par->lcdc_clk);
lcd_disable_raster();
lcd_calc_clk_divider(par);
lcd_enable_raster();
}
}
return 0;
......@@ -1048,6 +1087,22 @@ static struct fb_ops da8xx_fb_ops = {
.fb_blank = cfb_blank,
};
/* Calculate and return pixel clock period in pico seconds */
static unsigned int da8xxfb_pixel_clk_period(struct da8xx_fb_par *par)
{
unsigned int lcd_clk, div;
unsigned int configured_pix_clk;
unsigned long long pix_clk_period_picosec = 1000000000000ULL;
lcd_clk = clk_get_rate(par->lcdc_clk);
div = lcd_clk / par->pxl_clk;
configured_pix_clk = (lcd_clk / div);
do_div(pix_clk_period_picosec, configured_pix_clk);
return pix_clk_period_picosec;
}
static int __devinit fb_probe(struct platform_device *device)
{
struct da8xx_lcdc_platform_data *fb_pdata =
......@@ -1137,6 +1192,9 @@ static int __devinit fb_probe(struct platform_device *device)
par = da8xx_fb_info->par;
par->lcdc_clk = fb_clk;
#ifdef CONFIG_CPU_FREQ
par->lcd_fck_rate = clk_get_rate(fb_clk);
#endif
par->pxl_clk = lcdc_info->pxl_clk;
if (fb_pdata->panel_power_ctrl) {
par->panel_power_ctrl = fb_pdata->panel_power_ctrl;
......@@ -1209,6 +1267,11 @@ static int __devinit fb_probe(struct platform_device *device)
da8xx_fb_var.hsync_len = lcdc_info->hsw;
da8xx_fb_var.vsync_len = lcdc_info->vsw;
da8xx_fb_var.right_margin = lcdc_info->hfp;
da8xx_fb_var.left_margin = lcdc_info->hbp;
da8xx_fb_var.lower_margin = lcdc_info->vfp;
da8xx_fb_var.upper_margin = lcdc_info->vbp;
da8xx_fb_var.pixclock = da8xxfb_pixel_clk_period(par);
/* Initialize fbinfo */
da8xx_fb_info->flags = FBINFO_FLAG_DEFAULT;
......@@ -1264,8 +1327,8 @@ static int __devinit fb_probe(struct platform_device *device)
irq_freq:
#ifdef CONFIG_CPU_FREQ
lcd_da8xx_cpufreq_deregister(par);
#endif
err_cpu_freq:
#endif
unregister_framebuffer(da8xx_fb_info);
err_dealloc_cmap:
......
#
# Exynos Video configuration
#
menuconfig EXYNOS_VIDEO
bool "Exynos Video driver support"
help
This enables support for EXYNOS Video device.
if EXYNOS_VIDEO
#
# MIPI DSI driver
#
config EXYNOS_MIPI_DSI
bool "EXYNOS MIPI DSI driver support."
depends on ARCH_S5PV210 || ARCH_EXYNOS
help
This enables support for MIPI-DSI device.
config EXYNOS_LCD_S6E8AX0
bool "S6E8AX0 MIPI AMOLED LCD Driver"
depends on (EXYNOS_MIPI_DSI && BACKLIGHT_CLASS_DEVICE && LCD_CLASS_DEVICE)
default n
help
If you have an S6E8AX0 MIPI AMOLED LCD Panel, say Y to enable its
LCD control driver.
config EXYNOS_DP
bool "EXYNOS DP driver support"
depends on ARCH_EXYNOS
default n
help
This enables support for DP device.
endif # EXYNOS_VIDEO
#
# Makefile for the exynos video drivers.
#
obj-$(CONFIG_EXYNOS_MIPI_DSI) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o \
exynos_mipi_dsi_lowlevel.o
obj-$(CONFIG_EXYNOS_LCD_S6E8AX0) += s6e8ax0.o
obj-$(CONFIG_EXYNOS_DP) += exynos_dp_core.o exynos_dp_reg.o
This diff is collapsed.
/*
* Header file for Samsung DP (Display Port) interface driver.
*
* Copyright (C) 2012 Samsung Electronics Co., Ltd.
* Author: Jingoo Han <jg1.han@samsung.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef _EXYNOS_DP_CORE_H
#define _EXYNOS_DP_CORE_H
struct link_train {
int eq_loop;
int cr_loop[4];
u8 link_rate;
u8 lane_count;
u8 training_lane[4];
enum link_training_state lt_state;
};
struct exynos_dp_device {
struct device *dev;
struct resource *res;
struct clk *clock;
unsigned int irq;
void __iomem *reg_base;
struct video_info *video_info;
struct link_train link_train;
};
/* exynos_dp_reg.c */
void exynos_dp_enable_video_mute(struct exynos_dp_device *dp, bool enable);
void exynos_dp_stop_video(struct exynos_dp_device *dp);
void exynos_dp_lane_swap(struct exynos_dp_device *dp, bool enable);
void exynos_dp_init_interrupt(struct exynos_dp_device *dp);
void exynos_dp_reset(struct exynos_dp_device *dp);
void exynos_dp_config_interrupt(struct exynos_dp_device *dp);
u32 exynos_dp_get_pll_lock_status(struct exynos_dp_device *dp);
void exynos_dp_set_pll_power_down(struct exynos_dp_device *dp, bool enable);
void exynos_dp_set_analog_power_down(struct exynos_dp_device *dp,
enum analog_power_block block,
bool enable);
void exynos_dp_init_analog_func(struct exynos_dp_device *dp);
void exynos_dp_init_hpd(struct exynos_dp_device *dp);
void exynos_dp_reset_aux(struct exynos_dp_device *dp);
void exynos_dp_init_aux(struct exynos_dp_device *dp);
int exynos_dp_get_plug_in_status(struct exynos_dp_device *dp);
void exynos_dp_enable_sw_function(struct exynos_dp_device *dp);
int exynos_dp_start_aux_transaction(struct exynos_dp_device *dp);
int exynos_dp_write_byte_to_dpcd(struct exynos_dp_device *dp,
unsigned int reg_addr,
unsigned char data);
int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
unsigned int reg_addr,
unsigned char *data);
int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
unsigned int reg_addr,
unsigned int count,
unsigned char data[]);
int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
unsigned int reg_addr,
unsigned int count,
unsigned char data[]);
int exynos_dp_select_i2c_device(struct exynos_dp_device *dp,
unsigned int device_addr,
unsigned int reg_addr);
int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
unsigned int device_addr,
unsigned int reg_addr,
unsigned int *data);
int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
unsigned int device_addr,
unsigned int reg_addr,
unsigned int count,
unsigned char edid[]);
void exynos_dp_set_link_bandwidth(struct exynos_dp_device *dp, u32 bwtype);
void exynos_dp_get_link_bandwidth(struct exynos_dp_device *dp, u32 *bwtype);
void exynos_dp_set_lane_count(struct exynos_dp_device *dp, u32 count);
void exynos_dp_get_lane_count(struct exynos_dp_device *dp, u32 *count);
void exynos_dp_set_link_bandwidth(struct exynos_dp_device *dp, u32 bwtype);
void exynos_dp_get_link_bandwidth(struct exynos_dp_device *dp, u32 *bwtype);
void exynos_dp_set_lane_count(struct exynos_dp_device *dp, u32 count);
void exynos_dp_get_lane_count(struct exynos_dp_device *dp, u32 *count);
void exynos_dp_enable_enhanced_mode(struct exynos_dp_device *dp, bool enable);
void exynos_dp_set_training_pattern(struct exynos_dp_device *dp,
enum pattern_set pattern);
void exynos_dp_set_lane0_pre_emphasis(struct exynos_dp_device *dp, u32 level);
void exynos_dp_set_lane1_pre_emphasis(struct exynos_dp_device *dp, u32 level);
void exynos_dp_set_lane2_pre_emphasis(struct exynos_dp_device *dp, u32 level);
void exynos_dp_set_lane3_pre_emphasis(struct exynos_dp_device *dp, u32 level);
void exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp,
u32 training_lane);
void exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp,
u32 training_lane);
void exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp,
u32 training_lane);
void exynos_dp_set_lane3_link_training(struct exynos_dp_device *dp,
u32 training_lane);
u32 exynos_dp_get_lane0_link_training(struct exynos_dp_device *dp);
u32 exynos_dp_get_lane1_link_training(struct exynos_dp_device *dp);
u32 exynos_dp_get_lane2_link_training(struct exynos_dp_device *dp);
u32 exynos_dp_get_lane3_link_training(struct exynos_dp_device *dp);
void exynos_dp_reset_macro(struct exynos_dp_device *dp);
int exynos_dp_init_video(struct exynos_dp_device *dp);
void exynos_dp_set_video_color_format(struct exynos_dp_device *dp,
u32 color_depth,
u32 color_space,
u32 dynamic_range,
u32 ycbcr_coeff);
int exynos_dp_is_slave_video_stream_clock_on(struct exynos_dp_device *dp);
void exynos_dp_set_video_cr_mn(struct exynos_dp_device *dp,
enum clock_recovery_m_value_type type,
u32 m_value,
u32 n_value);
void exynos_dp_set_video_timing_mode(struct exynos_dp_device *dp, u32 type);
void exynos_dp_enable_video_master(struct exynos_dp_device *dp, bool enable);
void exynos_dp_start_video(struct exynos_dp_device *dp);
int exynos_dp_is_video_stream_on(struct exynos_dp_device *dp);
void exynos_dp_config_video_slave_mode(struct exynos_dp_device *dp,
struct video_info *video_info);
void exynos_dp_enable_scrambling(struct exynos_dp_device *dp);
void exynos_dp_disable_scrambling(struct exynos_dp_device *dp);
/* I2C EDID Chip ID, Slave Address */
#define I2C_EDID_DEVICE_ADDR 0x50
#define I2C_E_EDID_DEVICE_ADDR 0x30
#define EDID_BLOCK_LENGTH 0x80
#define EDID_HEADER_PATTERN 0x00
#define EDID_EXTENSION_FLAG 0x7e
#define EDID_CHECKSUM 0x7f
/* Definition for DPCD Register */
#define DPCD_ADDR_DPCD_REV 0x0000
#define DPCD_ADDR_MAX_LINK_RATE 0x0001
#define DPCD_ADDR_MAX_LANE_COUNT 0x0002
#define DPCD_ADDR_LINK_BW_SET 0x0100
#define DPCD_ADDR_LANE_COUNT_SET 0x0101
#define DPCD_ADDR_TRAINING_PATTERN_SET 0x0102
#define DPCD_ADDR_TRAINING_LANE0_SET 0x0103
#define DPCD_ADDR_LANE0_1_STATUS 0x0202
#define DPCD_ADDR_LANE_ALIGN__STATUS_UPDATED 0x0204
#define DPCD_ADDR_ADJUST_REQUEST_LANE0_1 0x0206
#define DPCD_ADDR_ADJUST_REQUEST_LANE2_3 0x0207
#define DPCD_ADDR_TEST_REQUEST 0x0218
#define DPCD_ADDR_TEST_RESPONSE 0x0260
#define DPCD_ADDR_TEST_EDID_CHECKSUM 0x0261
#define DPCD_ADDR_SINK_POWER_STATE 0x0600
/* DPCD_ADDR_MAX_LANE_COUNT */
#define DPCD_ENHANCED_FRAME_CAP(x) (((x) >> 7) & 0x1)
#define DPCD_MAX_LANE_COUNT(x) ((x) & 0x1f)
/* DPCD_ADDR_LANE_COUNT_SET */
#define DPCD_ENHANCED_FRAME_EN (0x1 << 7)
#define DPCD_LANE_COUNT_SET(x) ((x) & 0x1f)
/* DPCD_ADDR_TRAINING_PATTERN_SET */
#define DPCD_SCRAMBLING_DISABLED (0x1 << 5)
#define DPCD_SCRAMBLING_ENABLED (0x0 << 5)
#define DPCD_TRAINING_PATTERN_2 (0x2 << 0)
#define DPCD_TRAINING_PATTERN_1 (0x1 << 0)
#define DPCD_TRAINING_PATTERN_DISABLED (0x0 << 0)
/* DPCD_ADDR_TRAINING_LANE0_SET */
#define DPCD_MAX_PRE_EMPHASIS_REACHED (0x1 << 5)
#define DPCD_PRE_EMPHASIS_SET(x) (((x) & 0x3) << 3)
#define DPCD_PRE_EMPHASIS_GET(x) (((x) >> 3) & 0x3)
#define DPCD_PRE_EMPHASIS_PATTERN2_LEVEL0 (0x0 << 3)
#define DPCD_MAX_SWING_REACHED (0x1 << 2)
#define DPCD_VOLTAGE_SWING_SET(x) (((x) & 0x3) << 0)
#define DPCD_VOLTAGE_SWING_GET(x) (((x) >> 0) & 0x3)
#define DPCD_VOLTAGE_SWING_PATTERN1_LEVEL0 (0x0 << 0)
/* DPCD_ADDR_LANE0_1_STATUS */
#define DPCD_LANE_SYMBOL_LOCKED (0x1 << 2)
#define DPCD_LANE_CHANNEL_EQ_DONE (0x1 << 1)
#define DPCD_LANE_CR_DONE (0x1 << 0)
#define DPCD_CHANNEL_EQ_BITS (DPCD_LANE_CR_DONE| \
DPCD_LANE_CHANNEL_EQ_DONE|\
DPCD_LANE_SYMBOL_LOCKED)
/* DPCD_ADDR_LANE_ALIGN__STATUS_UPDATED */
#define DPCD_LINK_STATUS_UPDATED (0x1 << 7)
#define DPCD_DOWNSTREAM_PORT_STATUS_CHANGED (0x1 << 6)
#define DPCD_INTERLANE_ALIGN_DONE (0x1 << 0)
/* DPCD_ADDR_TEST_REQUEST */
#define DPCD_TEST_EDID_READ (0x1 << 2)
/* DPCD_ADDR_TEST_RESPONSE */
#define DPCD_TEST_EDID_CHECKSUM_WRITE (0x1 << 2)
/* DPCD_ADDR_SINK_POWER_STATE */
#define DPCD_SET_POWER_STATE_D0 (0x1 << 0)
#define DPCD_SET_POWER_STATE_D4 (0x2 << 0)
#endif /* _EXYNOS_DP_CORE_H */
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/* linux/drivers/video/backlight/s6e8ax0.h
*
* MIPI-DSI based s6e8ax0 AMOLED LCD Panel definitions.
*
* Copyright (c) 2011 Samsung Electronics
*
* Inki Dae, <inki.dae@samsung.com>
* Donghwa Lee <dh09.lee@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _S6E8AX0_H
#define _S6E8AX0_H
extern void s6e8ax0_init(void);
#endif
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......@@ -264,16 +264,6 @@ static struct spi_driver lb035q02_spi_driver = {
.remove = __devexit_p(lb035q02_panel_spi_remove),
};
static int __init lb035q02_panel_drv_init(void)
{
return spi_register_driver(&lb035q02_spi_driver);
}
static void __exit lb035q02_panel_drv_exit(void)
{
spi_unregister_driver(&lb035q02_spi_driver);
}
module_spi_driver(lb035q02_spi_driver);
module_init(lb035q02_panel_drv_init);
module_exit(lb035q02_panel_drv_exit);
MODULE_LICENSE("GPL");
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