Commit 43e968ce authored by Derek Browne's avatar Derek Browne Committed by Ulf Hansson

mmc: sdhci-pci: SDIO host controller support for Intel Quark X1000

This patch is to enable SDIO host controller for Intel Quark X1000.
Signed-off-by: default avatarDerek Browne <Derek.Browne@intel.com>
Signed-off-by: default avatarAlvin (Weike) Chen <alvin.chen@intel.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent c938a53a
......@@ -103,6 +103,10 @@ static const struct sdhci_pci_fixes sdhci_cafe = {
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
};
static const struct sdhci_pci_fixes sdhci_intel_qrk = {
.quirks = SDHCI_QUIRK_NO_HISPD_BIT,
};
static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
{
slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
......@@ -751,6 +755,14 @@ static const struct pci_device_id pci_ids[] = {
.driver_data = (kernel_ulong_t)&sdhci_rtsx,
},
{
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_QRK_SD,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
.driver_data = (kernel_ulong_t)&sdhci_intel_qrk,
},
{
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_MRST_SD0,
......
......@@ -17,6 +17,7 @@
#define PCI_DEVICE_ID_INTEL_CLV_SDIO2 0x08fb
#define PCI_DEVICE_ID_INTEL_CLV_EMMC0 0x08e5
#define PCI_DEVICE_ID_INTEL_CLV_EMMC1 0x08e6
#define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7
/*
* PCI registers
......
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