[ARM] SA1100 cleanups:

 - Only map Neponset if Neponset is present.
 - Remove IRQ debugging
 - Move GPIO_11_27_IRQ macro
 - Supply CS macros to define physical addresses.
 - Remove defunct PCMCIA base addresses definitions.

arch/arm/mach-sa1100/assabet.c

@@ -103,7 +103,6 @@ static int __init assabet_init(void)
 		 * or BCR_clear().
 		 */
 		ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
-		NCR_0 = 0;
 
 #ifndef CONFIG_ASSABET_NEPONSET
 		printk( "Warning: Neponset detected but full support "
@@ -311,17 +310,16 @@ static void __init assabet_map_io(void)
 	sa1100_map_io();
 	iotable_init(assabet_io_desc);
 
+	if (machine_has_neponset()) {
 #ifdef CONFIG_ASSABET_NEPONSET
-	/*
-	 * We map Neponset registers even if it isn't present since
-	 * many drivers will try to probe their stuff (and fail).
-	 * This is still more friendly than a kernel paging request
-	 * crash.
-	 */
-	neponset_map_io();
+		/*
+		 * We map Neponset registers even if it isn't present since
+		 * many drivers will try to probe their stuff (and fail).
+		 * This is still more friendly than a kernel paging request
+		 * crash.
+		 */
+		neponset_map_io();
 #endif
-
-	if (machine_has_neponset()) {
 		/*
 		 * When Neponset is attached, the first UART should be
 		 * UART3.  That's what Angel is doing and many documents

arch/arm/mach-sa1100/irq.c

@@ -40,32 +40,30 @@ static void sa1100_manual_rerun(unsigned int irq)
 	irq_desc[irq].handle(irq, &irq_desc[irq], &regs);
 }
 
+/*
+ * To get the GPIO number from an IRQ number
+ */
+#define GPIO_11_27_IRQ(i)	((i) - 21)
 #define GPIO11_27_MASK(irq)	(1 << GPIO_11_27_IRQ(irq))
 
 static int sa1100_gpio_type(unsigned int irq, unsigned int type)
 {
 	unsigned int mask;
 
-	printk(KERN_DEBUG "IRQ%d: ", irq);
-
 	if (irq <= 10)
 		mask = 1 << irq;
 	else
 		mask = GPIO11_27_MASK(irq);
 
 	if (type & __IRQT_RISEDGE) {
-		printk("rising ");
 		GPIO_IRQ_rising_edge |= mask;
 	} else
 		GPIO_IRQ_rising_edge &= ~mask;
 	if (type & __IRQT_FALEDGE) {
-		printk("falling ");
 		GPIO_IRQ_falling_edge |= mask;
 	} else
 		GPIO_IRQ_falling_edge &= ~mask;
 
-	printk("edges\n");
-
 	GRER = GPIO_IRQ_rising_edge & GPIO_IRQ_mask;
 	GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
 

arch/arm/mach-sa1100/neponset.c

@@ -84,7 +84,7 @@ neponset_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *reg
 	}
 }
 
-static void __init neponset_init_irq(void)
+static inline void __init neponset_init_irq(void)
 {
 	/*
 	 * Install handler for GPIO25.
@@ -102,6 +102,64 @@ static void __init neponset_init_irq(void)
 	set_irq_flags(IRQ_NEPONSET_USAR, IRQF_VALID | IRQF_PROBE);
 }
 
+static void neponset_set_mctrl(struct uart_port *port, u_int mctrl)
+{
+	u_int mdm_ctl0 = MDM_CTL_0;
+
+	if (port->mapbase == _Ser1UTCR0) {
+		if (mctrl & TIOCM_RTS)
+			mdm_ctl0 &= ~MDM_CTL0_RTS2;
+		else
+			mdm_ctl0 |= MDM_CTL0_RTS2;
+
+		if (mctrl & TIOCM_DTR)
+			mdm_ctl0 &= ~MDM_CTL0_DTR2;
+		else
+			mdm_ctl0 |= MDM_CTL0_DTR2;
+	} else if (port->mapbase == _Ser3UTCR0) {
+		if (mctrl & TIOCM_RTS)
+			mdm_ctl0 &= ~MDM_CTL0_RTS1;
+		else
+			mdm_ctl0 |= MDM_CTL0_RTS1;
+
+		if (mctrl & TIOCM_DTR)
+			mdm_ctl0 &= ~MDM_CTL0_DTR1;
+		else
+			mdm_ctl0 |= MDM_CTL0_DTR1;
+	}
+
+	MDM_CTL_0 = mdm_ctl0;
+}
+
+static u_int neponset_get_mctrl(struct uart_port *port)
+{
+	u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
+	u_int mdm_ctl1 = MDM_CTL_1;
+
+	if (port->mapbase == _Ser1UTCR0) {
+		if (mdm_ctl1 & MDM_CTL1_DCD2)
+			ret &= ~TIOCM_CD;
+		if (mdm_ctl1 & MDM_CTL1_CTS2)
+			ret &= ~TIOCM_CTS;
+		if (mdm_ctl1 & MDM_CTL1_DSR2)
+			ret &= ~TIOCM_DSR;
+	} else if (port->mapbase == _Ser3UTCR0) {
+		if (mdm_ctl1 & MDM_CTL1_DCD1)
+			ret &= ~TIOCM_CD;
+		if (mdm_ctl1 & MDM_CTL1_CTS1)
+			ret &= ~TIOCM_CTS;
+		if (mdm_ctl1 & MDM_CTL1_DSR1)
+			ret &= ~TIOCM_DSR;
+	}
+
+	return ret;
+}
+
+static struct sa1100_port_fns neponset_port_fns __initdata = {
+	set_mctrl:	neponset_set_mctrl,
+	get_mctrl:	neponset_get_mctrl,
+};
+
 static int __init neponset_init(void)
 {
 	int ret;
@@ -134,12 +192,14 @@ static int __init neponset_init(void)
 	if (ret)
 		return ret;
 
+	sa1100_register_uart_fns(&neponset_port_fns);
+
 	neponset_init_irq();
 
 	/*
 	 * Disable GPIO 0/1 drivers so the buttons work on the module.
 	 */
-	NCR_0 |= NCR_GP01_OFF;
+	NCR_0 = NCR_GP01_OFF;
 
 	/*
 	 * Neponset has SA1111 connected to CS4.  We know that after
@@ -162,67 +222,7 @@ static struct map_desc neponset_io_desc[] __initdata = {
   LAST_DESC
 };
 
-static void neponset_set_mctrl(struct uart_port *port, u_int mctrl)
-{
-	u_int mdm_ctl0 = MDM_CTL_0;
-
-	if (port->mapbase == _Ser1UTCR0) {
-		if (mctrl & TIOCM_RTS)
-			mdm_ctl0 &= ~MDM_CTL0_RTS2;
-		else
-			mdm_ctl0 |= MDM_CTL0_RTS2;
-
-		if (mctrl & TIOCM_DTR)
-			mdm_ctl0 &= ~MDM_CTL0_DTR2;
-		else
-			mdm_ctl0 |= MDM_CTL0_DTR2;
-	} else if (port->mapbase == _Ser3UTCR0) {
-		if (mctrl & TIOCM_RTS)
-			mdm_ctl0 &= ~MDM_CTL0_RTS1;
-		else
-			mdm_ctl0 |= MDM_CTL0_RTS1;
-
-		if (mctrl & TIOCM_DTR)
-			mdm_ctl0 &= ~MDM_CTL0_DTR1;
-		else
-			mdm_ctl0 |= MDM_CTL0_DTR1;
-	}
-
-	MDM_CTL_0 = mdm_ctl0;
-}
-
-static u_int neponset_get_mctrl(struct uart_port *port)
-{
-	u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
-	u_int mdm_ctl1 = MDM_CTL_1;
-
-	if (port->mapbase == _Ser1UTCR0) {
-		if (mdm_ctl1 & MDM_CTL1_DCD2)
-			ret &= ~TIOCM_CD;
-		if (mdm_ctl1 & MDM_CTL1_CTS2)
-			ret &= ~TIOCM_CTS;
-		if (mdm_ctl1 & MDM_CTL1_DSR2)
-			ret &= ~TIOCM_DSR;
-	} else if (port->mapbase == _Ser3UTCR0) {
-		if (mdm_ctl1 & MDM_CTL1_DCD1)
-			ret &= ~TIOCM_CD;
-		if (mdm_ctl1 & MDM_CTL1_CTS1)
-			ret &= ~TIOCM_CTS;
-		if (mdm_ctl1 & MDM_CTL1_DSR1)
-			ret &= ~TIOCM_DSR;
-	}
-
-	return ret;
-}
-
-static struct sa1100_port_fns neponset_port_fns __initdata = {
-	set_mctrl:	neponset_set_mctrl,
-	get_mctrl:	neponset_get_mctrl,
-};
-
 void __init neponset_map_io(void)
 {
 	iotable_init(neponset_io_desc);
-	if (machine_has_neponset())
-		sa1100_register_uart_fns(&neponset_port_fns);
 }

include/asm-arm/arch-sa1100/SA-1100.h

@@ -22,6 +22,16 @@
 
 #include "bitfield.h"
 
+/*
+ * SA1100 CS line to physical address
+ */
+
+#define SA1100_CS0_PHYS	0x00000000
+#define SA1100_CS1_PHYS	0x08000000
+#define SA1100_CS2_PHYS	0x10000000
+#define SA1100_CS3_PHYS	0x18000000
+#define SA1100_CS4_PHYS	0x40000000
+#define SA1100_CS5_PHYS	0x48000000
 
 /*
  * Personal Computer Memory Card International Association (PCMCIA) sockets

include/asm-arm/arch-sa1100/hardware.h

@@ -23,15 +23,6 @@
 #define UNCACHEABLE_ADDR	0xfa050000
 
 
-/*
- * Those are statically mapped PCMCIA IO space for designs using it as a
- * generic IO bus, typically with ISA parts, hardwired IDE interfaces, etc.
- * The actual PCMCIA code is mapping required IO region at run time.
- */
-#define PCMCIA_IO_0_BASE	0xf6000000
-#define PCMCIA_IO_1_BASE	0xf7000000
-
-
 /*
  * We requires absolute addresses i.e. (PCMCIA_IO_0_BASE + 0x3f8) for 
  * in*()/out*() macros to be usable for all cases.

include/asm-arm/arch-sa1100/irqs.h

@@ -60,11 +60,6 @@
 #define	IRQ_GPIO26		47
 #define	IRQ_GPIO27		48
 
-/*
- * To get the GPIO number from an IRQ number
- */
-#define GPIO_11_27_IRQ(i)	((i) - 21)
-
 /*
  * The next 16 interrupts are for board specific purposes.  Since
  * the kernel can only run on one machine at a time, we can re-use