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Commit 48ea582f authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'omap-for-v4.7/dt-signed' of... 

Merge tag 'omap-for-v4.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Merge "Part two of device tree changes for omaps for v4.7 merge window" from Tony Lindgren:

- Fix few typos for address-cells and interrupt-names

- Update dra7 voltage rail limits

- Update compatible string for pcf8575 for both nxp and ti prefix

- Add omap5 configuration for gpadc

- Update dra7 for qspi to remove pinmux as it needs to be done by
  the bootloader in isolation. Also update the qspi for 64MHz
  frequency.

- Add support for Baltos ir2110 and ir3220

- Add industrial and commercial grade thermal thresholds for am57xx

* tag 'omap-for-v4.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am57xx-idk: Include Industrial grade  thermal thresholds
  ARM: dts: am57xx-beagle-x15: Include the commercial grade thresholds
  ARM: dts: am57xx: Introduce industrial grade thermal thresholds
  ARM: dts: am57xx: Introduce commercial grade thermal thresholds
  ARM: dts: add DTS for Baltos IR2110
  ARM: dts: add DTS for Baltos IR3220
  ARM: dts: split am335x-baltos-ir5221 into dts and dtsi files
  ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz
  ARM: dts: dra7x: Remove QSPI pinmux
  ARM: dts: omap5-board-common: describe gpadc for Palmas
  ARM: dts: twl6030: describe gpadc
  ARM: dts: dra7xx: Fix compatible string for PCF8575 chip
  ARM: dts: AM57xx/DRA7: Update SoC voltage rail limits to match data sheet
  ARM: dts: OMAP36xx: : DT spelling s/#address-cell/#address-cells/
  ARM: dts: omap5-cm-t54: DT spelling s/interrupt-name/interrupt-names/
  ARM: dts: omap5-board-common: DT spelling s/interrupt-name/interrupt-names/
parents 2c695998 5b604223
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Documentation/devicetree/bindings/spi/ti_qspi.txt
View file @ 48ea582f
......@@ -19,6 +19,13 @@ Optional properties:
- syscon-chipselects: Handle to system control region contains QSPI
chipselect register and offset of that register.
NOTE: TI QSPI controller requires different pinmux and IODelay
paramaters for Mode-0 and Mode-3 operations, which needs to be set up by
the bootloader (U-Boot). Default configuration only supports Mode-0
operation. Hence, "spi-cpol" and "spi-cpha" DT properties cannot be
specified in the slave nodes of TI QSPI controller without appropriate
modification to bootloader.
Example:
For am4372:
......
arch/arm/boot/dts/Makefile
View file @ 48ea582f
......@@ -506,6 +506,8 @@ dtb-$(CONFIG_SOC_TI81XX) += \
dm8168-evm.dtb \
dra62x-j5eco-evm.dtb
dtb-$(CONFIG_SOC_AM33XX) += \
am335x-baltos-ir2110.dtb \
am335x-baltos-ir3220.dtb \
am335x-baltos-ir5221.dtb \
am335x-base0033.dtb \
am335x-bone.dtb \
......
arch/arm/boot/dts/am335x-baltos-ir2110.dts 0 → 100644
View file @ 48ea582f
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/*
* VScom OnRISC
* http://www.vscom.de
*/
/dts-v1/;
#include "am335x-baltos.dtsi"
/ {
model = "OnRISC Baltos iR 2110";
};
&am33xx_pinmux {
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE0) /* uart1_rxd */
AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE0) /* uart1_txd */
AM33XX_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart1_ctsn */
AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn */
AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */
AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */
AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.gpio2[24] DCD */
AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */
>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
status = "okay";
};
&usb0_phy {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "host";
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <1>;
phy-mode = "rmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <7>;
phy-mode = "rgmii-txid";
dual_emac_res_vlan = <2>;
};
&phy_sel {
rmii-clock-ext = <1>;
};
arch/arm/boot/dts/am335x-baltos-ir3220.dts 0 → 100644
View file @ 48ea582f
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/*
* VScom OnRISC
* http://www.vscom.de
*/
/dts-v1/;
#include "am335x-baltos.dtsi"
/ {
model = "OnRISC Baltos iR 3220";
};
&am33xx_pinmux {
tca6416_pins: pinmux_tca6416_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE7) /* xdma_event_intr1.gpio0[20] tca6416 stuff */
>;
};
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE0) /* uart1_rxd */
AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE0) /* uart1_txd */
AM33XX_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart1_ctsn */
AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn */
AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */
AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */
AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.gpio2[24] DCD */
AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd_mux3 */
AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd_mux3 */
AM33XX_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE2) /* i2c0_sda.uart2_ctsn_mux0 */
AM33XX_IOPAD(0x98c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* i2c0_scl.uart2_rtsn_mux0 */
AM33XX_IOPAD(0x830, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.gpio1[12] DTR */
AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.gpio1[13] DSR */
AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.gpio1[14] DCD */
AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.gpio1[15] RI */
AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
status = "okay";
};
&i2c1 {
tca6416: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gpio0>;
interrupts = <20 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&tca6416_pins>;
};
};
&usb0_phy {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "host";
};
&cpsw_emac0 {
phy-mode = "rmii";
dual_emac_res_vlan = <1>;
fixed-link {
speed = <100>;
full-duplex;
};
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <7>;
phy-mode = "rgmii-txid";
dual_emac_res_vlan = <2>;
};
&phy_sel {
rmii-clock-ext = <1>;
};
arch/arm/boot/dts/am335x-baltos-ir5221.dts
View file @ 48ea582f
This diff is collapsed.
arch/arm/boot/dts/am335x-baltos.dtsi 0 → 100644
View file @ 48ea582f
This diff is collapsed.
arch/arm/boot/dts/am57xx-beagle-x15.dts
View file @ 48ea582f
......@@ -8,6 +8,7 @@
/dts-v1/;
#include "dra74x.dtsi"
#include "am57xx-commercial-grade.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
......@@ -438,7 +439,7 @@ smps45_reg: smps45 {
/* VDD_DSPEVE, VDD_IVA, VDD_GPU */
regulator-name = "smps45";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1150000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
......@@ -447,7 +448,7 @@ smps6_reg: smps6 {
/* VDD_CORE */
regulator-name = "smps6";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1030000>;
regulator-max-microvolt = <1150000>;
regulator-always-on;
regulator-boot-on;
};
......
arch/arm/boot/dts/am57xx-commercial-grade.dtsi 0 → 100644
View file @ 48ea582f
&cpu_alert0 {
temperature = <80000>; /* milliCelsius */
};
&cpu_crit {
temperature = <90000>; /* milliCelsius */
};
&gpu_crit {
temperature = <90000>; /* milliCelsius */
};
&core_crit {
temperature = <90000>; /* milliCelsius */
};
&dspeve_crit {
temperature = <90000>; /* milliCelsius */
};
&iva_crit {
temperature = <90000>; /* milliCelsius */
};
arch/arm/boot/dts/am57xx-idk-common.dtsi
View file @ 48ea582f
......@@ -6,6 +6,8 @@
* published by the Free Software Foundation.
*/
#include "am57xx-industrial-grade.dtsi"
/ {
aliases {
rtc0 = &tps659038_rtc;
......
arch/arm/boot/dts/am57xx-industrial-grade.dtsi 0 → 100644
View file @ 48ea582f
&cpu_alert0 {
temperature = <90000>; /* milliCelsius */
};
&cpu_crit {
temperature = <105000>; /* milliCelsius */
};
&gpu_crit {
temperature = <105000>; /* milliCelsius */
};
&core_crit {
temperature = <105000>; /* milliCelsius */
};
&dspeve_crit {
temperature = <105000>; /* milliCelsius */
};
&iva_crit {
temperature = <105000>; /* milliCelsius */
};
arch/arm/boot/dts/dra7-evm.dts
View file @ 48ea582f
......@@ -226,21 +226,6 @@ DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
>;
};
qspi1_pins: pinmux_qspi1_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x344c, PIN_INPUT | MUX_MODE1) /* gpmc_a3.qspi1_cs2 */
DRA7XX_CORE_IOPAD(0x3450, PIN_INPUT | MUX_MODE1) /* gpmc_a4.qspi1_cs3 */
DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */
DRA7XX_CORE_IOPAD(0x3478, PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */
DRA7XX_CORE_IOPAD(0x347c, PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */
DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */
DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */
DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */
DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */
>;
};
usb1_pins: pinmux_usb1_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
......@@ -431,7 +416,7 @@ smps45_reg: smps45 {
/* VDD_DSPEVE */
regulator-name = "smps45";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1150000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
......@@ -449,7 +434,7 @@ smps7_reg: smps7 {
/* CORE_VDD */
regulator-name = "smps7";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1060000>;
regulator-max-microvolt = <1150000>;
regulator-always-on;
regulator-boot-on;
};
......@@ -556,7 +541,7 @@ sysen2: sysen2 {
};
pcf_lcd: gpio@20 {
compatible = "nxp,pcf8575";
compatible = "ti,pcf8575", "nxp,pcf8575";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
......@@ -567,7 +552,7 @@ pcf_lcd: gpio@20 {
};
pcf_gpio_21: gpio@21 {
compatible = "nxp,pcf8575";
compatible = "ti,pcf8575", "nxp,pcf8575";
reg = <0x21>;
lines-initial-states = <0x1408>;
gpio-controller;
......@@ -601,7 +586,7 @@ &i2c2 {
clock-frequency = <400000>;
pcf_hdmi: gpio@26 {
compatible = "nxp,pcf8575";
compatible = "ti,pcf8575", "nxp,pcf8575";
reg = <0x26>;
gpio-controller;
#gpio-cells = <2>;
......@@ -678,18 +663,14 @@ &cpu0 {
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&qspi1_pins>;
spi-max-frequency = <48000000>;
spi-max-frequency = <64000000>;
m25p80@0 {
compatible = "s25fl256s1";
spi-max-frequency = <48000000>;
spi-max-frequency = <64000000>;
reg = <0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-cpol;
spi-cpha;
#address-cells = <1>;
#size-cells = <1>;
......
arch/arm/boot/dts/dra72-evm-common.dtsi
View file @ 48ea582f
......@@ -241,18 +241,6 @@ DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */
>;
};
qspi1_pins: pinmux_qspi1_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3474, PIN_OUTPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */
DRA7XX_CORE_IOPAD(0x3478, PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */
DRA7XX_CORE_IOPAD(0x347c, PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */
DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */
DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */
DRA7XX_CORE_IOPAD(0x3488, PIN_OUTPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */
DRA7XX_CORE_IOPAD(0x34b8, PIN_OUTPUT | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
>;
};
hdmi_pins: pinmux_hdmi_pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
......@@ -328,7 +316,7 @@ smps2_reg: smps2 {
/* VDD_CORE */
regulator-name = "smps2";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1060000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
......@@ -408,7 +396,7 @@ tps65917_power_button {
};
pcf_gpio_21: gpio@21 {
compatible = "nxp,pcf8575";
compatible = "ti,pcf8575", "nxp,pcf8575";
reg = <0x21>;
lines-initial-states = <0x1408>;
gpio-controller;
......@@ -440,7 +428,7 @@ &i2c5 {
clock-frequency = <400000>;
pcf_hdmi: pcf8575@26 {
compatible = "nxp,pcf8575";
compatible = "ti,pcf8575", "nxp,pcf8575";
reg = <0x26>;
gpio-controller;
#gpio-cells = <2>;
......@@ -692,18 +680,14 @@ &dcan1 {
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&qspi1_pins>;
spi-max-frequency = <48000000>;
spi-max-frequency = <64000000>;
m25p80@0 {
compatible = "s25fl256s1";
spi-max-frequency = <48000000>;
spi-max-frequency = <64000000>;
reg = <0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-cpol;
spi-cpha;
#address-cells = <1>;
#size-cells = <1>;
......
arch/arm/boot/dts/omap36xx.dtsi
View file @ 48ea582f
......@@ -44,7 +44,7 @@ uart4: serial@49042000 {
abb_mpu_iva: regulator-abb-mpu {
compatible = "ti,abb-v1";
regulator-name = "abb_mpu_iva";
#address-cell = <0>;
#address-cells = <0>;
#size-cells = <0>;
reg = <0x483072f0 0x8>, <0x48306818 0x4>;
reg-names = "base-address", "int-address";
......
arch/arm/boot/dts/omap5-board-common.dtsi
View file @ 48ea582f
......@@ -391,11 +391,21 @@ rtc {
ti,backup-battery-charge-high-current;
};
gpadc {
compatible = "ti,palmas-gpadc";
interrupts = <18 0
16 0
17 0>;
#io-channel-cells = <1>;
ti,channel0-current-microamp = <5>;
ti,channel3-current-microamp = <10>;
};
palmas_pmic {
compatible = "ti,palmas-pmic";
interrupt-parent = <&palmas>;
interrupts = <14 IRQ_TYPE_NONE>;
interrupt-name = "short-irq";
interrupt-names = "short-irq";
ti,ldo6-vibrator;
......
arch/arm/boot/dts/omap5-cm-t54.dts
View file @ 48ea582f
......@@ -434,7 +434,7 @@ palmas_pmic {
compatible = "ti,palmas-pmic";
interrupt-parent = <&palmas>;
interrupts = <14 IRQ_TYPE_NONE>;
interrupt-name = "short-irq";
interrupt-names = "short-irq";
ti,ldo6-vibrator;
......
arch/arm/boot/dts/twl6030.dtsi
View file @ 48ea582f
......@@ -99,4 +99,10 @@ twl_pwmled: pwmled {
compatible = "ti,twl6030-pwmled";
#pwm-cells = <2>;
};
gpadc {
compatible = "ti,twl6030-gpadc";
interrupts = <3>;
#io-channel-cells = <1>;
};
};
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