Commit 49e4d842 authored by Chris Wilson's avatar Chris Wilson Committed by Daniel Vetter

drm/i915: Report to userspace if we have a (presumed) working GPU reset

In igt, we want to test handling of GPU hangs, both for recovery
purposes and for reporting. However, we don't want to inject a genuine
GPU hang onto a machine that cannot recover and so be permenantly
wedged. Rather than embed heuristics into igt, have the kernel report
exactly when it expects the GPU reset to work.

This can also be usefully extended in future to indicate different
levels of fine-grained resets.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Tim Gore <tim.gore@intel.com>
Cc: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 0d804184
...@@ -163,6 +163,11 @@ static int i915_getparam(struct drm_device *dev, void *data, ...@@ -163,6 +163,11 @@ static int i915_getparam(struct drm_device *dev, void *data,
if (!value) if (!value)
return -ENODEV; return -ENODEV;
break; break;
case I915_PARAM_HAS_GPU_RESET:
value = i915.enable_hangcheck &&
i915.reset &&
intel_has_gpu_reset(dev);
break;
default: default:
DRM_DEBUG("Unknown parameter %d\n", param->param); DRM_DEBUG("Unknown parameter %d\n", param->param);
return -EINVAL; return -EINVAL;
......
...@@ -2594,6 +2594,7 @@ extern long i915_compat_ioctl(struct file *filp, unsigned int cmd, ...@@ -2594,6 +2594,7 @@ extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
unsigned long arg); unsigned long arg);
#endif #endif
extern int intel_gpu_reset(struct drm_device *dev); extern int intel_gpu_reset(struct drm_device *dev);
extern bool intel_has_gpu_reset(struct drm_device *dev);
extern int i915_reset(struct drm_device *dev); extern int i915_reset(struct drm_device *dev);
extern unsigned long i915_chipset_val(struct drm_i915_private *dev_priv); extern unsigned long i915_chipset_val(struct drm_i915_private *dev_priv);
extern unsigned long i915_mch_val(struct drm_i915_private *dev_priv); extern unsigned long i915_mch_val(struct drm_i915_private *dev_priv);
......
...@@ -1455,20 +1455,36 @@ static int gen6_do_reset(struct drm_device *dev) ...@@ -1455,20 +1455,36 @@ static int gen6_do_reset(struct drm_device *dev)
return ret; return ret;
} }
int intel_gpu_reset(struct drm_device *dev) static int (*intel_get_gpu_reset(struct drm_device *dev))(struct drm_device *)
{ {
if (INTEL_INFO(dev)->gen >= 6) if (INTEL_INFO(dev)->gen >= 6)
return gen6_do_reset(dev); return gen6_do_reset;
else if (IS_GEN5(dev)) else if (IS_GEN5(dev))
return ironlake_do_reset(dev); return ironlake_do_reset;
else if (IS_G4X(dev)) else if (IS_G4X(dev))
return g4x_do_reset(dev); return g4x_do_reset;
else if (IS_G33(dev)) else if (IS_G33(dev))
return g33_do_reset(dev); return g33_do_reset;
else if (INTEL_INFO(dev)->gen >= 3) else if (INTEL_INFO(dev)->gen >= 3)
return i915_do_reset(dev); return i915_do_reset;
else else
return NULL;
}
int intel_gpu_reset(struct drm_device *dev)
{
int (*reset)(struct drm_device *);
reset = intel_get_gpu_reset(dev);
if (reset == NULL)
return -ENODEV; return -ENODEV;
return reset(dev);
}
bool intel_has_gpu_reset(struct drm_device *dev)
{
return intel_get_gpu_reset(dev) != NULL;
} }
void intel_uncore_check_errors(struct drm_device *dev) void intel_uncore_check_errors(struct drm_device *dev)
......
...@@ -354,6 +354,7 @@ typedef struct drm_i915_irq_wait { ...@@ -354,6 +354,7 @@ typedef struct drm_i915_irq_wait {
#define I915_PARAM_REVISION 32 #define I915_PARAM_REVISION 32
#define I915_PARAM_SUBSLICE_TOTAL 33 #define I915_PARAM_SUBSLICE_TOTAL 33
#define I915_PARAM_EU_TOTAL 34 #define I915_PARAM_EU_TOTAL 34
#define I915_PARAM_HAS_GPU_RESET 35
typedef struct drm_i915_getparam { typedef struct drm_i915_getparam {
int param; int param;
......
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