Commit 4a896e60 authored by Sylvain Munaut's avatar Sylvain Munaut Committed by Linus Torvalds

ppc: Name update/coherency and white space corrections for Freescale MPC52xx

 - Whitespace audit
 - IceCube -> LITE5200 (Official name of the platform)
Signed-off-by: default avatarSylvain Munaut <tnt@246tNt.com>
parent 8178ad77
......@@ -64,23 +64,22 @@ struct ocp_def board_ocp[] = {
.vendor = OCP_VENDOR_INVALID
}
};
/* ======================================================================== */
/* Platform specific code */
/* ======================================================================== */
static int
icecube_show_cpuinfo(struct seq_file *m)
lite5200_show_cpuinfo(struct seq_file *m)
{
seq_printf(m, "machine\t\t: Freescale LITE5200\n");
return 0;
}
static void __init
icecube_setup_arch(void)
lite5200_setup_arch(void)
{
/* Add board OCP definitions */
mpc52xx_add_board_devices(board_ocp);
}
......@@ -110,7 +109,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
initrd_end = r5 + KERNELBASE;
}
#endif
/* Load the command line */
if (r6) {
*(char *)(r7+KERNELBASE) = 0;
......@@ -120,14 +119,14 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
/* BAT setup */
mpc52xx_set_bat();
/* No ISA bus AFAIK */
isa_io_base = 0;
isa_mem_base = 0;
/* Setup the ppc_md struct */
ppc_md.setup_arch = icecube_setup_arch;
ppc_md.show_cpuinfo = icecube_show_cpuinfo;
ppc_md.setup_arch = lite5200_setup_arch;
ppc_md.show_cpuinfo = lite5200_show_cpuinfo;
ppc_md.show_percpuinfo = NULL;
ppc_md.init_IRQ = mpc52xx_init_irq;
ppc_md.get_irq = mpc52xx_get_irq;
......@@ -138,12 +137,12 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
ppc_md.restart = mpc52xx_restart;
ppc_md.power_off = mpc52xx_power_off;
ppc_md.halt = mpc52xx_halt;
/* No time keeper on the IceCube */
/* No time keeper on the LITE5200 */
ppc_md.time_init = NULL;
ppc_md.get_rtc_time = NULL;
ppc_md.set_rtc_time = NULL;
ppc_md.calibrate_decr = mpc52xx_calibrate_decr;
#ifdef CONFIG_SERIAL_TEXT_DEBUG
ppc_md.progress = mpc52xx_progress;
......
......@@ -114,7 +114,7 @@ mpc52xx_ic_ack(unsigned int irq)
/*
* Only some irqs are reset here, others in interrupting hardware.
*/
switch (irq) {
case MPC52xx_IRQ0:
val = in_be32(&intr->ctrl);
......@@ -186,7 +186,7 @@ mpc52xx_init_irq(void)
ioremap(MPC52xx_INTR, sizeof(struct mpc52xx_intr));
sdma = (struct mpc52xx_sdma *)
ioremap(MPC52xx_SDMA, sizeof(struct mpc52xx_sdma));
if ((intr==NULL) || (sdma==NULL))
panic("Can't ioremap PIC/SDMA register for init_irq !");
......
/*
* arch/ppc/syslib/mpc52xx_common.c
* arch/ppc/syslib/mpc52xx_setup.c
*
* Common code for the boards based on Freescale MPC52xx embedded CPU.
*
......@@ -38,9 +38,9 @@ void
mpc52xx_restart(char *cmd)
{
struct mpc52xx_gpt* gpt0 = (struct mpc52xx_gpt*) MPC52xx_GPTx(0);
local_irq_disable();
/* Turn on the watchdog and wait for it to expire. It effectively
does a reset */
if (gpt0 != NULL) {
......@@ -105,8 +105,6 @@ mpc52xx_progress(char *s, unsigned short hex)
struct mpc52xx_psc *psc = (struct mpc52xx_psc *)MPC52xx_CONSOLE;
char c;
/* Don't we need to disable serial interrupts ? */
while ((c = *s++) != 0) {
if (c == '\n') {
while (!(in_be16(&psc->mpc52xx_psc_status) &
......@@ -137,7 +135,7 @@ mpc52xx_find_end_of_memory(void)
/* Temp BAT2 mapping active when this is called ! */
mmap_ctl = (struct mpc52xx_mmap_ctl*) MPC52xx_MMAP_CTL;
sdram_config_0 = in_be32(&mmap_ctl->sdram0);
sdram_config_1 = in_be32(&mmap_ctl->sdram1);
......@@ -150,7 +148,7 @@ mpc52xx_find_end_of_memory(void)
iounmap(mmap_ctl);
}
return ramsize;
}
......@@ -167,7 +165,7 @@ mpc52xx_calibrate_decr(void)
/* Get RTC & Clock manager modules */
struct mpc52xx_rtc *rtc;
struct mpc52xx_cdm *cdm;
rtc = (struct mpc52xx_rtc*)
ioremap(MPC52xx_RTC, sizeof(struct mpc52xx_rtc));
cdm = (struct mpc52xx_cdm*)
......@@ -206,7 +204,7 @@ mpc52xx_calibrate_decr(void)
__res.bi_intfreq = cpufreq;
__res.bi_ipbfreq = ipbfreq;
__res.bi_pcifreq = pcifreq;
/* Release mapping */
iounmap((void*)rtc);
iounmap((void*)cdm);
......
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