Commit 4b2079f8 authored by Takashi Sakamoto's avatar Takashi Sakamoto Committed by Takashi Iwai

ALSA: firewire-motu: minor code refactoring for protocol version 2

This commit adds some helper functions to parse register value for
source of sampling clock and nominal sampling transmission frequency.
Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
Link: https://lore.kernel.org/r/20191030080644.1704-5-o-takashi@sakamocchi.jpSigned-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent 3f58f004
...@@ -26,10 +26,20 @@ ...@@ -26,10 +26,20 @@
#define V2_OPT_IFACE_MODE_ADAT 1 #define V2_OPT_IFACE_MODE_ADAT 1
#define V2_OPT_IFACE_MODE_SPDIF 2 #define V2_OPT_IFACE_MODE_SPDIF 2
static int get_clock_rate(u32 data, unsigned int *rate)
{
unsigned int index = (data & V2_CLOCK_RATE_MASK) >> V2_CLOCK_RATE_SHIFT;
if (index >= ARRAY_SIZE(snd_motu_clock_rates))
return -EIO;
*rate = snd_motu_clock_rates[index];
return 0;
}
static int v2_get_clock_rate(struct snd_motu *motu, unsigned int *rate) static int v2_get_clock_rate(struct snd_motu *motu, unsigned int *rate)
{ {
__be32 reg; __be32 reg;
unsigned int index;
int err; int err;
err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, &reg, err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, &reg,
...@@ -37,13 +47,7 @@ static int v2_get_clock_rate(struct snd_motu *motu, unsigned int *rate) ...@@ -37,13 +47,7 @@ static int v2_get_clock_rate(struct snd_motu *motu, unsigned int *rate)
if (err < 0) if (err < 0)
return err; return err;
index = (be32_to_cpu(reg) & V2_CLOCK_RATE_MASK) >> V2_CLOCK_RATE_SHIFT; return get_clock_rate(be32_to_cpu(reg), rate);
if (index >= ARRAY_SIZE(snd_motu_clock_rates))
return -EIO;
*rate = snd_motu_clock_rates[index];
return 0;
} }
static int v2_set_clock_rate(struct snd_motu *motu, unsigned int rate) static int v2_set_clock_rate(struct snd_motu *motu, unsigned int rate)
...@@ -79,38 +83,33 @@ static int v2_set_clock_rate(struct snd_motu *motu, unsigned int rate) ...@@ -79,38 +83,33 @@ static int v2_set_clock_rate(struct snd_motu *motu, unsigned int rate)
sizeof(reg)); sizeof(reg));
} }
static int v2_get_clock_source(struct snd_motu *motu, static int get_clock_source(struct snd_motu *motu, u32 data,
enum snd_motu_clock_source *src) enum snd_motu_clock_source *src)
{ {
__be32 reg; unsigned int index = data & V2_CLOCK_SRC_MASK;
unsigned int index;
int err;
err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, &reg,
sizeof(reg));
if (err < 0)
return err;
index = be32_to_cpu(reg) & V2_CLOCK_SRC_MASK;
if (index > 5) if (index > 5)
return -EIO; return -EIO;
/* To check the configuration of optical interface. */
err = snd_motu_transaction_read(motu, V2_IN_OUT_CONF_OFFSET, &reg,
sizeof(reg));
if (err < 0)
return err;
switch (index) { switch (index) {
case 0: case 0:
*src = SND_MOTU_CLOCK_SOURCE_INTERNAL; *src = SND_MOTU_CLOCK_SOURCE_INTERNAL;
break; break;
case 1: case 1:
{
__be32 reg;
// To check the configuration of optical interface.
int err = snd_motu_transaction_read(motu, V2_IN_OUT_CONF_OFFSET,
&reg, sizeof(reg));
if (err < 0)
return err;
if (be32_to_cpu(reg) & 0x00000200) if (be32_to_cpu(reg) & 0x00000200)
*src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_OPT; *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_OPT;
else else
*src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_OPT; *src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_OPT;
break; break;
}
case 2: case 2:
*src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_COAX; *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_COAX;
break; break;
...@@ -130,6 +129,20 @@ static int v2_get_clock_source(struct snd_motu *motu, ...@@ -130,6 +129,20 @@ static int v2_get_clock_source(struct snd_motu *motu,
return 0; return 0;
} }
static int v2_get_clock_source(struct snd_motu *motu,
enum snd_motu_clock_source *src)
{
__be32 reg;
int err;
err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, &reg,
sizeof(reg));
if (err < 0)
return err;
return get_clock_source(motu, be32_to_cpu(reg), src);
}
static int v2_switch_fetching_mode(struct snd_motu *motu, bool enable) static int v2_switch_fetching_mode(struct snd_motu *motu, bool enable)
{ {
__be32 reg; __be32 reg;
......
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