Merge tag 'socfpga_dts_updates_for_v6.11' of...

Merge tag 'socfpga_dts_updates_for_v6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt

SoCFPGA DTS updates for v6.11
- Drop unneeded flash address
- Add L2 Cache info for Stratix10

* tag 'socfpga_dts_updates_for_v6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: socfpga: stratix10: add L2 cache info
  arm64: dts: n5x: socdk: drop unneeded flash address/size-cells
  arm64: dts: agilex: socdk: drop unneeded flash address/size-cells
  arm64: dts: stratix10: socdk_nand: drop unneeded flash address/size-cells
  arm64: dts: stratix10: socdk: drop unneeded flash address/size-cells

Link: https://lore.kernel.org/r/20240626210728.21295-1-dinguyen@kernel.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>

arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi

@@ -34,6 +34,7 @@ cpu0: cpu@0 {
 			compatible = "arm,cortex-a53";
 			device_type = "cpu";
 			enable-method = "psci";
+			next-level-cache = <&l2_shared>;
 			reg = <0x0>;
 		};
 
@@ -41,6 +42,7 @@ cpu1: cpu@1 {
 			compatible = "arm,cortex-a53";
 			device_type = "cpu";
 			enable-method = "psci";
+			next-level-cache = <&l2_shared>;
 			reg = <0x1>;
 		};
 
@@ -48,6 +50,7 @@ cpu2: cpu@2 {
 			compatible = "arm,cortex-a53";
 			device_type = "cpu";
 			enable-method = "psci";
+			next-level-cache = <&l2_shared>;
 			reg = <0x2>;
 		};
 
@@ -55,8 +58,15 @@ cpu3: cpu@3 {
 			compatible = "arm,cortex-a53";
 			device_type = "cpu";
 			enable-method = "psci";
+			next-level-cache = <&l2_shared>;
 			reg = <0x3>;
 		};
+
+		l2_shared: cache {
+			compatible = "cache";
+			cache-level = <2>;
+			cache-unified;
+		};
 	};
 
 	firmware {

arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts

@@ -180,8 +180,6 @@ rtc@68 {
 &qspi {
 	status = "okay";
 	flash@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
 		compatible = "micron,mt25qu02g", "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <100000000>;

arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts

@@ -169,8 +169,6 @@ rtc@68 {
 &qspi {
 	status = "okay";
 	flash@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
 		compatible = "micron,mt25qu02g", "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <100000000>;

arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts

@@ -106,8 +106,6 @@ &watchdog0 {
 &qspi {
 	status = "okay";
 	flash@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
 		compatible = "micron,mt25qu02g", "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <100000000>;

arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts

@@ -83,8 +83,6 @@ &osc1 {
 &qspi {
 	status = "okay";
 	flash@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
 		compatible = "micron,mt25qu02g", "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <100000000>;