Commit 4c7fefc3 authored by Richard Henderson's avatar Richard Henderson

Merge are.twiddle.net:/home/rth/BK/linus-2.5

into are.twiddle.net:/home/rth/BK/axp-2.5
parents 083b4c0e c39e9205
......@@ -1219,10 +1219,10 @@ S: 65183 Wiesbaden
S: Germany
N: Christoph Hellwig
E: hch@caldera.de
E: hch@infradead.org
D: misc driver & makefile hacking
D: freevxfs driver
D: sysvfs maintainer
S: Triftstrae 26
S: 38644 Goslar
S: Germany
......@@ -1579,8 +1579,10 @@ S: L-1148 Luxembourg-City
S: Luxembourg
N: Gerd Knorr
E: kraxel@goldbach.in-berlin.de
D: SCSI CD-ROM driver hacking, vesafb, v4l, minor bug fixes
W: http://bytesex.org
E: kraxel@bytesex.org
E: kraxel@suse.de
D: video4linux, bttv, vesafb, some scsi, misc fixes
N: Harald Koenig
E: koenig@tat.physik.uni-tuebingen.de
......@@ -2674,6 +2676,16 @@ D: several improvements to system programs
S: Oldenburg
S: Germany
N: Robert Schwebel
E: robert@schwebel.de
W: http://www.schwebel.de
D: Embedded hacker and book author,
D: AMD Elan support for Linux
S: Pengutronix
S: Braunschweiger Strasse 79
S: 31134 Hildesheim
S: Germany
N: Darren Senn
E: sinster@darkwater.com
D: Whatever I notice needs doing (so far: itimers, /proc)
......
......@@ -54,6 +54,7 @@ o binutils 2.9.5.0.25 # ld -v
o util-linux 2.10o # fdformat --version
o modutils 2.4.2 # insmod -V
o e2fsprogs 1.25 # tune2fs
o jfsutils 1.0.14 # fsck.jfs -V
o reiserfsprogs 3.x.0j # reiserfsck 2>&1|grep reiserfsprogs
o pcmcia-cs 3.1.21 # cardmgr -V
o PPP 2.4.0 # pppd --version
......@@ -106,8 +107,8 @@ assembling the 16-bit boot code, removing the need for as86 to compile
your kernel. This change does, however, mean that you need a recent
release of binutils.
System utilities
================
System utililities
==================
Architectural changes
---------------------
......@@ -165,6 +166,16 @@ E2fsprogs
The latest version of e2fsprogs fixes several bugs in fsck and
debugfs. Obviously, it's a good idea to upgrade.
JFSutils
--------
The jfsutils package contains the utilities for the file system.
The following utilities are available:
o fsck.jfs - initiate replay of the transaction log, and check
and repair a JFS formatted partition.
o mkfs.jfs - create a JFS formatted partition.
o other file system utilities are also available in this package.
Reiserfsprogs
-------------
......@@ -303,6 +314,10 @@ E2fsprogs
---------
o <http://prdownloads.sourceforge.net/e2fsprogs/e2fsprogs-1.25.tar.gz>
JFSutils
--------
o <http://oss.software.ibm.com/jfs>
Reiserfsprogs
-------------
o <ftp://ftp.namesys.com/pub/reiserfsprogs/reiserfsprogs-3.x.0j.tar.gz>
......
2.5.2-rmk5
----------
This is the first kernel that contains a major shake up of some of the
major architecture-specific subsystems.
Firstly, it contains some pretty major changes to the way we handle the
MMU TLB. Each MMU TLB variant is now handled completely separately -
we have TLB v3, TLB v4 (without write buffer), TLB v4 (with write buffer),
and finally TLB v4 (with write buffer, with I TLB invalidate entry).
There is more assembly code inside each of these functions, mainly to
allow more flexible TLB handling for the future.
Secondly, the IRQ subsystem.
The 2.5 kernels will be having major changes to the way IRQs are handled.
Unfortunately, this means that machine types that touch the irq_desc[]
array (basically all machine types) will break, and this means every
machine type that we currently have.
Lets take an example. On the Assabet with Neponset, we have:
GPIO25 IRR:2
SA1100 ------------> Neponset -----------> SA1111
IIR:1
-----------> USAR
IIR:0
-----------> SMC9196
The way stuff currently works, all SA1111 interrupts are mutually
exclusive of each other - if you're processing one interrupt from the
SA1111 and another comes in, you have to wait for that interrupt to
finish processing before you can service the new interrupt. Eg, an
IDE PIO-based interrupt on the SA1111 excludes all other SA1111 and
SMC9196 interrupts until it has finished transferring its multi-sector
data, which can be a long time. Note also that since we loop in the
SA1111 IRQ handler, SA1111 IRQs can hold off SMC9196 IRQs indefinitely.
The new approach brings several new ideas...
We introduce the concept of a "parent" and a "child". For example,
to the Neponset handler, the "parent" is GPIO25, and the "children"d
are SA1111, SMC9196 and USAR.
We also bring the idea of an IRQ "chip" (mainly to reduce the size of
the irqdesc array). This doesn't have to be a real "IC"; indeed the
SA11x0 IRQs are handled by two separate "chip" structures, one for
GPIO0-10, and another for all the rest. It is just a container for
the various operations (maybe this'll change to a better name).
This structure has the following operations:
struct irqchip {
/*
* Acknowledge the IRQ.
* If this is a level-based IRQ, then it is expected to mask the IRQ
* as well.
*/
void (*ack)(unsigned int irq);
/*
* Mask the IRQ in hardware.
*/
void (*mask)(unsigned int irq);
/*
* Unmask the IRQ in hardware.
*/
void (*unmask)(unsigned int irq);
/*
* Re-run the IRQ
*/
void (*rerun)(unsigned int irq);
/*
* Set the type of the IRQ.
*/
int (*type)(unsigned int irq, unsigned int, type);
};
ack - required. May be the same function as mask for IRQs
handled by do_level_IRQ.
mask - required.
unmask - required.
rerun - optional. Not required if you're using do_level_IRQ for all
IRQs that use this 'irqchip'. Generally expected to re-trigger
the hardware IRQ if possible. If not, may call the handler
directly.
type - optional. If you don't support changing the type of an IRQ,
it should be null so people can detect if they are unable to
set the IRQ type.
For each IRQ, we keep the following information:
- "disable" depth (number of disable_irq()s without enable_irq()s)
- flags indicating what we can do with this IRQ (valid, probe,
noautounmask) as before
- status of the IRQ (probing, enable, etc)
- chip
- per-IRQ handler
- irqaction structure list
The handler can be one of the 3 standard handlers - "level", "edge" and
"simple", or your own specific handler if you need to do something special.
The "level" handler is what we currently have - its pretty simple.
"edge" knows about the brokenness of such IRQ implementations - that you
need to leave the hardware IRQ enabled while processing it, and queueing
further IRQ events should the IRQ happen again while processing. The
"simple" handler is very basic, and does not perform any hardware
manipulation, nor state tracking. This is useful for things like the
SMC9196 and USAR above.
So, what's changed?
1. Machine implementations must not write to the irqdesc array.
2. New functions to manipulate the irqdesc array. The first 4 are expected
to be useful only to machine specific code. The last is recommended to
only be used by machine specific code, but may be used in drivers if
absolutely necessary.
set_irq_chip(irq,chip)
Set the mask/unmask methods for handling this IRQ
set_irq_handler(irq,handler)
Set the handler for this IRQ (level, edge, simple)
set_irq_chained_handler(irq,handler)
Set a "chained" handler for this IRQ - automatically
enables this IRQ (eg, Neponset and SA1111 handlers).
set_irq_flags(irq,flags)
Set the valid/probe/noautoenable flags.
set_irq_type(irq,type)
Set active the IRQ edge(s)/level. This replaces the
SA1111 INTPOL manipulation, and the set_GPIO_IRQ_edge()
function. Type should be one of the following:
#define IRQT_NOEDGE (0)
#define IRQT_RISING (__IRQT_RISEDGE)
#define IRQT_FALLING (__IRQT_FALEDGE)
#define IRQT_BOTHEDGE (__IRQT_RISEDGE|__IRQT_FALEDGE)
#define IRQT_LOW (__IRQT_LOWLVL)
#define IRQT_HIGH (__IRQT_HIGHLVL)
3. set_GPIO_IRQ_edge() is obsolete, and should be replaced by set_irq_type.
4. Direct access to SA1111 INTPOL is depreciated. Use set_irq_type instead.
5. A handler is expected to perform any necessary acknowledgement of the
parent IRQ via the correct chip specific function. For instance, if
the SA1111 is directly connected to a SA1110 GPIO, then you should
acknowledge the SA1110 IRQ each time you re-read the SA1111 IRQ status.
6. For any child which doesn't have its own IRQ enable/disable controls
(eg, SMC9196), the handler must mask or acknowledge the parent IRQ
while the child handler is called, and the child handler should be the
"simple" handler (not "edge" nor "level"). After the handler completes,
the parent IRQ should be unmasked, and the status of all children must
be re-checked for pending events. (see the Neponset IRQ handler for
details).
7. fixup_irq() is gone, as is include/asm-arm/arch-*/irq.h
Please note that this will not solve all problems - some of them are
hardware based. Mixing level-based and edge-based IRQs on the same
parent signal (eg neponset) is one such area where a software based
solution can't provide the full answer to low IRQ latency.
......@@ -118,7 +118,18 @@ User Interface
By virtue of having a complete hierarchical view of all the devices in the
system, exporting a complete hierarchical view to userspace becomes relatively
easy.
easy. This has been accomplished by implementing a special purpose virtual
file system named driverfs. It is hence possible for the user to mount the
whole driverfs on a particular mount point in the unified UNIX file hierarchy.
This can be done permanently by providing the following entry into the
/dev/fstab (under the provision that the mount point does exist, of course):
none /devices driverfs defaults 0 0
Or by hand on the command line:
~: mount -t driverfs none /devices
Whenever a device is inserted into the tree, a directory is created for it.
This directory may be populated at each layer of discovery - the global layer,
......@@ -343,6 +354,8 @@ user requests the system to suspend, it will walk the device tree, as exported
via driverfs, and tell each device to go to sleep. It will do this multiple
times based on what the system policy is.
[ FIXME: URL pointer to the corresponding utility is missing here! ]
Device resume should happen in the same manner when the system awakens.
Each suspend stage is described below:
......
......@@ -22,6 +22,8 @@ hpfs.txt
- info and mount options for the OS/2 HPFS.
isofs.txt
- info and mount options for the ISO 9660 (CDROM) filesystem.
jfs.txt
- info and mount options for the JFS filesystem.
ncpfs.txt
- info on Novell Netware(tm) filesystem using NCP protocol.
ntfs.txt
......
IBM's Journaled File System (JFS) for Linux version 1.0.15
Team members
Steve Best sbest@us.ibm.com
Dave Kleikamp shaggy@austin.ibm.com
Barry Arndt barndt@us.ibm.com
Christoph Hellwig hch@caldera.de
Release February 15, 2002 (version 1.0.15)
This is our fifty-third release of IBM's Enterprise JFS technology port to Linux.
Beta 1 was release 0.1.0 on 12/8/2000, Beta 2 was release 0.2.0 on 3/7/2001,
Beta 3 was release 0.3.0 on 4/30/2001, and release 1.0.0 on 6/28/2001.
The changelog.jfs file contains detailed information of changes done in each source
code drop.
JFS has a source tree that can be built on 2.4.3 - 2.4.17 and 2.5.4 kernel.org
source trees.
Our current goal on the 2.5.x series of the kernel is to update to the latest
2.5.x version and only support the latest version of this kernel.
This will change when the distros start shipping the 2.5.x series of the kernel.
Our current goal on the 2.4.x series of the kernel is to continue to support
all of the kernels in this series as we do today.
There is an anonymous cvs access available for the JFS tree. The steps below are
what is needed to pull the JFS cvs tree from the oss.software.ibm.com server.
id anoncvs
password anoncvs
To checkout 2.4.x series of the JFS files do the following:
CVSROOT should be set to :pserver:anoncvs@oss.software.ibm.com:/usr/cvs/jfs
cvs checkout linux24
To checkout 2.5.2 series of the JFS files do the following:
CVSROOT should be set to :pserver:anoncvs@oss.software.ibm.com:/usr/cvs/jfs
cvs checkout linux25
To checkout the JFS utilities do the following:
CVSROOT should be set to :pserver:anoncvs@oss.software.ibm.com:/usr/cvs/jfs
cvs checkout jfsutils
The cvs tree contains the latest changes being done to JFS. To receive notification
of commits to the cvs tree, please send e-mail to linuxjfs@us.ibm.com stating that
you would like notifications sent to you.
The jfs-2.4-1.0.15-patch.tar.gz is the easiest way to get the latest file system
source code on your system. There are also patch files that can move your jfs source
code from one release to another. If you have release 1.0.14 and would like to move
to release 1.0.15 the patch file named jfs-2.4-1_0_14-to-1_0_15-patch.gz will do that.
The jfs-2.4-1.0.15-patch.tar.gz file contains a readme and patch files for different
levels of the 2.4 kernel. Please see the README in the jfs-2.4-1.0.15-patch.tar.gz
file for help on applying the two patch files.
The following files in the kernel source tree have been changed so JFS can be built.
The jfs-2.4-1.0.15.tar.gz source tar ball contains each of the files below with
the extension of the kernel level it is associated with. As an example, there are now
four Config.in files named Config.in-2.4.0, Config.in-2.4.5, Config.in-2.4.7 and
Config.in-2.4.17.
If you use the jfs-2.4-1.0.15.tar.gz to build JFS you must rename each of the
kernel files to the file names listed below. The standard kernel from www.kernel.org
is the source of the kernel files that are included in the jfs tar file.
In sub dir fs Config.in, Makefile
In sub dir fs/nls Config.in
In sub dir Documentation Configure.help, Changes
In sub dir Documentation/filesystems 00-INDEX
In sub dir linux MAINTAINERS
Please backup the above files before the JFS tar file is added to the kernel source
tree. All JFS files are located in the include/linux/jfs or fs/jfs sub dirs.
Our development team has used the Linux kernel levels 2.4.3 - 2.4.17 kernels
with gcc version egcs-2.91.66 19990314/Linux (egcs-1.1.2 release)
for our port so far. A goal of the JFS team is to have JFS run on all architectures
that Linux supports, there is no architecture specific code in JFS. JFS has been run
on the following architectures (x86, PowerPC, Alpha, s/390, ARM) so far.
To make JFS build, during the "make config" step of building the kernel answer y to
the Prompt for development and/or incomplete code/drivers in the Code maturity level
options section. In the Filesystems section use the m for the answer to
JFS filesystem support (experimental) (CONFIG_JFS_FS) [Y/m/n?]
Build in /usr/src/linux with the command:
make modules
make modules_install
If you rebuild jfs.o after having mounted and unmounted a partition, "modprobe -r jfs"
will unload the old module.
For the file system debugging messages are being written to /var/log/messages.
Please see the readme in the utilities package for information about building
the JFS utilities.
JFS TODO list:
Plans for our near term development items
- get defrag capabilities operational in the FS
- get extendfs capabilities operational in the FS
- test EXTENDFS utility, for growing JFS partitions
- test defrag utility, calls file system to defrag the file system.
- add support for block sizes (512,1024,2048)
- add support for logfile on dedicated partition
Longer term work items
- get access control list functionality operational
- get extended attributes functionality operational
- add quota support
Please send bugs, comments, cards and letters to linuxjfs@us.ibm.com.
The JFS mailing list can be subscribed to by using the link labeled "Mail list Subscribe"
at our web page http://oss.software.ibm.com/jfs/.
......@@ -30,7 +30,7 @@ Four different configuration programs read Config Language:
scripts/Configure make config, make oldconfig
scripts/Menuconfig make menuconfig
scripts/tkparse make xconfig
mconfig (in development)
mconfig ftp.kernel.org/pub/linux/kernel/people/hch/mconfig/
'Configure' is a bash script which interprets Config.in files by sourcing
them. Some of the Config Language commands are native bash commands;
......@@ -52,9 +52,6 @@ C program with a bison parser which translates a Config Language script
into an internal syntax tree and then hands the syntax tree to one of
several user-interface front ends.
This document describes the behaviour of all four interpreters, even though
mconfig has not been released at the time of writing.
=== Statements
......@@ -489,7 +486,7 @@ is in the way of treating the "m" value as a dependency.
Configure: implemented
Menuconfig: implemented
XConfig: implemented
mconfig: not implemented
mconfig: implemented
Example:
......
......@@ -80,5 +80,5 @@ Bugreports, bugfixes and related questions should be sent via E-Mail to:
tek@rbg.informatik.tu-darmstadt.de
Thorsten Knabe <tek@rbg.informatik.tu-darmstadt.de>
Christoph Hellwig <hch@caldera.de>
Christoph Hellwig <hch@infradead.org>
Last modified: 2000/09/20
Linux 2.4 Sound Changes
2000-September-25
Christoph Hellwig, <hch@caldera.de>
Christoph Hellwig, <hch@infradead.org>
......
......@@ -19,9 +19,9 @@ your system. This library is available from
auerswald and shipped as part of the java software.
You may create the devices with:
mknod -m 666 /dev/usb/auer0 c 180 80
mknod -m 666 /dev/usb/auer0 c 180 112
...
mknod -m 666 /dev/usb/auer15 c 180 95
mknod -m 666 /dev/usb/auer15 c 180 127
Future plans
============
......
......@@ -95,12 +95,13 @@ HandSpring Visor, Palm USB, and Cli
Kroah-Hartman at greg@kroah.com
Compaq iPAQ driver
Compaq iPAQ and HP Jornada driver
This driver can be used to connect to Compaq iPAQ PDAs running
Windows CE 3.0 using a USB autosync cable. It has been tested only on
the Compaq H3135. It should work with the H3600 and later models too.
It may work with other CE based handhelds as well.
This driver can be used to connect to Compaq iPAQ and HP Jornada PDAs
running Windows CE 3.0 or PocketPC 2002 using a USB cable/cradle. It
has been tested only on the Compaq H3135, but is rumoured to work on
with the H3600 and later models as well as the Jornada 548 and 568.
With minor modifications, it may work for other CE based handhelds too.
The driver presents a serial interface (usually on /dev/ttyUSB0) over
which one may run ppp and establish a TCP/IP link to the iPAQ. Once this
......@@ -109,11 +110,14 @@ Compaq iPAQ driver
kbytes/sec for download/upload to the iPAQ.
The driver works intermittently with the usb-uhci driver but quite
reliably with the uhci driver. Make sure you have the right driver
loaded - usb-uhci is often the default.
reliably with the uhci driver. However, performance is much better
with usb-uhci. It does not seem to work with ohci at all.
You must setup hotplug to invoke pppd as soon as the iPAQ is connected.
A ppp script like the one below may be used:
A ppp script like the one below should be kept in the file
/etc/hotplug/usb/ipaq Remember to chmod +x. Make sure there are no
options in /etc/ppp/options or ~/.ppprc which conflict with the ones
given below.
#!/bin/bash
......@@ -133,7 +137,7 @@ Compaq iPAQ driver
On connecting the cable, you should see the usual "Device Connected",
"User Authenticated" messages flash by on your iPAQ. Once connected,
you can use Win CE programs like ftpView, Pocket Outlook from the iPAQ
and other synce utilities from the Linux side. Remember to enable IP
and xcerdisp, synce utilities from the Linux side. Remember to enable IP
forwarding.
To use Pocket IE, follow the instructions given at
......
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VERSION = 2
PATCHLEVEL = 5
SUBLEVEL = 5
EXTRAVERSION =
SUBLEVEL = 6
EXTRAVERSION =-pre2
KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
......
......@@ -657,6 +657,10 @@ CONFIG_SA1100_SHANNON
platform with a 640x480 LCD, touchscreen, CIR keyboard, PCMCIA slots,
and a telco interface.
CONFIG_SA1100_STORK
Say Y here if you intend to run this kernel on the Stork
handheld computer.
CONFIG_SA1100_VICTOR
Say Y here if you are using a Visu Aide Intel(R) StrongARM(R)
SA-1100 based Victor Digital Talking Book Reader. See
......
......@@ -134,6 +134,10 @@ TEXTADDR = 0xc0028000
MACHINE = clps711x
endif
ifeq ($(CONFIG_ARCH_FORTUNET),y)
TEXTADDR = 0xc0008000
endif
ifeq ($(CONFIG_ARCH_ANAKIN),y)
MACHINE = anakin
endif
......@@ -215,6 +219,7 @@ CLEAN_FILES += \
arch/arm/vmlinux.lds
MRPROPER_FILES += \
arch/arm/tools/constants.h* \
include/asm-arm/arch \
include/asm-arm/proc \
include/asm-arm/constants.h* \
......
......@@ -54,6 +54,10 @@ INITRD_PHYS = 0x00800000
INITRD_VIRT = 0xc0800000
endif
ifeq ($(CONFIG_ARCH_CAMELOT),y)
ZTEXTADDR = 0x00008000
endif
ifeq ($(CONFIG_ARCH_NEXUSPCI),y)
ZTEXTADDR = 0x40008000
endif
......
......@@ -33,6 +33,10 @@ ifeq ($(CONFIG_ARCH_INTEGRATOR),y)
OBJS += head-integrator.o
endif
ifeq ($(CONFIG_ARCH_CAMELOT),y)
OBJS += head-epxa10db.o
endif
ifeq ($(CONFIG_ARCH_FTVPCI),y)
OBJS += head-ftvpci.o
endif
......
#include <asm/mach-types.h>
#include <asm/arch/excalibur.h>
.section ".start", #alloc, #execinstr
mov r7, #MACH_TYPE_CAMELOT
......@@ -18,6 +18,8 @@
unsigned int __machine_arch_type;
#include <linux/kernel.h>
#include <asm/uaccess.h>
#include <asm/arch/uncompress.h>
#include <asm/proc/uncompress.h>
......
......@@ -91,6 +91,7 @@ dep_bool ' FlexaNet' CONFIG_SA1100_FLEXANET $CONFIG_ARCH_SA1100
dep_bool ' FreeBird-v1.1' CONFIG_SA1100_FREEBIRD $CONFIG_ARCH_SA1100
dep_bool ' GraphicsClient Plus' CONFIG_SA1100_GRAPHICSCLIENT $CONFIG_ARCH_SA1100
dep_bool ' GraphicsMaster' CONFIG_SA1100_GRAPHICSMASTER $CONFIG_ARCH_SA1100
dep_bool ' HP Labs BadgePAD 4' CONFIG_SA1100_BADGE4 $CONFIG_ARCH_SA1100
dep_bool ' HP Jornada 720' CONFIG_SA1100_JORNADA720 $CONFIG_ARCH_SA1100
dep_bool ' HuW WebPanel' CONFIG_SA1100_HUW_WEBPANEL $CONFIG_ARCH_SA1100
dep_bool ' Itsy' CONFIG_SA1100_ITSY $CONFIG_ARCH_SA1100
......@@ -107,6 +108,7 @@ dep_bool ' Tulsa' CONFIG_SA1100_PFS168 $CONFIG_ARCH_SA1100
dep_bool ' Victor' CONFIG_SA1100_VICTOR $CONFIG_ARCH_SA1100
dep_bool ' XP860' CONFIG_SA1100_XP860 $CONFIG_ARCH_SA1100
dep_bool ' Yopy' CONFIG_SA1100_YOPY $CONFIG_ARCH_SA1100
dep_bool ' Stork' CONFIG_SA1100_STORK $CONFIG_ARCH_SA1100
# Determine if SA1111 support is required
if [ "$CONFIG_ASSABET_NEPONSET" = "y" -o \
......@@ -115,7 +117,8 @@ if [ "$CONFIG_ASSABET_NEPONSET" = "y" -o \
"$CONFIG_SA1100_XP860" = "y" -o \
"$CONFIG_SA1100_GRAPHICSMASTER" = "y" -o \
"$CONFIG_SA1100_PT_SYSTEM3" = "y" -o \
"$CONFIG_SA1100_ADSBITSY" = "y" ]; then
"$CONFIG_SA1100_ADSBITSY" = "y" -o \
"$CONFIG_SA1100_BADGE4" = "y" ]; then
define_bool CONFIG_SA1111 y
define_int CONFIG_FORCE_MAX_ZONEORDER 9
fi
......@@ -134,6 +137,7 @@ dep_bool ' CDB89712' CONFIG_ARCH_CDB89712 $CONFIG_ARCH_CLPS711X
dep_bool ' CLEP7312' CONFIG_ARCH_CLEP7312 $CONFIG_ARCH_CLPS711X
dep_bool ' EDB7211' CONFIG_ARCH_EDB7211 $CONFIG_ARCH_CLPS711X
dep_bool ' P720T' CONFIG_ARCH_P720T $CONFIG_ARCH_CLPS711X
dep_bool ' FORTUNET' CONFIG_ARCH_FORTUNET $CONFIG_ARCH_CLPS711X
# XXX Maybe these should indicate register compatibility
# instead of being mutually exclusive.
......
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......@@ -124,6 +124,7 @@ EXPORT_SYMBOL(__bad_xchg);
EXPORT_SYMBOL(__readwrite_bug);
EXPORT_SYMBOL(enable_irq);
EXPORT_SYMBOL(disable_irq);
EXPORT_SYMBOL(set_irq_type);
EXPORT_SYMBOL(pm_idle);
EXPORT_SYMBOL(pm_power_off);
......
......@@ -164,28 +164,49 @@
.endm
#elif defined(CONFIG_ARCH_SA1100)
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #0x80000000 @ physical base address
movne \rx, #0xf8000000 @ virtual address
@add \rx, \rx, #0x00050000 @ Ser3
add \rx, \rx, #0x00010000 @ Ser1
@ We probe for the active serial port here, coherently with
@ the comment in include/asm-arm/arch-sa1100/uncompress.h.
@ We assume r1 can be clobbered.
@ see if Ser3 is active
add \rx, \rx, #0x00050000
ldr r1, [\rx, #UTCR3]
tst r1, #UTCR3_TXE
@ if Ser3 is inactive, then try Ser1
addeq \rx, \rx, #(0x00010000 - 0x00050000)
ldreq r1, [\rx, #UTCR3]
tsteq r1, #UTCR3_TXE
@ if Ser1 is inactive, then try Ser2
addeq \rx, \rx, #(0x00030000 - 0x00010000)
ldreq r1, [\rx, #UTCR3]
tsteq r1, #UTCR3_TXE
@ if all ports are inactive, then there is nothing we can do
moveq pc, lr
.endm
.macro senduart,rd,rx
str \rd, [\rx, #0x14] @ UTDR
str \rd, [\rx, #UTDR]
.endm
.macro waituart,rd,rx
1001: ldr \rd, [\rx, #0x20] @ UTSR1
tst \rd, #1 << 2 @ UTSR1_TNF
1001: ldr \rd, [\rx, #UTSR1]
tst \rd, #UTSR1_TNF
beq 1001b
.endm
.macro busyuart,rd,rx
1001: ldr \rd, [\rx, #0x20] @ UTSR1
tst \rd, #1 << 0 @ UTSR1_TBY
1001: ldr \rd, [\rx, #UTSR1]
tst \rd, #UTSR1_TBY
bne 1001b
.endm
......
......@@ -91,17 +91,8 @@ asmlinkage extern int
ecard_loader_reset(volatile unsigned char *pa, loader_t loader);
asmlinkage extern int
ecard_loader_read(int off, volatile unsigned char *pa, loader_t loader);
extern int setup_arm_irq(int, struct irqaction *);
extern void do_ecard_IRQ(int, struct pt_regs *);
static void
ecard_irq_noexpmask(int intr_no, void *dev_id, struct pt_regs *regs);
static struct irqaction irqexpansioncard = {
ecard_irq_noexpmask, SA_INTERRUPT, 0, "expansion cards", NULL, NULL
};
static inline unsigned short
ecard_getu16(unsigned char *v)
{
......@@ -558,7 +549,7 @@ static expansioncard_ops_t ecard_default_ops = {
*
* They are not meant to be called directly, but via enable/disable_irq.
*/
static void ecard_enableirq(unsigned int irqnr)
static void ecard_irq_mask(unsigned int irqnr)
{
ecard_t *ec = slot_to_ecard(irqnr - 32);
......@@ -574,7 +565,7 @@ static void ecard_enableirq(unsigned int irqnr)
}
}
static void ecard_disableirq(unsigned int irqnr)
static void ecard_irq_unmask(unsigned int irqnr)
{
ecard_t *ec = slot_to_ecard(irqnr - 32);
......@@ -587,6 +578,12 @@ static void ecard_disableirq(unsigned int irqnr)
}
}
static struct irqchip ecard_chip = {
ack: ecard_irq_mask,
mask: ecard_irq_mask,
unmask: ecard_irq_unmask,
};
void ecard_enablefiq(unsigned int fiqnr)
{
ecard_t *ec = slot_to_ecard(fiqnr);
......@@ -632,8 +629,7 @@ ecard_dump_irq_state(ecard_t *ec)
ec->irqaddr, ec->irqmask, *ec->irqaddr);
}
static void
ecard_check_lockup(void)
static void ecard_check_lockup(struct irqdesc *desc)
{
static int last, lockup;
ecard_t *ec;
......@@ -653,7 +649,7 @@ ecard_check_lockup(void)
printk(KERN_ERR "\nInterrupt lockup detected - "
"disabling all expansion card interrupts\n");
disable_irq(IRQ_EXPANSIONCARD);
desc->chip->mask(IRQ_EXPANSIONCARD);
printk("Expansion card IRQ state:\n");
......@@ -674,11 +670,12 @@ ecard_check_lockup(void)
}
static void
ecard_irq_noexpmask(int intr_no, void *dev_id, struct pt_regs *regs)
ecard_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
{
ecard_t *ec;
int called = 0;
desc->chip->mask(irq);
for (ec = cards; ec; ec = ec->next) {
int pending;
......@@ -691,14 +688,15 @@ ecard_irq_noexpmask(int intr_no, void *dev_id, struct pt_regs *regs)
pending = ecard_default_ops.irqpending(ec);
if (pending) {
do_ecard_IRQ(ec->irq, regs);
struct irqdesc *d = irq_desc + ec->irq;
d->handle(ec->irq, d, regs);
called ++;
}
}
cli();
desc->chip->unmask(irq);
if (called == 0)
ecard_check_lockup();
ecard_check_lockup(desc);
}
#ifdef HAS_EXPMASK
......@@ -714,20 +712,18 @@ static unsigned char first_set[] =
};
static void
ecard_irq_expmask(int intr_no, void *dev_id, struct pt_regs *regs)
ecard_irqexp_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
{
const unsigned int statusmask = 15;
unsigned int status;
status = __raw_readb(EXPMASK_STATUS) & statusmask;
if (status) {
unsigned int slot;
ecard_t *ec;
again:
slot = first_set[status];
ec = slot_to_ecard(slot);
unsigned int slot = first_set[status];
ecard_t *ec = slot_to_ecard(slot);
if (ec->claimed) {
unsigned int oldexpmask;
struct irqdesc *d = irqdesc + ec->irq;
/*
* this ugly code is so that we can operate a
* prioritorising system:
......@@ -740,17 +736,7 @@ ecard_irq_expmask(int intr_no, void *dev_id, struct pt_regs *regs)
* Serial cards should go in 0/1, ethernet/scsi in 2/3
* otherwise you will lose serial data at high speeds!
*/
oldexpmask = have_expmask;
have_expmask &= priority_masks[slot];
__raw_writeb(have_expmask, EXPMASK_ENABLE);
sti();
do_ecard_IRQ(ec->irq, regs);
cli();
have_expmask = oldexpmask;
__raw_writeb(have_expmask, EXPMASK_ENABLE);
status = __raw_readb(EXPMASK_STATUS) & statusmask;
if (status)
goto again;
d->handle(ec->irq, d, regs);
} else {
printk(KERN_WARNING "card%d: interrupt from unclaimed "
"card???\n", slot);
......@@ -761,8 +747,7 @@ ecard_irq_expmask(int intr_no, void *dev_id, struct pt_regs *regs)
printk(KERN_WARNING "Wild interrupt from backplane (masks)\n");
}
static void __init
ecard_probeirqhw(void)
static int __init ecard_probeirqhw(void)
{
ecard_t *ec;
int found;
......@@ -772,24 +757,24 @@ ecard_probeirqhw(void)
found = (__raw_readb(EXPMASK_STATUS) & 15) == 0;
__raw_writeb(0xff, EXPMASK_ENABLE);
if (!found)
return;
printk(KERN_DEBUG "Expansion card interrupt "
"management hardware found\n");
if (found) {
printk(KERN_DEBUG "Expansion card interrupt "
"management hardware found\n");
irqexpansioncard.handler = ecard_irq_expmask;
/* for each card present, set a bit to '1' */
have_expmask = 0x80000000;
/* for each card present, set a bit to '1' */
have_expmask = 0x80000000;
for (ec = cards; ec; ec = ec->next)
have_expmask |= 1 << ec->slot_no;
for (ec = cards; ec; ec = ec->next)
have_expmask |= 1 << ec->slot_no;
__raw_writeb(have_expmask, EXPMASK_ENABLE);
}
__raw_writeb(have_expmask, EXPMASK_ENABLE);
return found;
}
#else
#define ecard_probeirqhw()
#define ecard_irqexp_handler NULL
#define ecard_probeirqhw() (0)
#endif
#ifndef IO_EC_MEMC8_BASE
......@@ -977,10 +962,9 @@ ecard_probe(int slot, card_type_t type)
* hook the interrupt handlers
*/
if (ec->irq != 0 && ec->irq >= 32) {
irq_desc[ec->irq].mask_ack = ecard_disableirq;
irq_desc[ec->irq].mask = ecard_disableirq;
irq_desc[ec->irq].unmask = ecard_enableirq;
irq_desc[ec->irq].valid = 1;
set_irq_chip(ec->irq, &ecard_chip);
set_irq_handler(ec->irq, do_level_IRQ);
set_irq_flags(ec->irq, IRQF_VALID);
}
#ifdef CONFIG_ARCH_RPC
......@@ -1042,21 +1026,6 @@ ecard_t *ecard_find(int cid, const card_ids *cids)
return finding_pos;
}
static void __init ecard_free_all(void)
{
ecard_t *ec, *ecn;
for (ec = cards; ec; ec = ecn) {
ecn = ec->next;
kfree(ec);
}
cards = NULL;
memset(slot_to_expcard, 0, sizeof(slot_to_expcard));
}
/*
* Initialise the expansion card system.
* Locate all hardware - interrupt management and
......@@ -1064,7 +1033,7 @@ static void __init ecard_free_all(void)
*/
void __init ecard_init(void)
{
int slot;
int slot, irqhw;
/*
* Register our reboot notifier
......@@ -1086,13 +1055,10 @@ void __init ecard_init(void)
ecard_probe(8, ECARD_IOC);
#endif
ecard_probeirqhw();
irqhw = ecard_probeirqhw();
if (setup_arm_irq(IRQ_EXPANSIONCARD, &irqexpansioncard)) {
printk(KERN_ERR "Unable to claim IRQ%d for expansion cards\n",
IRQ_EXPANSIONCARD);
ecard_free_all();
}
set_irq_chained_handler(IRQ_EXPANSIONCARD,
irqhw ? ecard_irqexp_handler : ecard_irq_handler);
ecard_proc_init();
}
......
......@@ -354,7 +354,7 @@ vector_IRQ: ldr r13, .LCirq @ I will leave this one in just in case...
@
adr lr, 1b
orr lr, lr, #0x08000003 @ Force SVC
bne do_IRQ
bne asm_do_IRQ
mov why, #0
get_current_task r5
......@@ -377,7 +377,7 @@ __irq_svc: teqp pc, #0x08000003
@
adr lr, 1b
orr lr, lr, #0x08000003 @ Force SVC
bne do_IRQ @ Returns to 1b
bne asm_do_IRQ @ Returns to 1b
SVC_RESTORE_ALL
__irq_invalid: mov r0, sp
......
......@@ -734,19 +734,22 @@ preempt_return:
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
#ifdef CONFIG_PREEMPT
svc_preempt: teq r9, #0
movne pc, lr
svc_preempt: teq r9, #0 @ was preempt count = 0
movne pc, lr @ no
ldr r0, [r6, #4] @ local_irq_count
ldr r1, [r6, #8] @ local_b_count
ldr r1, [r6, #8] @ local_bh_count
adds r0, r0, r1
movne pc, lr
1: set_cpsr_c r0, #MODE_SVC @ enable IRQs
bl SYMBOL_NAME(preempt_schedule)
ldr r1, [r8, #TI_TASK]
set_cpsr_c r2, #MODE_SVC @ enable IRQs
str r0, [r1, #0] @ current->state = TASK_RUNNING
1: bl SYMBOL_NAME(schedule)
set_cpsr_c r0, #PSR_I_BIT | MODE_SVC @ disable IRQs
ldr r0, [r8, #TI_FLAGS]
tst r0, #_TIF_NEED_RESCHED
bne 1b
b preempt_return
beq preempt_return
set_cpsr_c r0, #MODE_SVC @ enable IRQs
b 1b
#endif
.align 5
......
......@@ -55,7 +55,7 @@ work_resched:
*/
ENTRY(ret_to_user)
ret_slow_syscall:
set_cpsr_c r1, #PSR_I_BIT | MODE_SVC
set_cpsr_c r1, #PSR_I_BIT | MODE_SVC @ disable interrupts
ldr r1, [tsk, #TI_FLAGS]
tst r1, #_TIF_WORK_MASK
beq no_work_pending
......@@ -73,12 +73,9 @@ __do_notify_resume:
b SYMBOL_NAME(do_notify_resume) @ note the bl above sets lr
/*
* This is how we return from a fork. __switch_to will be calling us
* with r0 pointing at the previous task that was running (ready for
* calling schedule_tail).
* This is how we return from a fork.
*/
ENTRY(ret_from_fork)
bl SYMBOL_NAME(schedule_tail)
get_thread_info tsk
ldr ip, [tsk, #TI_FLAGS] @ check for syscall tracing
mov why, #1
......
......@@ -14,6 +14,7 @@
#include <asm/assembler.h>
#include <asm/mach-types.h>
#include <asm/procinfo.h>
#include <asm/mach/arch.h>
#define K(a,b,c) ((a) << 24 | (b) << 12 | (c))
......@@ -126,7 +127,7 @@ __entry:
mov r1, #MACH_TYPE_L7200
#endif
mov r0, #F_BIT | I_BIT | MODE_SVC @ make sure svc mode
mov r0, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ make sure svc mode
msr cpsr_c, r0 @ and all irqs disabled
bl __lookup_processor_type
teq r10, #0 @ invalid processor?
......@@ -374,7 +375,7 @@ __lookup_processor_type:
and r6, r6, r9 @ mask wanted bits
teq r5, r6
moveq pc, lr
add r10, r10, #36 @ sizeof(proc_info_list)
add r10, r10, #PROC_INFO_SZ @ sizeof(proc_info_list)
cmp r10, r7
blt 1b
mov r10, #0 @ unknown processor
......
This diff is collapsed.
......@@ -34,7 +34,7 @@
/*
* Breakpoint SWI instruction: SWI &9F0001
*/
#define BREAKINST 0xef9f0001
#define BREAKINST_ARM 0xef9f0001
/*
* Get the address of the live pt_regs for the specified task.
......@@ -183,6 +183,20 @@ ptrace_getldrop2(struct task_struct *child, unsigned long insn)
return val;
}
#define OP_MASK 0x01e00000
#define OP_AND 0x00000000
#define OP_EOR 0x00200000
#define OP_SUB 0x00400000
#define OP_RSB 0x00600000
#define OP_ADD 0x00800000
#define OP_ADC 0x00a00000
#define OP_SBC 0x00c00000
#define OP_RSC 0x00e00000
#define OP_ORR 0x01800000
#define OP_MOV 0x01a00000
#define OP_BIC 0x01c00000
#define OP_MVN 0x01e00000
static unsigned long
get_branch_address(struct task_struct *child, unsigned long pc, unsigned long insn)
{
......@@ -201,21 +215,21 @@ get_branch_address(struct task_struct *child, unsigned long pc, unsigned long in
aluop1 = ptrace_getrn(child, insn);
aluop2 = ptrace_getaluop2(child, insn);
ccbit = get_stack_long(child, REG_PSR) & CC_C_BIT ? 1 : 0;
switch (insn & 0x01e00000) {
case 0x00000000: alt = aluop1 & aluop2; break;
case 0x00200000: alt = aluop1 ^ aluop2; break;
case 0x00400000: alt = aluop1 - aluop2; break;
case 0x00600000: alt = aluop2 - aluop1; break;
case 0x00800000: alt = aluop1 + aluop2; break;
case 0x00a00000: alt = aluop1 + aluop2 + ccbit; break;
case 0x00c00000: alt = aluop1 - aluop2 + ccbit; break;
case 0x00e00000: alt = aluop2 - aluop1 + ccbit; break;
case 0x01800000: alt = aluop1 | aluop2; break;
case 0x01a00000: alt = aluop2; break;
case 0x01c00000: alt = aluop1 & ~aluop2; break;
case 0x01e00000: alt = ~aluop2; break;
ccbit = get_stack_long(child, REG_PSR) & PSR_C_BIT ? 1 : 0;
switch (insn & OP_MASK) {
case OP_AND: alt = aluop1 & aluop2; break;
case OP_EOR: alt = aluop1 ^ aluop2; break;
case OP_SUB: alt = aluop1 - aluop2; break;
case OP_RSB: alt = aluop2 - aluop1; break;
case OP_ADD: alt = aluop1 + aluop2; break;
case OP_ADC: alt = aluop1 + aluop2 + ccbit; break;
case OP_SBC: alt = aluop1 - aluop2 + ccbit; break;
case OP_RSC: alt = aluop2 - aluop1 + ccbit; break;
case OP_ORR: alt = aluop1 | aluop2; break;
case OP_MOV: alt = aluop2; break;
case OP_BIC: alt = aluop1 & ~aluop2; break;
case OP_MVN: alt = ~aluop2; break;
}
break;
}
......@@ -276,7 +290,7 @@ get_branch_address(struct task_struct *child, unsigned long pc, unsigned long in
base = ptrace_getrn(child, insn);
if (read_tsk_long(child, base + nr_regs, &alt) == 0)
alt = pc_pointer (alt);
alt = pc_pointer(alt);
break;
}
break;
......@@ -313,7 +327,7 @@ add_breakpoint(struct task_struct *child, struct debug_info *dbg, unsigned long
if (nr < 2) {
res = read_tsk_long(child, addr, &dbg->bp[nr].insn);
if (res == 0)
res = write_tsk_long(child, addr, BREAKINST);
res = write_tsk_long(child, addr, BREAKINST_ARM);
if (res == 0) {
dbg->bp[nr].address = addr;
......@@ -382,7 +396,7 @@ void __ptrace_cancel_bpt(struct task_struct *child)
read_tsk_long(child, dbg->bp[i].address, &tmp);
write_tsk_long(child, dbg->bp[i].address, dbg->bp[i].insn);
if (tmp != BREAKINST)
if (tmp != BREAKINST_ARM)
printk(KERN_ERR "ptrace_cancel_bpt: weirdness\n");
}
}
......
......@@ -73,6 +73,9 @@ unsigned int elf_hwcap;
#ifdef MULTI_CPU
struct processor processor;
#endif
#ifdef MULTI_TLB
struct cpu_tlb_fns cpu_tlb;
#endif
unsigned char aux_device_present;
char elf_platform[ELF_PLATFORM_SIZE];
......@@ -180,7 +183,7 @@ static const char *cache_lockdown[16] = {
static inline void dump_cache(const char *prefix, unsigned int cache)
{
unsigned int mult = 2 + CACHE_M(cache) ? 1 : 0;
unsigned int mult = 2 + (CACHE_M(cache) ? 1 : 0);
printk("%s size %dK associativity %d line length %d sets %d\n",
prefix,
......@@ -242,6 +245,9 @@ static void __init setup_processor(void)
#ifdef MULTI_CPU
processor = *list->proc;
#endif
#ifdef MULTI_TLB
cpu_tlb = *list->tlb;
#endif
printk("Processor: %s %s revision %d\n",
proc_info.manufacturer, proc_info.cpu_name,
......@@ -665,7 +671,7 @@ static const char *proc_arch[16] = {
static void
c_show_cache(struct seq_file *m, const char *type, unsigned int cache)
{
unsigned int mult = 2 + CACHE_M(cache) ? 1 : 0;
unsigned int mult = 2 + (CACHE_M(cache) ? 1 : 0);
seq_printf(m, "%s size\t\t: %d\n"
"%s assoc\t\t: %d\n"
......@@ -738,7 +744,7 @@ static int c_show(struct seq_file *m, void *v)
cache_types[CACHE_TYPE(cache_info)],
cache_clean[CACHE_TYPE(cache_info)],
cache_lockdown[CACHE_TYPE(cache_info)],
CACHE_S(cache_info) ? "separate I,D" : "unified");
CACHE_S(cache_info) ? "Harvard" : "Unified");
if (CACHE_S(cache_info)) {
c_show_cache(m, "I", CACHE_ISIZE(cache_info));
......
......@@ -396,8 +396,12 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka,
if (__put_user(retcodes[idx], rc))
return 1;
flush_icache_range((unsigned long)rc,
(unsigned long)(rc + 1));
/*
* Ensure that the instruction cache sees
* the return code written onto the stack.
*/
cpu_icache_invalidate_range((unsigned long)rc,
(unsigned long)(rc + 1));
retcode = ((unsigned long)rc) + thumb;
}
......
......@@ -31,10 +31,16 @@
#include <asm/irq.h>
#include <asm/leds.h>
extern int setup_arm_irq(int, struct irqaction *);
extern rwlock_t xtime_lock;
extern unsigned long wall_jiffies;
/* this needs a better home */
spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED;
#ifdef CONFIG_SA1100_RTC_MODULE
EXPORT_SYMBOL(rtc_lock);
#endif
/* change this if you have some constant time drift */
#define USECS_PER_JIFFY (1000000/HZ)
......
......@@ -95,7 +95,7 @@ static void dump_instr(struct pt_regs *regs)
int i;
printk("Code: ");
for (i = -2; i < 3; i++) {
for (i = -4; i < 1; i++) {
unsigned int val, bad;
if (thumb)
......
......@@ -74,85 +74,7 @@ static struct pci_ops via82c505_ops = {
via82c505_write_config_dword,
};
#ifdef CONFIG_ARCH_SHARK
static char size_wanted;
static int
dummy_read_config_byte(struct pci_dev *dev, int where, u8 *value)
{
*value=0;
return PCIBIOS_SUCCESSFUL;
}
static int
dummy_read_config_word(struct pci_dev *dev, int where, u16 *value)
{
*value=0;
return PCIBIOS_SUCCESSFUL;
}
static int
dummy_read_config_dword(struct pci_dev *dev, int where, u32 *value)
{
if (dev->devfn != 0) *value = 0;
else
switch(where) {
case PCI_VENDOR_ID:
*value = PCI_VENDOR_ID_INTERG | PCI_DEVICE_ID_INTERG_2010 << 16;
break;
case PCI_CLASS_REVISION:
*value = PCI_CLASS_DISPLAY_VGA << 16;
break;
case PCI_BASE_ADDRESS_0:
if (size_wanted) {
/* 0x00900000 bytes long (0xff700000) */
*value = 0xff000000;
size_wanted = 0;
} else {
*value = FB_START;
}
break;
case PCI_INTERRUPT_LINE:
*value = 6;
break;
default:
*value = 0;
}
return PCIBIOS_SUCCESSFUL;
}
static int
dummy_write_config_byte(struct pci_dev *dev, int where, u8 value)
{
return PCIBIOS_SUCCESSFUL;
}
static int
dummy_write_config_word(struct pci_dev *dev, int where, u16 value)
{
return PCIBIOS_SUCCESSFUL;
}
static int
dummy_write_config_dword(struct pci_dev *dev, int where, u32 value)
{
if ((dev->devfn == 0) && (where == PCI_BASE_ADDRESS_0) && (value == 0xffffffff))
size_wanted = 1;
return PCIBIOS_SUCCESSFUL;
}
static struct pci_ops dummy_ops = {
dummy_read_config_byte,
dummy_read_config_word,
dummy_read_config_dword,
dummy_write_config_byte,
dummy_write_config_word,
dummy_write_config_dword,
};
#endif
void __init via82c505_init(void *sysdata)
void __init via82c505_preinit(void *sysdata)
{
struct pci_bus *bus;
......@@ -166,13 +88,17 @@ void __init via82c505_init(void *sysdata)
outb(0x93,0xA8);
outb(0xd0,0xA9);
pci_scan_bus(0, &via82c505_ops, sysdata);
}
int __init via82c505_setup(int nr, struct pci_sys_data *sys)
{
return (nr == 0);
}
struct pci_bus * __init via82c505_scan_bus(int nr, struct pci_sys_data *sysdata)
{
if (nr == 0)
return pci_scan_bus(0, &via82c505_ops, sysdata);
#ifdef CONFIG_ARCH_SHARK
/*
* Initialize a fake pci-bus number 1 for the CyberPro
* on the vlbus
*/
bus = pci_scan_bus(1, &dummy_ops, sysdata);
#endif
return NULL;
}
......@@ -44,8 +44,6 @@ obj-$(v4) += io-readsw-armv4.o io-writesw-armv4.o io-readsl-armv4.o
obj-y += io-writesl.o
obj-$(CONFIG_CPU_26) += uaccess-armo.o
obj-$(CONFIG_CPU_32) += copy_page-armv3.o copy_page-armv4.o copy_page-armv4mc.o
obj-$(CONFIG_CPU_32v5) += copy_page-armv5te.o
include $(TOPDIR)/Rules.make
......
......@@ -12,7 +12,7 @@
#include <asm/assembler.h>
#include <asm/hardware.h>
#if defined(CONFIG_CPU_26)
#ifdef CONFIG_CPU_26
#define CPSR2SPSR(rt)
#else
#define CPSR2SPSR(rt) \
......
......@@ -58,7 +58,7 @@ ENTRY(outsl)
@ Proto : void memc_write(int register, int value);
@ Returns: nothing
#if defined(CONFIG_CPU_26)
#ifdef CONFIG_CPU_26
ENTRY(memc_write)
cmp r0, #7
RETINSTR(movgt,pc,lr)
......
......@@ -28,6 +28,10 @@
static void arc_floppy_data_enable_dma(dmach_t channel, dma_t *dma)
{
DPRINTK("arc_floppy_data_enable_dma\n");
if (dma->using_sg)
BUG();
switch (dma->dma_mode) {
case DMA_MODE_READ: { /* read */
extern unsigned char fdc1772_dma_read, fdc1772_dma_read_end;
......@@ -39,7 +43,7 @@ static void arc_floppy_data_enable_dma(dmach_t channel, dma_t *dma)
memcpy ((void *)0x1c, (void *)&fdc1772_dma_read,
&fdc1772_dma_read_end - &fdc1772_dma_read);
fdc1772_setupdma(dma->buf.length, dma->buf.address); /* Sets data pointer up */
fdc1772_setupdma(dma->buf.length, dma->buf.__address); /* Sets data pointer up */
enable_fiq(FIQ_FLOPPYDATA);
restore_flags(flags);
}
......@@ -54,7 +58,7 @@ static void arc_floppy_data_enable_dma(dmach_t channel, dma_t *dma)
clf();
memcpy ((void *)0x1c, (void *)&fdc1772_dma_write,
&fdc1772_dma_write_end - &fdc1772_dma_write);
fdc1772_setupdma(dma->buf.length, dma->buf.address); /* Sets data pointer up */
fdc1772_setupdma(dma->buf.length, dma->buf.__address); /* Sets data pointer up */
enable_fiq(FIQ_FLOPPYDATA;
restore_flags(flags);
......@@ -140,6 +144,9 @@ static void a5k_floppy_enable_dma(dmach_t channel, dma_t *dma)
extern void floppy_fiqsetup(unsigned long len, unsigned long addr,
unsigned long port);
if (dma->using_sg)
BUG();
if (dma->dma_mode == DMA_MODE_READ) {
extern unsigned char floppy_fiqin_start, floppy_fiqin_end;
fiqhandler_start = &floppy_fiqin_start;
......@@ -155,7 +162,7 @@ static void a5k_floppy_enable_dma(dmach_t channel, dma_t *dma)
}
memcpy((void *)0x1c, fiqhandler_start, fiqhandler_length);
regs.ARM_r9 = dma->buf.length;
regs.ARM_r10 = (unsigned long)dma->buf.address;
regs.ARM_r10 = (unsigned long)dma->buf.__address;
regs.ARM_fp = FLOPPYDMA_BASE;
set_fiq_regs(&regs);
enable_fiq(dma->dma_irq);
......
......@@ -21,9 +21,10 @@ export-objs := leds-p720t.o
obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o
obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o
obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o
obj-$(CONFIG_ARCH_EDB7211) += edb7211-arch.o edb7211-mm.o
obj-$(CONFIG_ARCH_P720T) += p720t.o
leds-$(CONFIG_ARCH_P720T) += p720t-leds.o
obj-$(CONFIG_LEDS) += $(leds-y)
obj-$(CONFIG_ARCH_EDB7211) += edb7211-arch.o edb7211-mm.o
obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o
obj-$(CONFIG_ARCH_P720T) += p720t.o
leds-$(CONFIG_ARCH_P720T) += p720t-leds.o
obj-$(CONFIG_LEDS) += $(leds-y)
include $(TOPDIR)/Rules.make
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......@@ -39,27 +39,31 @@ static void ebsa110_unmask_irq(unsigned int irq)
{
__raw_writeb(1 << irq, IRQ_MSET);
}
static struct irqchip ebsa110_irq_chip = {
ack: ebsa110_mask_irq,
mask: ebsa110_mask_irq,
unmask: ebsa110_unmask_irq,
};
static void __init ebsa110_init_irq(void)
{
unsigned long flags;
int irq;
unsigned int irq;
save_flags_cli (flags);
local_irq_save(flags);
__raw_writeb(0xff, IRQ_MCLR);
__raw_writeb(0x55, IRQ_MSET);
__raw_writeb(0x00, IRQ_MSET);
if (__raw_readb(IRQ_MASK) != 0x55)
while (1);
__raw_writeb(0xff, IRQ_MCLR); /* clear all interrupt enables */
restore_flags (flags);
local_irq_restore(flags);
for (irq = 0; irq < NR_IRQS; irq++) {
irq_desc[irq].valid = 1;
irq_desc[irq].probe_ok = 1;
irq_desc[irq].mask_ack = ebsa110_mask_irq;
irq_desc[irq].mask = ebsa110_mask_irq;
irq_desc[irq].unmask = ebsa110_unmask_irq;
set_irq_chip(irq, &ebsa110_irq_chip);
set_irq_handler(irq, do_level_IRQ);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
}
......
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