Commit 4ca86a2f authored by Jayachandran C's avatar Jayachandran C Committed by Ralf Baechle

MIPS: Netlogic: Add support for XLP2XX

XLP2XX is first in the series of 28nm XLPII processors.

The changes are to:
* Add processor ID for XLP2XX to asm/cpu.h and kernel/cpu-probe.c.
* Add a cpu_is_xlpii() function to check for XLPII processors.
* Update xlp_mmu_init() to use config4 to enable extended TLB.
Signed-off-by: default avatarJayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5698/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 13314a91
......@@ -179,6 +179,7 @@
#define PRID_IMP_NETLOGIC_XLP8XX 0x1000
#define PRID_IMP_NETLOGIC_XLP3XX 0x1100
#define PRID_IMP_NETLOGIC_XLP2XX 0x1200
/*
* Definitions for 7:0 on legacy processors
......
......@@ -64,5 +64,12 @@ int xlp_get_dram_map(int n, uint64_t *dram_map);
/* Device tree related */
void *xlp_dt_init(void *fdtp);
static inline int cpu_is_xlpii(void)
{
int chip = read_c0_prid() & 0xff00;
return chip == PRID_IMP_NETLOGIC_XLP2XX;
}
#endif /* !__ASSEMBLY__ */
#endif /* _ASM_NLM_XLP_H */
......@@ -906,6 +906,11 @@ static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu)
MIPS_CPU_LLSC);
switch (c->processor_id & 0xff00) {
case PRID_IMP_NETLOGIC_XLP2XX:
c->cputype = CPU_XLP;
__cpu_name[cpu] = "Broadcom XLPII";
break;
case PRID_IMP_NETLOGIC_XLP8XX:
case PRID_IMP_NETLOGIC_XLP3XX:
c->cputype = CPU_XLP;
......
......@@ -110,7 +110,12 @@ void __init plat_mem_setup(void)
const char *get_system_type(void)
{
return "Netlogic XLP Series";
switch (read_c0_prid() & 0xff00) {
case PRID_IMP_NETLOGIC_XLP2XX:
return "Broadcom XLPII Series";
default:
return "Netlogic XLP Series";
}
}
void __init prom_free_prom_memory(void)
......@@ -120,12 +125,20 @@ void __init prom_free_prom_memory(void)
void xlp_mmu_init(void)
{
/* enable extended TLB and Large Fixed TLB */
write_c0_config6(read_c0_config6() | 0x24);
/* set page mask of Fixed TLB in config7 */
write_c0_config7(PM_DEFAULT_MASK >>
(13 + (ffz(PM_DEFAULT_MASK >> 13) / 2)));
u32 conf4;
if (cpu_is_xlpii()) {
/* XLPII series has extended pagesize in config 4 */
conf4 = read_c0_config4() & ~0x1f00u;
write_c0_config4(conf4 | ((PAGE_SHIFT - 10) / 2 << 8));
} else {
/* enable extended TLB and Large Fixed TLB */
write_c0_config6(read_c0_config6() | 0x24);
/* set page mask of extended Fixed TLB in config7 */
write_c0_config7(PM_DEFAULT_MASK >>
(13 + (ffz(PM_DEFAULT_MASK >> 13) / 2)));
}
}
void nlm_percpu_init(int hwcpuid)
......
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