Commit 4d0cfff7 authored by Tudor Ambarus's avatar Tudor Ambarus Committed by Greg Kroah-Hartman

tty: serial: samsung: change has_divslot type to bool

Since the driver was introduced the port features flags never extended.
As we don't expect more flags soon that would bypass the first
cacheline of ``struct s3c24xx_uart_info``, change the type of
``has_divslot`` to bool. Bitfields operations incur performance penalty
when set or read as compared to direct types.
Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20240119104526.1221243-19-tudor.ambarus@linaro.orgSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 6e1e48b6
......@@ -89,8 +89,7 @@ struct s3c24xx_uart_info {
u8 iotype;
/* uart port features */
unsigned int has_divslot:1;
bool has_divslot;
};
struct s3c24xx_serial_drv_data {
......@@ -2400,7 +2399,7 @@ static const struct s3c24xx_serial_drv_data s3c6400_serial_drv_data = {
.port_type = PORT_S3C6400,
.iotype = UPIO_MEM,
.fifosize = 64,
.has_divslot = 1,
.has_divslot = true,
.rx_fifomask = S3C2440_UFSTAT_RXMASK,
.rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
.rx_fifofull = S3C2440_UFSTAT_RXFULL,
......@@ -2429,7 +2428,7 @@ static const struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = {
.type = TYPE_S3C6400,
.port_type = PORT_S3C6400,
.iotype = UPIO_MEM,
.has_divslot = 1,
.has_divslot = true,
.rx_fifomask = S5PV210_UFSTAT_RXMASK,
.rx_fifoshift = S5PV210_UFSTAT_RXSHIFT,
.rx_fifofull = S5PV210_UFSTAT_RXFULL,
......@@ -2459,7 +2458,7 @@ static const struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = {
.type = TYPE_S3C6400, \
.port_type = PORT_S3C6400, \
.iotype = UPIO_MEM, \
.has_divslot = 1, \
.has_divslot = true, \
.rx_fifomask = S5PV210_UFSTAT_RXMASK, \
.rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, \
.rx_fifofull = S5PV210_UFSTAT_RXFULL, \
......@@ -2498,7 +2497,7 @@ static const struct s3c24xx_serial_drv_data gs101_serial_drv_data = {
.type = TYPE_S3C6400,
.port_type = PORT_S3C6400,
.iotype = UPIO_MEM32,
.has_divslot = 1,
.has_divslot = true,
.rx_fifomask = S5PV210_UFSTAT_RXMASK,
.rx_fifoshift = S5PV210_UFSTAT_RXSHIFT,
.rx_fifofull = S5PV210_UFSTAT_RXFULL,
......@@ -2569,7 +2568,7 @@ static const struct s3c24xx_serial_drv_data artpec8_serial_drv_data = {
.port_type = PORT_S3C6400,
.iotype = UPIO_MEM,
.fifosize = 64,
.has_divslot = 1,
.has_divslot = true,
.rx_fifomask = S5PV210_UFSTAT_RXMASK,
.rx_fifoshift = S5PV210_UFSTAT_RXSHIFT,
.rx_fifofull = S5PV210_UFSTAT_RXFULL,
......
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