Commit 4dd01a37 authored by Arınç ÜNAL's avatar Arınç ÜNAL Committed by Florian Fainelli

ARM: dts: BCM5301X: Conform to DTS Coding Style on ASUS RT-AC3100 & AC88U

Reorder the nodes and properties to conform to the Devicetree Sources (DTS)
Coding Style.
Signed-off-by: default avatarArınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240423-for-soc-asus-rt-ac3200-ac5300-v3-5-23d33cfafe7a@arinc9.comSigned-off-by: default avatarFlorian Fainelli <florian.fainelli@broadcom.com>
parent 961dedc6
......@@ -10,9 +10,9 @@
/ {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>,
<0x88000000 0x18000000>;
device_type = "memory";
};
nvram@1c080000 {
......@@ -20,6 +20,34 @@ nvram@1c080000 {
reg = <0x1c080000 0x00180000>;
};
gpio-keys {
compatible = "gpio-keys";
button-led {
label = "Backlight";
linux,code = <KEY_BRIGHTNESS_ZERO>;
gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
};
button-reset {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
};
button-wifi {
label = "Wi-Fi";
linux,code = <KEY_RFKILL>;
gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
};
button-wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
......@@ -66,32 +94,29 @@ led-wps {
gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>;
};
};
};
gpio-keys {
compatible = "gpio-keys";
button-led {
label = "Backlight";
linux,code = <KEY_BRIGHTNESS_ZERO>;
gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
};
&nandcs {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
button-reset {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
partition@0 {
reg = <0x00000000 0x00080000>;
label = "boot";
read-only;
};
button-wifi {
label = "Wi-Fi";
linux,code = <KEY_RFKILL>;
gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
partition@80000 {
reg = <0x00080000 0x00180000>;
label = "nvram";
};
button-wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>;
partition@200000 {
compatible = "brcm,trx";
reg = <0x00200000 0x07e00000>;
label = "firmware";
};
};
};
......@@ -141,28 +166,3 @@ &usb2 {
&usb3_phy {
status = "okay";
};
&nandcs {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "boot";
reg = <0x00000000 0x00080000>;
read-only;
};
partition@80000 {
label = "nvram";
reg = <0x00080000 0x00180000>;
};
partition@200000 {
label = "firmware";
reg = <0x00200000 0x07e00000>;
compatible = "brcm,trx";
};
};
};
......@@ -19,13 +19,34 @@ et1macaddr: et1macaddr {
switch {
compatible = "realtek,rtl8365mb";
/* 7 = MDIO (has input reads), 6 = MDC (clock, output only) */
mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
mdio-gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>;
reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
realtek,disable-leds;
dsa,member = <1 0>;
mdio {
compatible = "realtek,smi-mdio";
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
ethphy2: ethernet-phy@2 {
reg = <2>;
};
ethphy3: ethernet-phy@3 {
reg = <3>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
......@@ -69,29 +90,21 @@ fixed-link {
};
};
};
};
};
mdio {
compatible = "realtek,smi-mdio";
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
&gmac0 {
status = "disabled";
};
ethphy2: ethernet-phy@2 {
reg = <2>;
};
&gmac1 {
nvmem-cells = <&et1macaddr 0>;
nvmem-cell-names = "mac-address";
};
ethphy3: ethernet-phy@3 {
reg = <3>;
};
};
};
&gmac2 {
nvmem-cells = <&et1macaddr 1>;
nvmem-cell-names = "mac-address";
};
&srab {
......@@ -112,17 +125,3 @@ fixed-link {
};
};
};
&gmac0 {
status = "disabled";
};
&gmac1 {
nvmem-cells = <&et1macaddr 0>;
nvmem-cell-names = "mac-address";
};
&gmac2 {
nvmem-cells = <&et1macaddr 1>;
nvmem-cell-names = "mac-address";
};
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