Commit 4eeb8556 authored by Simon Guo's avatar Simon Guo Committed by Paul Mackerras

KVM: PPC: Remove mmio_vsx_tx_sx_enabled in KVM MMIO emulation

Originally PPC KVM MMIO emulation uses only 0~31#(5 bits) for VSR
reg number, and use mmio_vsx_tx_sx_enabled field together for
0~63# VSR regs.

Currently PPC KVM MMIO emulation is reimplemented with analyse_instr()
assistance.  analyse_instr() returns 0~63 for VSR register number, so
it is not necessary to use additional mmio_vsx_tx_sx_enabled field
any more.

This patch extends related reg bits (expand io_gpr to u16 from u8
and use 6 bits for VSR reg#), so that mmio_vsx_tx_sx_enabled can
be removed.
Signed-off-by: default avatarSimon Guo <wei.guo.simon@gmail.com>
Signed-off-by: default avatarPaul Mackerras <paulus@ozlabs.org>
parent 6f0d349d
...@@ -672,7 +672,7 @@ struct kvm_vcpu_arch { ...@@ -672,7 +672,7 @@ struct kvm_vcpu_arch {
gva_t vaddr_accessed; gva_t vaddr_accessed;
pgd_t *pgdir; pgd_t *pgdir;
u8 io_gpr; /* GPR used as IO source/target */ u16 io_gpr; /* GPR used as IO source/target */
u8 mmio_host_swabbed; u8 mmio_host_swabbed;
u8 mmio_sign_extend; u8 mmio_sign_extend;
/* conversion between single and double precision */ /* conversion between single and double precision */
...@@ -688,7 +688,6 @@ struct kvm_vcpu_arch { ...@@ -688,7 +688,6 @@ struct kvm_vcpu_arch {
*/ */
u8 mmio_vsx_copy_nums; u8 mmio_vsx_copy_nums;
u8 mmio_vsx_offset; u8 mmio_vsx_offset;
u8 mmio_vsx_tx_sx_enabled;
u8 mmio_vmx_copy_nums; u8 mmio_vmx_copy_nums;
u8 mmio_vmx_offset; u8 mmio_vmx_offset;
u8 mmio_copy_type; u8 mmio_copy_type;
...@@ -801,14 +800,14 @@ struct kvm_vcpu_arch { ...@@ -801,14 +800,14 @@ struct kvm_vcpu_arch {
#define KVMPPC_VCPU_BUSY_IN_HOST 2 #define KVMPPC_VCPU_BUSY_IN_HOST 2
/* Values for vcpu->arch.io_gpr */ /* Values for vcpu->arch.io_gpr */
#define KVM_MMIO_REG_MASK 0x001f #define KVM_MMIO_REG_MASK 0x003f
#define KVM_MMIO_REG_EXT_MASK 0xffe0 #define KVM_MMIO_REG_EXT_MASK 0xffc0
#define KVM_MMIO_REG_GPR 0x0000 #define KVM_MMIO_REG_GPR 0x0000
#define KVM_MMIO_REG_FPR 0x0020 #define KVM_MMIO_REG_FPR 0x0040
#define KVM_MMIO_REG_QPR 0x0040 #define KVM_MMIO_REG_QPR 0x0080
#define KVM_MMIO_REG_FQPR 0x0060 #define KVM_MMIO_REG_FQPR 0x00c0
#define KVM_MMIO_REG_VSX 0x0080 #define KVM_MMIO_REG_VSX 0x0100
#define KVM_MMIO_REG_VMX 0x00c0 #define KVM_MMIO_REG_VMX 0x0180
#define __KVM_HAVE_ARCH_WQP #define __KVM_HAVE_ARCH_WQP
#define __KVM_HAVE_CREATE_DEVICE #define __KVM_HAVE_CREATE_DEVICE
......
...@@ -106,7 +106,6 @@ int kvmppc_emulate_loadstore(struct kvm_vcpu *vcpu) ...@@ -106,7 +106,6 @@ int kvmppc_emulate_loadstore(struct kvm_vcpu *vcpu)
* if mmio_vsx_tx_sx_enabled == 1, copy data between * if mmio_vsx_tx_sx_enabled == 1, copy data between
* VSR[32..63] and memory * VSR[32..63] and memory
*/ */
vcpu->arch.mmio_vsx_tx_sx_enabled = get_tx_or_sx(inst);
vcpu->arch.mmio_vsx_copy_nums = 0; vcpu->arch.mmio_vsx_copy_nums = 0;
vcpu->arch.mmio_vsx_offset = 0; vcpu->arch.mmio_vsx_offset = 0;
vcpu->arch.mmio_copy_type = KVMPPC_VSX_COPY_NONE; vcpu->arch.mmio_copy_type = KVMPPC_VSX_COPY_NONE;
...@@ -242,8 +241,8 @@ int kvmppc_emulate_loadstore(struct kvm_vcpu *vcpu) ...@@ -242,8 +241,8 @@ int kvmppc_emulate_loadstore(struct kvm_vcpu *vcpu)
} }
emulated = kvmppc_handle_vsx_load(run, vcpu, emulated = kvmppc_handle_vsx_load(run, vcpu,
KVM_MMIO_REG_VSX | (op.reg & 0x1f), KVM_MMIO_REG_VSX|op.reg, io_size_each,
io_size_each, 1, op.type & SIGNEXT); 1, op.type & SIGNEXT);
break; break;
} }
#endif #endif
...@@ -363,7 +362,7 @@ int kvmppc_emulate_loadstore(struct kvm_vcpu *vcpu) ...@@ -363,7 +362,7 @@ int kvmppc_emulate_loadstore(struct kvm_vcpu *vcpu)
} }
emulated = kvmppc_handle_vsx_store(run, vcpu, emulated = kvmppc_handle_vsx_store(run, vcpu,
op.reg & 0x1f, io_size_each, 1); op.reg, io_size_each, 1);
break; break;
} }
#endif #endif
......
...@@ -880,10 +880,10 @@ static inline void kvmppc_set_vsr_dword(struct kvm_vcpu *vcpu, ...@@ -880,10 +880,10 @@ static inline void kvmppc_set_vsr_dword(struct kvm_vcpu *vcpu,
if (offset == -1) if (offset == -1)
return; return;
if (vcpu->arch.mmio_vsx_tx_sx_enabled) { if (index >= 32) {
val.vval = VCPU_VSX_VR(vcpu, index); val.vval = VCPU_VSX_VR(vcpu, index - 32);
val.vsxval[offset] = gpr; val.vsxval[offset] = gpr;
VCPU_VSX_VR(vcpu, index) = val.vval; VCPU_VSX_VR(vcpu, index - 32) = val.vval;
} else { } else {
VCPU_VSX_FPR(vcpu, index, offset) = gpr; VCPU_VSX_FPR(vcpu, index, offset) = gpr;
} }
...@@ -895,11 +895,11 @@ static inline void kvmppc_set_vsr_dword_dump(struct kvm_vcpu *vcpu, ...@@ -895,11 +895,11 @@ static inline void kvmppc_set_vsr_dword_dump(struct kvm_vcpu *vcpu,
union kvmppc_one_reg val; union kvmppc_one_reg val;
int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK;
if (vcpu->arch.mmio_vsx_tx_sx_enabled) { if (index >= 32) {
val.vval = VCPU_VSX_VR(vcpu, index); val.vval = VCPU_VSX_VR(vcpu, index - 32);
val.vsxval[0] = gpr; val.vsxval[0] = gpr;
val.vsxval[1] = gpr; val.vsxval[1] = gpr;
VCPU_VSX_VR(vcpu, index) = val.vval; VCPU_VSX_VR(vcpu, index - 32) = val.vval;
} else { } else {
VCPU_VSX_FPR(vcpu, index, 0) = gpr; VCPU_VSX_FPR(vcpu, index, 0) = gpr;
VCPU_VSX_FPR(vcpu, index, 1) = gpr; VCPU_VSX_FPR(vcpu, index, 1) = gpr;
...@@ -912,12 +912,12 @@ static inline void kvmppc_set_vsr_word_dump(struct kvm_vcpu *vcpu, ...@@ -912,12 +912,12 @@ static inline void kvmppc_set_vsr_word_dump(struct kvm_vcpu *vcpu,
union kvmppc_one_reg val; union kvmppc_one_reg val;
int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK;
if (vcpu->arch.mmio_vsx_tx_sx_enabled) { if (index >= 32) {
val.vsx32val[0] = gpr; val.vsx32val[0] = gpr;
val.vsx32val[1] = gpr; val.vsx32val[1] = gpr;
val.vsx32val[2] = gpr; val.vsx32val[2] = gpr;
val.vsx32val[3] = gpr; val.vsx32val[3] = gpr;
VCPU_VSX_VR(vcpu, index) = val.vval; VCPU_VSX_VR(vcpu, index - 32) = val.vval;
} else { } else {
val.vsx32val[0] = gpr; val.vsx32val[0] = gpr;
val.vsx32val[1] = gpr; val.vsx32val[1] = gpr;
...@@ -937,10 +937,10 @@ static inline void kvmppc_set_vsr_word(struct kvm_vcpu *vcpu, ...@@ -937,10 +937,10 @@ static inline void kvmppc_set_vsr_word(struct kvm_vcpu *vcpu,
if (offset == -1) if (offset == -1)
return; return;
if (vcpu->arch.mmio_vsx_tx_sx_enabled) { if (index >= 32) {
val.vval = VCPU_VSX_VR(vcpu, index); val.vval = VCPU_VSX_VR(vcpu, index - 32);
val.vsx32val[offset] = gpr32; val.vsx32val[offset] = gpr32;
VCPU_VSX_VR(vcpu, index) = val.vval; VCPU_VSX_VR(vcpu, index - 32) = val.vval;
} else { } else {
dword_offset = offset / 2; dword_offset = offset / 2;
word_offset = offset % 2; word_offset = offset % 2;
...@@ -1361,10 +1361,10 @@ static inline int kvmppc_get_vsr_data(struct kvm_vcpu *vcpu, int rs, u64 *val) ...@@ -1361,10 +1361,10 @@ static inline int kvmppc_get_vsr_data(struct kvm_vcpu *vcpu, int rs, u64 *val)
break; break;
} }
if (!vcpu->arch.mmio_vsx_tx_sx_enabled) { if (rs < 32) {
*val = VCPU_VSX_FPR(vcpu, rs, vsx_offset); *val = VCPU_VSX_FPR(vcpu, rs, vsx_offset);
} else { } else {
reg.vval = VCPU_VSX_VR(vcpu, rs); reg.vval = VCPU_VSX_VR(vcpu, rs - 32);
*val = reg.vsxval[vsx_offset]; *val = reg.vsxval[vsx_offset];
} }
break; break;
...@@ -1378,13 +1378,13 @@ static inline int kvmppc_get_vsr_data(struct kvm_vcpu *vcpu, int rs, u64 *val) ...@@ -1378,13 +1378,13 @@ static inline int kvmppc_get_vsr_data(struct kvm_vcpu *vcpu, int rs, u64 *val)
break; break;
} }
if (!vcpu->arch.mmio_vsx_tx_sx_enabled) { if (rs < 32) {
dword_offset = vsx_offset / 2; dword_offset = vsx_offset / 2;
word_offset = vsx_offset % 2; word_offset = vsx_offset % 2;
reg.vsxval[0] = VCPU_VSX_FPR(vcpu, rs, dword_offset); reg.vsxval[0] = VCPU_VSX_FPR(vcpu, rs, dword_offset);
*val = reg.vsx32val[word_offset]; *val = reg.vsx32val[word_offset];
} else { } else {
reg.vval = VCPU_VSX_VR(vcpu, rs); reg.vval = VCPU_VSX_VR(vcpu, rs - 32);
*val = reg.vsx32val[vsx_offset]; *val = reg.vsx32val[vsx_offset];
} }
break; break;
......
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